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180 条记录 (耗时 0.031 秒)

    Strained channel on insulator device
    2.
    发明授权
    Strained channel on insulator device 失效
    应变绝缘体上的通道

    公开(公告)号：US07029994B2

    公开(公告)日：2006-04-18

    申请号：US11083537

    申请日：2005-03-18

    申请人： Chung-Hu Ge ,  Chao-Hsiung Wang ,  Chien-Chao Huang ,  Wen-Chin Lee ,  Chenming Hu

    发明人： Chung-Hu Ge ,  Chao-Hsiung Wang ,  Chien-Chao Huang ,  Wen-Chin Lee ,  Chenming Hu

    IPC分类号： H01L21/20

    CPC分类号： H01L21/823807 ,  H01L21/76264 ,  H01L21/84 ,  H01L27/1203 ,  H01L29/7848

    摘要： A semiconductor device 10 includes a substrate 12 (e.g., a silicon substrate) with an insulating layer 14 (e.g., an oxide such as silicon dioxide) disposed thereon. A first semiconducting material layer 16 (e.g., SiGe) is disposed on the insulating layer 14 and a second semiconducting material layer 18 (e.g., Si) is disposed on the first semiconducting material layer 16. The first and second semiconducting material layers 16 and 18 preferably have different lattice constants such that the first semiconducting material layer 16 is compressive and the second semiconducting material layer is tensile 18.

    摘要翻译： 半导体器件10包括其上设置有绝缘层14（例如氧化物如二氧化硅）的衬底12（例如，硅衬底）。 第一半导体材料层16（例如，SiGe）设置在绝缘层14上，并且第二半导体材料层18（例如，Si）设置在第一半导体材料层16上。 第一和第二半导体材料层16和18优选地具有不同的晶格常数，使得第一半导体材料层16是压缩的，并且第二半导体材料层是拉伸18。

    High performance semiconductor devices fabricated with strain-induced processes and methods for making same
    6.
    发明授权
    High performance semiconductor devices fabricated with strain-induced processes and methods for making same 有权
    用应变诱导工艺制造的高性能半导体器件及其制造方法

    公开(公告)号：US07394136B2

    公开(公告)日：2008-07-01

    申请号：US11194084

    申请日：2005-07-29

    申请人： Chung-Hu Ke ,  Wen-Chin Lee ,  Yee-Chia Yeo ,  Chih-Hsin Ko ,  Chenming Hu

    发明人： Chung-Hu Ke ,  Wen-Chin Lee ,  Yee-Chia Yeo ,  Chih-Hsin Ko ,  Chenming Hu

    IPC分类号： H01L21/00

    CPC分类号： H01L29/7846 ,  H01L21/823807 ,  H01L21/823878 ,  H01L29/1033 ,  H01L29/78 ,  H01L29/7842

    摘要： A high performance semiconductor device and the method for making same is disclosed with an improved drive current. The semiconductor device has source and drain regions built on an active region, a length of the device being different than a width thereof. One or more isolation regions are fabricated surrounding the active region, the isolation regions are then filled with an predetermined isolation material whose volume shrinkage exceeds 0.5% after an anneal process. A gate electrode is formed over the active region, and one or more dielectric spacers are made next to the gate electrode. Then, a contact etch stopper layer is put over the device, wherein the isolation regions, spacers and contact etch layer contribute to modulating a net strain imposed on the active region so as to improve the drive current.

    摘要翻译： 公开了一种改进的驱动电流的高性能半导体器件及其制造方法。 半导体器件具有构建在有源区上的源极和漏极区域，器件的长度与其宽度不同。 在有源区周围制造一个或多个隔离区域，然后用退火处理后其体积收缩率超过0.5％的预定隔离材料填充隔离区域。 在有源区上形成栅电极，并且在栅电极旁边形成一个或多个电介质间隔物。 然后，接触蚀刻停止层放置在器件上，其中隔离区，间隔物和接触蚀刻层有助于调制施加在有源区上的净应变，以便改善驱动电流。

    High performance semiconductor devices fabricated with strain-induced processes and methods for making same
    7.
    发明授权
    High performance semiconductor devices fabricated with strain-induced processes and methods for making same 有权
    用应变诱导工艺制造的高性能半导体器件及其制造方法

    公开(公告)号：US06949443B2

    公开(公告)日：2005-09-27

    申请号：US10683901

    申请日：2003-10-10

    申请人： Chung-Hu Ke ,  Wen-Chin Lee ,  Yee-Chia Yeo ,  Chih-Hsin Ko ,  Chenming Hu

    发明人： Chung-Hu Ke ,  Wen-Chin Lee ,  Yee-Chia Yeo ,  Chih-Hsin Ko ,  Chenming Hu

    IPC分类号： H01L21/336 ,  H01L21/76 ,  H01L21/762 ,  H01L21/8238 ,  H01L27/092 ,  H01L29/10 ,  H01L29/76 ,  H01L29/78 ,  H01L29/80

    CPC分类号： H01L29/7846 ,  H01L21/823807 ,  H01L21/823878 ,  H01L29/1033 ,  H01L29/78 ,  H01L29/7842

    摘要： A high performance semiconductor device and the method for making same is disclosed with an improved drive current. The semiconductor device has source and drain regions built on an active region, a length of the device being different than a width thereof. One or more isolation regions are fabricated surrounding the active region, the isolation regions are then filled with an predetermined isolation material whose volume shrinkage exceeds 0.5% after an anneal process. A gate electrode is formed over the active region, and one or more dielectric spacers are made next to the gate electrode. Then, a contact etch stopper layer is put over the device, wherein the isolation regions, spacers and contact etch layer contribute to modulating a net strain imposed on the active region so as to improve the drive current.

    摘要翻译： 公开了一种改进的驱动电流的高性能半导体器件及其制造方法。 半导体器件具有构建在有源区上的源极和漏极区域，器件的长度与其宽度不同。 在有源区周围制造一个或多个隔离区域，然后用退火处理后其体积收缩率超过0.5％的预定隔离材料填充隔离区域。 在有源区上形成栅电极，并且在栅电极旁边形成一个或多个电介质间隔物。 然后，接触蚀刻停止层放置在器件上，其中隔离区，间隔物和接触蚀刻层有助于调制施加在有源区上的净应变，以便改善驱动电流。

    Thermal anneal process for strained-Si devices
    10.
    发明授权
    Thermal anneal process for strained-Si devices 有权
    应变Si器件的热退火工艺

    公开(公告)号：US07098119B2

    公开(公告)日：2006-08-29

    申请号：US10845374

    申请日：2004-05-13

    申请人： Chung-Hu Ke ,  Wen-Chin Lee ,  Chenming Hu

    发明人： Chung-Hu Ke ,  Wen-Chin Lee ,  Chenming Hu

    IPC分类号： H01L29/06

    CPC分类号： H01L29/1054 ,  H01L21/26513 ,  H01L21/324 ,  H01L29/6659 ,  H01L29/7833

    摘要： A method is disclosed for forming a semiconductor device using strained silicon. After forming a first substrate material with a first natural lattice constant on a device substrate and a second substrate material with a second natural lattice constant on the first substrate material, a channel, source and drain regions of a field effective transistor are further defined using the first and second substrate materials. After implanting one or more impurity materials to the source and drain regions, and the transistor goes through an annealing process using a high speed heat source other than a Tungsten-Halogen lamp.

    摘要翻译： 公开了一种使用应变硅形成半导体器件的方法。 在第一衬底材料上形成具有第一自然晶格常数的第一衬底材料和在第一衬底材料上具有第二自然晶格常数的第二衬底材料之后，使用所述第一衬底材料的场效应晶体管的沟道，源极和漏极区域进一步限定 第一和第二基板材料。 在将一种或多种杂质材料注入到源极和漏极区域之后，并且晶体管经历使用除了钨 - 卤素灯之外的高速热源的退火工艺。