Latch circuits and operation circuits having scalable nonvolatile nanotube switches as electronic fuse replacement elements
    1.
    发明授权
    Latch circuits and operation circuits having scalable nonvolatile nanotube switches as electronic fuse replacement elements 有权
    锁存电路和操作电路具有可扩展的非易失性纳米管开关作为电子保险丝更换元件

    公开(公告)号:US08008745B2

    公开(公告)日:2011-08-30

    申请号:US11835583

    申请日:2007-08-08

    IPC分类号: H01L23/52

    摘要: A non-volatile latch circuit is provided. The non-volatile latch circuit includes a nanotube switching element capable of switching between resistance states and non-volatilely retaining the resistance state. The non-volatile latch circuit includes a volatile latch circuit is capable of receiving and volatilely storing a logic state. When the nanotube switching element is a resistance state, the volatile latch circuit retains a corresponding logic state and outputs that corresponding logic state at an output terminal. A non-volatile register file configuration circuit for use with a plurality of non-volatile register files is also provided. The non-volatile register file configuration circuit includes a selection circuitry and a plurality of nanotube fuse elements, each in electrical communication with one of a plurality of non-volatile register files. The selection circuitry is capable of applying electrical stimulus to each of the selected nanotube fuse elements to selectively bypass the corresponding register file.

    摘要翻译: 提供非易失性锁存电路。 非易失性锁存电路包括能够在电阻状态之间切换并且非易失性地保持电阻状态的纳米管开关元件。 非易失性锁存电路包括易失性锁存电路,其能够接收和不稳定地存储逻辑状态。 当纳米管开关元件为电阻状态时,易失性锁存电路保持相应的逻辑状态,并在输出端输出相应的逻辑状态。 还提供了与多个非易失性寄存器文件一起使用的非易失性寄存器文件配置电路。 非易失性寄存器文件配置电路包括选择电路和多个纳米管熔丝元件,每个纳米管熔丝元件与多个非易失性寄存器文件中的一个电气通信。 选择电路能够对每个选定的纳米管熔丝元件施加电刺激以选择性地绕过相应的寄存器文件。

    Nonvolatile resistive memories having scalable two-terminal nanotube switches
    2.
    发明授权
    Nonvolatile resistive memories having scalable two-terminal nanotube switches 有权
    具有可扩展的两端纳米管开关的非易失性电阻存储器

    公开(公告)号:US08102018B2

    公开(公告)日:2012-01-24

    申请号:US11835612

    申请日:2007-08-08

    IPC分类号: G11C11/56 G11C5/00 H01L29/00

    摘要: A non-volatile resistive memory is provided. The memory includes at least one non-volatile memory cell and selection circuitry. Each memory cell has a two-terminal nanotube switching device having and a nanotube fabric article disposed between and in electrical communication with two conductive terminals. Selection circuitry is operable to select the two-terminal nanotube switching device for read and write operations. Write control circuitry, responsive to a control signal, supplies write signals to a selected memory cell to induce a change in the resistance of the nanotube fabric article, the resistance corresponding to an informational state of the memory cell. Resistance sensing circuitry in communication with a selected nonvolatile memory cell, senses the resistance of the nanotube fabric article and provides the control signal to the write control circuitry. Read circuitry reads the corresponding informational state of the memory cell.

    摘要翻译: 提供了非易失性电阻性存储器。 存储器包括至少一个非易失性存储单元和选择电路。 每个存储单元具有两端纳米管切换装置,其具有设置在两个导电端子之间并与两个导电端子电连通的纳米管织物制品。 选择电路可操作以选择用于读和写操作的两端纳米管切换装置。 响应于控制信号的写控制电路向所选存储单元提供写入信号,以引起纳米管织物物品的电阻变化,该电阻对应于存储单元的信息状态。 与所选择的非易失性存储器单元通信的电阻感测电路感测纳米管织物制品的电阻并将控制信号提供给写入控制电路。 读取电路读取存储单元的相应信息状态。

    Nonvolatile nanotube diodes and nonvolatile nanotube blocks and systems using same and methods of making same
    5.
    发明授权
    Nonvolatile nanotube diodes and nonvolatile nanotube blocks and systems using same and methods of making same 有权
    非挥发性纳米管二极管和非易失性纳米管块及使用其的系统及其制造方法

    公开(公告)号:US07782650B2

    公开(公告)日:2010-08-24

    申请号:US11835845

    申请日:2007-08-08

    IPC分类号: G11C11/00

    摘要: Under one aspect, a memory array includes word lines; bit lines; memory cells; and a memory operation circuit. Each memory cell responds to electrical stimulus on a word line and on a bit line and includes: a two-terminal non-volatile nanotube switching device having first and second terminals, a semiconductor diode element, and a nanotube fabric article capable of multiple resistance states. The semiconductor diode and nanotube article are between and in electrical communication with the first and second terminals, which are coupled to the word line bit line respectively. The operation circuit selects cells by activating bit and/or word lines, detects a resistance state of the nanotube fabric article of a selected memory cell, and adjusts electrical stimulus applied to the cell to controllably induce a selected resistance state in the nanotube fabric article. The selected resistance state corresponds to an informational state of the memory cell.

    摘要翻译: 在一个方面,存储器阵列包括字线; 位线 记忆细胞; 和存储器操作电路。 每个存储器单元响应于字线和位线上的电刺激,并且包括:具有第一和第二端子的二端非易失性纳米管开关器件,半导体二极管元件和能够具有多个电阻状态的纳米管织物制品 。 半导体二极管和纳米管制品分别与第一和第二端子电连接,并且与第一和第二端子电连接,它们分别耦合到字线位线。 操作电路通过激活位和/或字线来选择单元,检测所选择的存储单元的纳米管织物的电阻状态,并调整施加到单元的电刺激以可控制地引起纳米管织物制品中选定的电阻状态。 选择的电阻状态对应于存储单元的信息状态。