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    Lead frame and the method to fabricate thereof
    3.
    发明授权
    Lead frame and the method to fabricate thereof 有权

    公开(公告)号：US10256118B2

    公开(公告)日：2019-04-09

    申请号：US15972247

    申请日：2018-05-07

    Applicant: CYNTEC CO., LTD.

    Inventor： Chia Pei Chou ,  Lang-Yi Chiang ,  Jih-Hsu Yeh ,  You Chang Tseng

    IPC: H01L23/495 ,  H01L21/48 ,  H01L23/498

    Abstract: A method to form an electrical component, the method comprising: providing a first lead and a second lead; forming a first conductive pillar and a second conductive pillar on a first portion of the top surface of the first lead and a first portion of the top surface of the second lead, respectively, wherein a second portion of the top surface of the first lead, a second portion of the top surface of the second lead, the first conductive pillar, and the second conductive pillar form a 3D space, wherein at least one device is disposed in said 3D space and electrically connected to the at least one device to the first conductive pillar and the second conductive pillar.

    Protective device
    5.
    发明授权
    Protective device 有权
    保护装置

    公开(公告)号：US08675333B2

    公开(公告)日：2014-03-18

    申请号：US13894160

    申请日：2013-05-14

    Applicant: Cyntec Co., Ltd.

    Inventor： Chung-Hsiung Wang ,  Hung-Ming Lin ,  Lang-Yi Chiang ,  Wen-Shiang Luo ,  Kuo-Shu Chen

    IPC: H02H5/00

    CPC classification number: H02H5/00 ,  H01H69/022 ,  H01H85/0047 ,  H01H85/0065 ,  H01H85/0411 ,  H01H85/046 ,  H01H85/048 ,  H01H85/11 ,  H01H2085/466

    Abstract: A protective device including a substrate, a conductive section and a first auxiliary medium is provided. The conductive section is supported by the substrate, wherein the conductive section comprises a metal element electrically connected between first and second electrodes. The metal element serves as a sacrificial structure having a melting point lower than that of the first and second electrodes. The first auxiliary medium is disposed between the metal element and the substrate, wherein the first auxiliary medium has a melting point lower than that of the metal element. The first auxiliary medium facilitates breaking of the metal element upon melting.

    Abstract translation: 提供了包括基板，导电部分和第一辅助介质的保护装置。 导电部分由衬底支撑，其中导电部分包括电连接在第一和第二电极之间的金属元件。 金属元件用作熔点低于第一和第二电极的熔点的牺牲结构。 第一辅助介质设置在金属元件和基板之间，其中第一辅助介质的熔点低于金属元件的熔点。 第一辅助介质有助于熔化时金属元件的断裂。

    METHOD OF MANUFACTURING MULTI-LAYER COIL AND MULTI-LAYER COIL DEVICE
    8.
    发明申请
    METHOD OF MANUFACTURING MULTI-LAYER COIL AND MULTI-LAYER COIL DEVICE 审中-公开
    制造多层线圈和多层线圈装置的方法

    公开(公告)号：US20150035640A1

    公开(公告)日：2015-02-05

    申请号：US14446340

    申请日：2014-07-30

    Applicant: CYNTEC CO., LTD.

    Inventor： Chung-Hsiung Wang ,  Lang-Yi Chiang ,  Wei-Chien Chang ,  Yu-Hsin Lin

    IPC: H01F41/04 ,  H01F27/28 ,  H01F5/00

    CPC classification number: H01F41/042 ,  C25D5/02 ,  H01F17/0006 ,  H01F27/2804 ,  H01F27/292 ,  H01F2017/0066 ,  Y10T29/4902

    Abstract: A method of manufacturing a multi-layer coil includes steps of providing a substrate; forming a seed layer on the substrate; and plating the seed layer with N coil layers by N current densities according to N threshold ranges, so as to form the multi-layer coil on the substrate, wherein an i-th current density of the N current densities is lower than an (i+1)-th current density of the N current densities. A first coil layer of the N coil layers is plated on the seed layer by a first current density of the N current densities. When an aspect ratio of an i-th coil layer of the N coil layers is within an i-th threshold range of the N threshold ranges, an (i+1)-th coil layer of the N coil layers is plated on the i-th coil layer by the (i+1)-th current density.

    Abstract translation: 制造多层线圈的方法包括提供基板的步骤; 在所述基板上形成种子层; 并根据N个阈值范围用N个线圈层电镀N个电流密度，以在衬底上形成多层线圈，其中N个电流密度的第i个电流密度低于（i +1）电流密度的N电流密度。 通过N个电流密度的第一电流密度将N个线圈层的第一线圈层电镀在种子层上。 当N个线圈层的第i个线圈层的纵横比在N个阈值范围的第i个阈值范围内时，N个线圈层的第（i + 1）个线圈层被电镀在i 第（i + 1）个电流密度的线圈层。

    Method of manufacturing multi-layer coil and multi-layer coil device
    9.
    发明授权
    Method of manufacturing multi-layer coil and multi-layer coil device 有权

    公开(公告)号：US10217563B2

    公开(公告)日：2019-02-26

    申请号：US14446340

    申请日：2014-07-30

    Applicant: CYNTEC CO., LTD.

    Inventor： Chung-Hsiung Wang ,  Lang-Yi Chiang ,  Wei-Chien Chang ,  Yu-Hsin Lin

    IPC: C25D5/02 ,  H01F17/00 ,  H01F27/28 ,  H01F27/29 ,  H01F41/04

    Abstract: A method of manufacturing a multi-layer coil includes steps of providing a substrate; forming a seed layer on the substrate; and plating the seed layer with N coil layers by N current densities according to N threshold ranges, so as to form the multi-layer coil on the substrate, wherein an i-th current density of the N current densities is lower than an (i+1)-th current density of the N current densities. A first coil layer of the N coil layers is plated on the seed layer by a first current density of the N current densities. When an aspect ratio of an i-th coil layer of the N coil layers is within an i-th threshold range of the N threshold ranges, an (i+1)-th coil layer of the N coil layers is plated on the i-th coil layer by the (i+1)-th current density.

    Leadframe and the method to fabricate thereof
    10.
    发明授权
    Leadframe and the method to fabricate thereof 有权

    公开(公告)号：US09991136B2

    公开(公告)日：2018-06-05

    申请号：US15592190

    申请日：2017-05-10

    Applicant: CYNTEC CO., LTD.

    Inventor： Chia Pei Chou ,  Lang-Yi Chiang ,  Jih-Hsu Yeh ,  You Chang Tseng

    IPC: H05K1/11 ,  H01L21/48 ,  H01L23/495 ,  H01L23/498

    CPC classification number: H01L21/486 ,  H01L23/495 ,  H01L23/4952 ,  H01L23/49811 ,  H01L23/49827 ,  H01L2924/00 ,  H01L2924/0002 ,  Y10T29/49117

    Abstract: The present invention discloses a leadframe in which two conductive pillars with a high aspect ratio and the corresponding two leads of the leadframe form a 3D space for accommodating at least one device. A first lead and a second lead are spaced apart from each other. A first conductive pillar is formed on the first lead by disposing a first via on the first lead, wherein at least one first conductive material is filled inside the first via to form the first conductive pillar. A second conductive pillar is formed on the second lead by disposing a second via on the second lead, wherein at least one second conductive material is filled inside the second via to form the second conductive pillar. The first lead, the second lead, the first conductive pillar, and the second conductive pillar form a 3D space for accommodating at least one device, wherein the at least one device is electrically connected to the first conductive pillar and the second conductive pillar.

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