Method for manufacturing silicon carbide semiconductor devices
    1.
    发明申请
    Method for manufacturing silicon carbide semiconductor devices 审中-公开
    碳化硅半导体器件的制造方法

    公开(公告)号:US20070015333A1

    公开(公告)日:2007-01-18

    申请号:US11452053

    申请日:2006-06-13

    IPC分类号: H01L21/336

    摘要: A method of manufacturing a semiconductor device is disclosed that includes the treating the surface of a SiC semiconductor substrate prior to forming a gate oxide film on the SiC semiconductor substrate in order to etch the SiC semiconductor substrate by several nm to 0.1 μm with hydrogen in a reaction furnace. The treating is conducted a reduced pressure in the furnace, at a temperature of 1500° C. or higher. The manufacturing method facilitates the removal of particles and oxide residues remaining on the trench inner wall after trench etching in the manufacturing process for manufacturing a SiC semiconductor device having a fine trench-type MOS gate structure.

    摘要翻译: 公开了一种制造半导体器件的方法,其包括在SiC半导体衬底上形成栅极氧化膜之前处理SiC半导体衬底的表面,以便将SiC半导体衬底在 反应炉。 在1500℃以上的温度下,在炉内进行减压处理。 在制造具有细沟槽型MOS栅极结构的SiC半导体器件的制造工艺的制造工艺中,制造方法有助于在沟槽蚀刻后残留在沟槽内壁上的颗粒和氧化物残余物的去除。

    Trench MOS type silicon carbide semiconductor device
    6.
    发明授权
    Trench MOS type silicon carbide semiconductor device 有权
    沟槽MOS型碳化硅半导体器件

    公开(公告)号:US07732861B2

    公开(公告)日:2010-06-08

    申请号:US12461713

    申请日:2009-08-21

    申请人: Takashi Tsuji

    发明人: Takashi Tsuji

    IPC分类号: H01L21/336 H01L29/788

    摘要: A trench MOS type SiC semiconductor device includes a first conductivity semiconductor substrate, a first conductivity drift layer on the substrate, a second conductivity base layer on the drift layer, a first conductivity source layer on the base layer, a stripe shaped trench reaching from the surface of the source layer to the drift layer and having a gate electrode via a gate oxide film, a second conductivity layer on the bottom of the trench, and a second conductivity type region thereon on across-the-width side walls of at least one end of the trench, electrically coupling the second conductivity layer with the base layer. The device allows a low on-resistance without newly forming an electrode connected to the second conductivity layer even in the case of a device in which the second conductivity layer has to be grounded.

    摘要翻译: 沟槽MOS型SiC半导体器件包括第一导电半导体衬底,衬底上的第一电导率漂移层,漂移层上的第二导电性基底层,基底层上的第一导电源层, 源极层的表面到漂移层,并且通过栅极氧化膜具有栅电极,在沟槽的底部具有第二导电层,并且在其上的至少一个的宽度侧壁上的第二导电类型区域 沟槽的端部,将第二导电层与基底层电耦合。 即使在第二导电层必须接地的装置的情况下,该装置也允许低导通电阻而不新形成连接到第二导电层的电极。

    METHOD FOR PRODUCTION OF TOOTH, AND TOOTH PRODUCED BY THE METHOD
    7.
    发明申请
    METHOD FOR PRODUCTION OF TOOTH, AND TOOTH PRODUCED BY THE METHOD 失效
    用于生产牙齿的方法,以及通过该方法生产的牙齿

    公开(公告)号:US20100129771A1

    公开(公告)日:2010-05-27

    申请号:US12528936

    申请日:2008-02-28

    IPC分类号: A61C13/225 C12N5/077

    摘要: Disclosed is a method for producing a tooth, which comprises the steps of: positioning a first cell mass substantially comprising either one of amniotic mesenchymal cells or epithelial cells, and a second cell mass substantially comprising the other one in the inside of a support carrier while keeping them in close contact with each other without being mixed together; and culturing the first and second cell masses in the inside of the support carrier.

    摘要翻译: 公开了一种生产牙齿的方法,其包括以下步骤:将基本上包含羊膜间充质细胞或上皮细胞之一的第一细胞群和基本上包含另一种的第二细胞团定位在载体载体的内部,同时 保持彼此紧密接触而不混合在一起; 并且在支撑载体的内部培养第一和第二细胞块。

    Method of manufacturing silicon carbide semiconductor device
    10.
    发明授权
    Method of manufacturing silicon carbide semiconductor device 有权
    制造碳化硅半导体器件的方法

    公开(公告)号:US07407837B2

    公开(公告)日:2008-08-05

    申请号:US11042809

    申请日:2005-01-25

    申请人: Takashi Tsuji

    发明人: Takashi Tsuji

    IPC分类号: H01L21/332

    摘要: Stress is exerted to the SiC crystal in the region, in which the carriers of a SiC semiconductor device flow, to change the crystal lattice intervals of the SiC crystal. Since the degeneration of the conduction bands in the bottoms thereof is dissolved, since the inter-band scattering is prevented from causing, and since the effective electron mass is reduced due to the crystal lattice interval change, the carrier mobility in the SiC crystal is improved, the resistance of the SiC crystal is reduced and, therefore, the on-resistance of the SiC semiconductor device is reduced.

    摘要翻译: 在SiC半导体器件的载流子流动的区域中,对SiC晶体施加应力,以改变SiC晶体的晶格间隔。 由于其底部导带的退化被溶解,因此防止带间散射引起,并且由于晶格间隔变化引起的有效电子质量降低,所以提高了SiC晶体的载流子迁移率 ,SiC晶体的电阻降低,因此SiC半导体器件的导通电阻降低。