Gas distribution plate electrode for a plasma receptor
    2.
    发明授权
    Gas distribution plate electrode for a plasma receptor 有权
    用于等离子体受体的气体分布板电极

    公开(公告)号:US06677712B2

    公开(公告)日:2004-01-13

    申请号:US10442386

    申请日:2003-05-20

    IPC分类号: H01J724

    CPC分类号: H01J37/3244

    摘要: The invention is embodied in a plasma reactor for processing a semiconductor wafer, the reactor having a gas distribution plate including a front plate in the chamber and a back plate on an external side of the front plate, the gas distribution plate comprising a gas manifold adjacent the back plate, the back and front plates bonded together and forming an assembly. The assembly includes an array of holes through the front plate and communicating with the chamber, at least one gas flow-controlling orifice through the back plate and communicating between the manifold and at least one of the holes, the orifice having a diameter that determines gas flow rate to the at least one hole. In addition, an array of pucks is at least generally congruent with the array of holes and disposed within respective ones of the holes to define annular gas passages for gas flow through the front plate into the chamber, each of the annular gas passages being non-aligned with the orifice.

    摘要翻译: 本发明体现在用于处理半导体晶片的等离子体反应器中,该反应器具有气体分配板,该气体分配板包括在该腔室中的前板和在前板的外侧上的后板,该气体分配板包括邻近的气体歧管 背板,后板和前板结合在一起并形成组件。 组件包括穿过前板并与腔室连通的孔阵列,至少一个通过后板的气体流量控制孔,并在歧管和至少一个孔之间连通,孔口具有确定气体的直径 至少一个孔的流速。 此外,一组圆盘至少大体上与孔阵列一致,并且设置在孔的相应孔内,以限定用于气体流过前板进入腔室的环形气体通道,每个环形气体通道是非限制性的, 与孔对齐。

    MERIE plasma reactor with overhead RF electrode tuned to the plasma with arcing suppression
    3.
    发明授权
    MERIE plasma reactor with overhead RF electrode tuned to the plasma with arcing suppression 失效
    MERIE等离子体反应器,其顶置RF电极通过电弧抑制调谐到等离子体

    公开(公告)号:US07186943B2

    公开(公告)日:2007-03-06

    申请号:US11105307

    申请日:2005-04-12

    IPC分类号: B23K10/06

    摘要: A plasma reactor for processing a semiconductor workpiece, includes a reactor chamber having a chamber wall and containing a workpiece support for holding the semiconductor support, the electrode comprising a portion of the chamber wall, an RF power generator for supplying power at a frequency of the generator to the overhead electrode and capable of maintaining a plasma within the chamber at a desired plasma ion density level. The overhead electrode has a capacitance such that the overhead electrode and the plasma formed in the chamber at the desired plasma ion density resonate together at an electrode-plasma resonant frequency, the frequency of the generator being at least near the electrode-plasma resonant frequency. The reactor further includes a set of MERIE magnets surrounding the plasma process area overlying the wafer surface that produce a slowly circulating magnetic field which stirs the plasma to improve plasma ion density distribution uniformity.

    摘要翻译: 一种用于处理半导体工件的等离子体反应器,包括具有室壁并具有用于保持半导体支撑件的工件支撑件的反应室,所述电极包括室壁的一部分,RF发电机,用于以 发电机到顶置电极并且能够将室内的等离子体保持在期望的等离子体离子密度水平。 顶置电极具有这样的电容,使得在期望的等离子体离子密度下在室中形成的顶置电极和等离子体以电极 - 等离子体共振频率共振,发电机的频率至少接近电极 - 等离子体共振频率。 反应器还包括围绕晶片表面的等离子体处理区域的一组MERIE磁体,其产生缓慢循环的磁场,其搅动等离子体以改善等离子体离子密度分布均匀性。

    Gas distribution plate electrode for a plasma reactor
    4.
    发明授权
    Gas distribution plate electrode for a plasma reactor 有权
    用于等离子体反应器的气体分布板电极

    公开(公告)号:US06586886B1

    公开(公告)日:2003-07-01

    申请号:US10027732

    申请日:2001-12-19

    IPC分类号: H01J724

    CPC分类号: H01J37/3244

    摘要: The invention is embodied in a plasma reactor for processing a semiconductor wafer, the reactor having a gas distribution plate including a front plate in the chamber and a back plate on an external side of the front plate, the gas distribution plate comprising a gas manifold adjacent the back plate, the back and front plates bonded together and forming an assembly. The assembly includes an array of holes through the front plate and communicating with the chamber, at least one gas flow-controlling orifice through the back plate and communicating between the manifold and at least one of the holes, the orifice having a diameter that determines gas flow rate to the at least one hole. In addition, an array of pucks is at least generally congruent with the array of holes and disposed within respective ones of the holes to define annular gas passages for gas flow through the front plate into the chamber, each of the annular gas passages being non-aligned with the orifice.

    摘要翻译: 本发明体现在用于处理半导体晶片的等离子体反应器中,该反应器具有气体分配板,该气体分配板包括在该腔室中的前板和在前板的外侧上的后板,该气体分配板包括邻近的气体歧管 背板,后板和前板结合在一起并形成组件。 组件包括穿过前板并与腔室连通的孔阵列,至少一个通过后板的气体流量控制孔,并在歧管和至少一个孔之间连通,孔口具有确定气体的直径 至少一个孔的流速。 此外,一组圆盘至少大体上与孔阵列一致,并且设置在孔的相应孔内,以限定用于气体流过前板进入腔室的环形气体通道,每个环形气体通道是非限制性的, 与孔对齐。

    Merie plasma reactor with overhead RF electrode tuned to the plasma with arcing suppression
    7.
    发明授权
    Merie plasma reactor with overhead RF electrode tuned to the plasma with arcing suppression 有权
    Merie等离子体反应器,其具有用电弧抑制调谐到等离子体的架空RF电极

    公开(公告)号:US06894245B2

    公开(公告)日:2005-05-17

    申请号:US10007367

    申请日:2001-10-22

    摘要: A plasma reactor for processing a semiconductor workpiece, includes a reactor chamber having a chamber wall and containing a workpiece support for holding the semiconductor support, the electrode comprising a portion of the chamber wall, an RF power generator for supplying power at a frequency of the generator to the overhead electrode and capable of maintaining a plasma within the chamber at a desired plasma ion density level. The overhead electrode has a capacitance such that the overhead electrode and the plasma formed in the chamber at the desired plasma ion density resonate together at an electrode-plasma resonant frequency, the frequency of the generator being at least near the electrode-plasma resonant frequency. The reactor further includes a set of MERIE magnets surrounding the plasma process area overlying the wafer surface that produce a slowly circulating magnetic field which stirs the plasma to improve plasma ion density distribution uniformity.

    摘要翻译: 一种用于处理半导体工件的等离子体反应器,包括具有室壁并具有用于保持半导体支撑件的工件支撑件的反应室,所述电极包括室壁的一部分,RF发电机,用于以 发电机到顶置电极并且能够将室内的等离子体保持在期望的等离子体离子密度水平。 顶置电极具有这样的电容,使得在期望的等离子体离子密度下在室中形成的顶置电极和等离子体以电极 - 等离子体共振频率共振,发电机的频率至少接近电极 - 等离子体共振频率。 反应器还包括围绕晶片表面的等离子体处理区域的一组MERIE磁体,其产生缓慢循环的磁场,其搅动等离子体以改善等离子体离子密度分布均匀性。

    Post-etch treatment to remove residues
    9.
    发明申请
    Post-etch treatment to remove residues 审中-公开
    蚀刻后处理以除去残留物

    公开(公告)号:US20060102197A1

    公开(公告)日:2006-05-18

    申请号:US10989678

    申请日:2004-11-16

    IPC分类号: B08B6/00 B08B5/04

    摘要: A method for removing residue from a layer of conductive material on a substrate is provided herein. In one embodiment, the method includes introducing a process gas into a vacuum chamber having a substrate surface with residue from exposure to a fluorine-containing environment. The process gas includes a hydrogen-containing gas. Optionally, the process gas may further include an oxygen-containing or a nitrogen containing gas. A plasma of the process gas is thereafter maintained in the vacuum chamber for a predetermined period of time to remove the residue from the surface. The temperature of the substrate is maintained at a temperature between about 10 degrees Celsius and about 90 degrees Celsius during the plasma step.

    摘要翻译: 本文提供了用于从基底上的导电材料层除去残余物的方法。 在一个实施方案中,该方法包括将工艺气体引入真空室,该真空室具有残留物暴露于含氟环境的基底表面。 工艺气体包括含氢气体。 任选地,工艺气体还可以包括含氧气体或含氮气体。 然后将该工艺气体的等离子体在真空室中保持预定的时间以从表面除去残余物。 在等离子体步骤期间,基板的温度保持在约10摄氏度和约90摄氏度之间的温度。

    Methods for forming ultra thin structures on a substrate
    10.
    发明授权
    Methods for forming ultra thin structures on a substrate 失效
    在基材上形成超薄结构的方法

    公开(公告)号:US07981812B2

    公开(公告)日:2011-07-19

    申请号:US12167553

    申请日:2008-07-03

    IPC分类号: H01L21/31 H01L21/469

    摘要: Methods for forming an ultra thin structure using a method that includes multiple cycles of polymer deposition of photoresist (PDP) process and etching process. The embodiments described herein may be advantageously utilized to fabricate a submicron structure on a substrate having a critical dimension less than 55 nm and beyond. In one embodiment, a method of forming a submicron structure on a substrate may include providing a substrate having a patterned photoresist layer disposed on a film stack into an etch chamber, wherein the film stack includes at least a hardmask layer disposed on a dielectric layer, performing a polymer deposition process to deposit a polymer layer on the pattered photoresist layer, thus reducing a critical dimension of an opening in the patterned photoresist layer, and etching the underlying hardmask layer through the opening having the reduced dimension.

    摘要翻译: 使用包括光致抗蚀剂(PDP)工艺和蚀刻工艺的聚合物沉积的多个循环的方法形成超薄结构的方法。 本文描述的实施例可有利地用于在临界尺寸小于55nm及以上的衬底上制造亚微米结构。 在一个实施例中,在衬底上形成亚微米结构的方法可以包括提供具有设置在膜堆叠上的图案化光致抗蚀剂层进入蚀刻室的衬底,其中所述膜堆叠包括至少设置在电介质层上的硬掩模层, 执行聚合物沉积工艺以在图案化的光致抗蚀剂层上沉积聚合物层,从而减小图案化光致抗蚀剂层中的开口的临界尺寸,以及通过具有减小的尺寸的开口蚀刻下面的硬掩模层。