公开(公告)号：US06624521B2

公开(公告)日：2003-09-23

申请号：US09910284

申请日：2001-07-20

申请人： Daniela Staiculescu ,  Joy Laskar

发明人： Daniela Staiculescu ,  Joy Laskar

IPC分类号： H01L2940

CPC分类号： H01L24/81 ,  H01L23/66 ,  H01L2223/6622 ,  H01L2223/6627 ,  H01L2224/13144 ,  H01L2224/81801 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/1903

摘要： A flip chip assembly is disclosed that includes a coplanar waveguide launch with a transmission line, and a bump interconnection that includes multiple ground bumps. The transmission line may be a radial transmission line. Similarly, the ground bumps may be arranged in a pseudo-coaxial configuration so as to effect a vertical transition in the flip chip assembly. A method is also disclosed that includes the steps of: providing a coplanar waveguide transmission line launch; providing a chip for attachment to the coplanar waveguide launch; arranging one or more ground bumps on the coplanar waveguide launch; and forming a bump interconnection between the coplanar waveguide launch and the chip. The coplanar waveguide launch provided in this method may include a radial transmission line. The step of arranging the multiple ground bumps may include the step of arranging multiple ground bumps in a pseudo-coaxial configuration.

摘要翻译： 公开了一种倒装芯片组件，其包括具有传输线的共面波导发射和包括多个接地凸块的凸块互连。 传输线可以是径向传输线。 类似地，接地凸块可以布置成伪同轴结构，以便在倒装芯片组件中实现垂直转变。 还公开了一种方法，其包括以下步骤：提供共面波导传输线发射; 提供用于附接到共面波导发射的芯片; 在共面波导发射上布置一个或多个接地突起; 并在共面波导发射和芯片之间形成凸块互连。 在该方法中提供的共面波导启动可以包括径向传输线。 布置多个接地凸块的步骤可以包括以伪同轴配置布置多个接地凸块的步骤。

公开(公告)号：US08503940B2

公开(公告)日：2013-08-06

申请号：US13397001

申请日：2012-02-15

申请人： Edward Gebara ,  Andrew Joo Kim ,  Joy Laskar ,  Anthony Stelliga ,  Emmanouil M. Tentzeris

发明人： Edward Gebara ,  Andrew Joo Kim ,  Joy Laskar ,  Anthony Stelliga ,  Emmanouil M. Tentzeris

IPC分类号： H04B1/00

CPC分类号： H04B1/123 ,  H04B1/7103

摘要： A method for interference suppression, including receiving a sample of an aggressor communication signal from a sensor embedded in a flex circuit, emulating interference that the aggressor communication signal imposes on a victim communication signal, and suppressing the imposed interference in response to applying the emulated interference to the victim communication signal. In other aspects, the flex circuit comprises a plurality of traces running substantially parallel to one another along a surface of the flex circuit, and the sensor comprises one of the plurality of traces and one of a plurality of traces of another flex circuit. In still other aspects, the flex circuit comprises a plurality of traces running substantially parallel to one another and the sensor comprises a trace of the flex circuit running perpendicular to the plurality of traces running substantially parallel to one another.

摘要翻译： 一种用于干扰抑制的方法，包括从嵌入在柔性电路中的传感器接收侵入者通信信号的样本，模拟侵扰者通信信号对受害者通信信号施加的干扰，以及响应于施加模拟干扰而抑制施加的干扰 对受害者通信信号。 在其他方面，柔性电路包括沿着柔性电路的表面基本上彼此平行地延伸的多条迹线，并且传感器包括多条迹线中的一条和另一条柔性电路的多条迹线之一。 在另外的方面，柔性电路包括基本上彼此平行地延伸的多个迹线，并且传感器包括垂直于基本上彼此平行地延伸的多个迹线垂直运行的柔性电路的迹线。

公开(公告)号：US08473535B2

公开(公告)日：2013-06-25

申请号：US12327279

申请日：2008-12-03

申请人： Bevin George Perumana ,  Arun Rachamadugu ,  Stephane Pinel ,  Joy Laskar

发明人： Bevin George Perumana ,  Arun Rachamadugu ,  Stephane Pinel ,  Joy Laskar

IPC分类号： G06F17/10

CPC分类号： H03H15/00 ,  H03H2015/002

摘要： A first system and method relates to an analog current-mode method using branch systems. In the analog current-mode implementation, multiple branches systems can be scaled according to filter coefficients and switched using known data points. Positive coefficients can add current to the summing node, while negative coefficients can remove current from the summing node. Switches can be implemented with quick charge/discharge paths in order to operate at very high data rates. A second system and method relates to a digital look-up table based high-speed implementation. In the digital implementation, outputs can be pre-calculated as an n-bit output word that drives an n-bit DAC. Each bit of the n-bit word can then described as an independent function of the known data points. Each such function can be implemented as a high-speed combinational logic block. Both systems and methods enable the implementation of pulse shaping filters for multi-gigabit per second data transmission.

摘要翻译： 第一系统和方法涉及使用分支系统的模拟电流模式方法。 在模拟电流模式实现中，可以根据滤波器系数对多个分支系统进行缩放，并使用已知的数据点进行切换。 正系数可以向求和节点添加电流，而负系数可以去除求和节点的电流。 开关可以通过快速充电/放电路径实现，以便以非常高的数据速率运行。 第二系统和方法涉及基于数字查找表的高速实现。 在数字实现中，可以将输出预先计算为驱动n位DAC的n位输出字。 n位字的每个位可以被描述为已知数据点的独立函数。 每个这样的功能可以被实现为高速组合逻辑块。 这两种系统和方法使得能够实现用于千兆位/秒数据传输的脉冲整形滤波器。

公开(公告)号：US08378874B2

公开(公告)日：2013-02-19

申请号：US13056933

申请日：2008-07-31

申请人： Stephane Pinel ,  Joy Laskar

发明人： Stephane Pinel ,  Joy Laskar

IPC分类号： H03M1/34

CPC分类号： H03M1/361 ,  H03K5/08 ,  H03K5/2472 ,  H03M1/0636 ,  H03M1/1215 ,  H03M1/20

摘要： An analog to digital converter for operating at high speeds can be implemented with a micro-comparator/sampler, an encoder, and a selector. The micro-comparator includes an input from an antenna of a receiver/transceiver system; a transistor pair; reset transistor; cascaded inverters; an inverter circuit; a buffer; and a D flip flop circuit. Depending on the number of micro-comparator/samplers placed in parallel, a number of bits can be generated. For example, 15 bits from 15 different micro-comparator/samplers can be inserted into a 15 to 4 bit encoder to generate 4 bits.

摘要翻译： 可以使用微比较器/采样器，编码器和选择器来实现用于高速操作的模数转换器。 微型比较器包括来自接收器/收发器系统的天线的输入; 晶体管对; 复位晶体管; 级联逆变器; 逆变器电路; 一个缓冲区 和D触发电路。 根据并行放置的微比较器/采样器的数量，可以产生多个位。 例如，15个不同的微比较器/采样器的15位可以插入15到4位编码器中，以生成4位。

公开(公告)号：US08165535B2

公开(公告)日：2012-04-24

申请号：US11754103

申请日：2007-05-25

申请人： Minsik Ahn ,  Chang-Ho Lee ,  Jaejoon Chang ,  Wangmyong Woo ,  Haksun Kim ,  Joy Laskar

发明人： Minsik Ahn ,  Chang-Ho Lee ,  Jaejoon Chang ,  Wangmyong Woo ,  Haksun Kim ,  Joy Laskar

IPC分类号： H04B1/44

CPC分类号： H04B1/48

摘要： Systems and methods may be provided for a CMOS RF antenna switch. The systems and methods for the CMOS RF antenna switch may include an antenna that is operative to transmit and receive signals over at least one radio frequency (RF) band, and a transmit switch coupled to the antenna, where the transmit switch is enabled to transmit a respective first signal to the antenna and disabled to prevent transmission of the first signal to the antenna. the systems and methods for the CMOS RF antenna switch may further include a receiver switch coupled to the antenna, where the receiver switch forms a filter when enabled and a resonant circuit when disabled, where the filter provides for reception of a second signal received by the antenna, and where the resonant circuit blocks reception of at least the first signal.

摘要翻译： 可以为CMOS RF天线开关提供系统和方法。 CMOS RF天线开关的系统和方法可以包括可操作以通过至少一个射频（RF）频带发送和接收信号的天线，以及耦合到天线的发射开关，其中发射开关能够传输 对天线的相应的第一信号并且禁止阻止第一信号传输到天线。 用于CMOS RF天线开关的系统和方法还可以包括耦合到天线的接收器开关，其中接收器开关在使能时形成滤波器，当禁用时形成谐振电路，其中滤波器提供接收由第 天线，并且其中谐振电路阻止至少第一信号的接收。

公开(公告)号：US08135350B2

公开(公告)日：2012-03-13

申请号：US13190746

申请日：2011-07-26

申请人： Edward Gebara ,  Andrew Joo Kim ,  Joy Laskar ,  Anthony Stelliga ,  Emmanouil M. Tentzeris

发明人： Edward Gebara ,  Andrew Joo Kim ,  Joy Laskar ,  Anthony Stelliga ,  Emmanouil M. Tentzeris

IPC分类号： H04B1/00 ,  H04B15/00

CPC分类号： H04B1/123 ,  H04B1/7103

摘要： A system for suppressing interference imposed on a victim communication signal by an aggressor communication signal including a circuit that comprises an input port, an output port, and a signal processing circuit connected between the input port and the output port, the signal processing circuit being operative to produce an interference compensation signal at the output port, for application to the victim communication signal, via processing a sample of the aggressor communication signal transmitted through the input port, and the input port being configured to connect to a sampling system that includes a first circuit trace running along a surface of a flex circuit of a portable wireless device that is dedicated to sensing the aggressor communication signal flowing on a second circuit trace running along the surface of the flex circuit.

摘要翻译： 一种用于通过包括连接在输入端口和输出端口之间的输入端口，输出端口和信号处理电路的电路的侵略者通信信号来抑制对受害者通信信号施加的干扰的系统，所述信号处理电路是可操作的 以通过处理通过输入端口传输的侵略者通信信号的采样来产生在输出端口处的干扰补偿信号，用于应用于受害者通信信号，并且输入端口被配置为连接到采样系统，该采样系统包括第一 沿着便携式无线设备的柔性电路的表面延伸的电路迹线，其专用于感测在沿柔性电路的表面延伸的第二电路迹线上流动的侵略者通信信号。

公开(公告)号：US08081948B2

公开(公告)日：2011-12-20

申请号：US12447163

申请日：2007-10-25

申请人： Stephane Pinel ,  Joy Laskar ,  David Yeh ,  Bevin George Perumana ,  Saikat Sarkar

发明人： Stephane Pinel ,  Joy Laskar ,  David Yeh ,  Bevin George Perumana ,  Saikat Sarkar

IPC分类号： H04B1/16

CPC分类号： G06G7/12

摘要： An analog multi-gigabit receiver and/or transceiver can be implemented for the reception and demodulation of multi-gigabits quadrature phase shift keying (QPSK) modulated using a CMOS (complementary metal-oxide semiconductor) process. Further, an analog multi-gigabit receiver and/or transceiver can be implemented for the reception and demodulation of multi-gigabits binary phase shift keying (BPSK), minimum shift keying (MSK), and/or amplitude shift keying (ASK) signal modulated in CMOS processes.

摘要翻译： 可以实现模拟多吉比特接收机和/或收发机用于使用CMOS（互补金属氧化物半导体）工艺调制的多吉比特正交相移键控（QPSK）的接收和解调。 此外，可以实现模拟多吉比特接收机和/或收发器用于接收和解调多吉比特二进制相移键控（BPSK），最小移位键控（MSK）和/或幅度键控（ASK）信号调制 在CMOS工艺中。

公开(公告)号：US08067987B2

公开(公告)日：2011-11-29

申请号：US12682352

申请日：2008-10-10

申请人： Padmanava Sen ,  Saikat Sarkar ,  Stephane Pinel ,  Joy Laskar ,  Francesco Barale

发明人： Padmanava Sen ,  Saikat Sarkar ,  Stephane Pinel ,  Joy Laskar ,  Francesco Barale

IPC分类号： H03L7/00

CPC分类号： H03K23/483 ,  H03B5/1852 ,  H03B21/02 ,  H03J3/185 ,  H03L7/099 ,  H03L7/193 ,  H03L7/24

摘要： A voltage controlled oscillator-phase lock loop (VCO-PLL) system includes a voltage controlled oscillator (VCO) system implementing four-channel architecture, such that two bands support two channels; a phase-locked-loop (PLL) system; and a mixer system. The VCO system further includes a control circuit; a first cross-coupled oscillator system adapted to receive a source voltage; a second cross-coupled oscillator system adapted to receive the source voltage; and a plurality of isolation buffer systems adapted to protect the first and second cross-coupled oscillator systems.

摘要翻译： 压控振荡器锁相环（VCO-PLL）系统包括实施四通道架构的压控振荡器（VCO）系统，使得两个频带支持两个通道; 锁相环（PLL）系统; 和搅拌机系统。 VCO系统还包括控制电路; 适于接收源电压的第一交叉耦合振荡器系统; 适于接收源电压的第二交叉耦合振荡器系统; 以及适于保护第一和第二交叉耦合振荡器系统的多个隔离缓冲器系统。

公开(公告)号：US07864113B2

公开(公告)日：2011-01-04

申请号：US11394498

申请日：2006-03-31

申请人： Stephane Pinel ,  Joy Laskar

发明人： Stephane Pinel ,  Joy Laskar

IPC分类号： H01Q1/38

CPC分类号： H01P11/007 ,  H01P1/20327 ,  H01P1/2039 ,  H01P11/008 ,  H01Q1/38 ,  H01Q21/0006 ,  H01Q21/0087 ,  H01Q21/065 ,  H01Q21/08 ,  H01Q23/00 ,  Y10T29/49002 ,  Y10T29/49016 ,  Y10T29/4913 ,  Y10T29/49165 ,  Y10T156/10

摘要： A method of fabricating an ultra-high frequency module is disclosed. The method includes providing a top layer; drilling the top layer; milling the top layer; providing a bottom; milling the bottom layer to define a bottom layer cavity; aligning the top layer and the bottom layer; and adhering the top layer to the bottom layer. The present invention also includes an ultra-high frequency module operating at ultra-high speeds having a top layer, the top layer defining a top layer cavity; a bottom layer, the bottom layer defining a bottom layer cavity; and an adhesive adhering both the top layer to the bottom layer, wherein the top layer and the bottom layer are formed from a large area panel of a printed circuit board.

摘要翻译： 公开了一种制造超高频模块的方法。 该方法包括提供顶层; 钻顶层; 研磨顶层; 提供底部 研磨底层以限定底层腔; 对齐顶层和底层; 并将顶层粘附到底层。 本发明还包括以超高速运行的超高频模块，其具有顶层，顶层限定顶层空腔; 底层，底层限定底层空腔; 以及粘合上层到底层的粘合剂，其中顶层和底层由印刷电路板的大面积面板形成。

公开(公告)号：US07768252B2

公开(公告)日：2010-08-03

申请号：US12034570

申请日：2008-02-20

申请人： Jongmin Park ,  Kyutae Lim ,  Chang-Ho Lee ,  Haksun Kim ,  Joy Laskar

发明人： Jongmin Park ,  Kyutae Lim ,  Chang-Ho Lee ,  Haksun Kim ,  Joy Laskar

IPC分类号： G01R23/00

CPC分类号： H04W8/005 ,  H04W16/14 ,  H04W16/22

摘要： Systems and methods may be provided for threshold determinations for spectrum sensing. The systems and methods may include receiving a false alarm rate, where the false alarm rate is associated with false occupancy identifications of a spectrum segment, determining a noise floor as a function of a noise figure and characteristics of a multi-resolution spectrum sensing (MRSS) window, and calculating a sensing threshold based at least in part upon the false alarm rate and the noise floor. The systems and methods may also include determining whether a portion of an RF spectrum is occupied based at least in part on the calculated sensing threshold.

摘要翻译： 可以提供用于频谱感测的阈值确定的系统和方法。 系统和方法可以包括接收误报率，其中误报率与频谱段的假占用标识相关联，确定作为噪声系数和多分辨率频谱感测特性（MRSS）的函数的本底噪声 ）窗口，并且至少部分地基于所述误报率和所述本底噪声来计算感测阈值。 系统和方法还可以包括至少部分地基于所计算的感测阈值来确定RF频谱的一部分是否被占用。