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11 条记录 (耗时 0.018 秒)

    Fuel system vapor separator for an internal combustion engine
    1.
    发明授权
    Fuel system vapor separator for an internal combustion engine 失效
    用于内燃机的燃油系统蒸汽分离器

    公开(公告)号：US6012434A

    公开(公告)日：2000-01-11

    申请号：US119362

    申请日：1998-07-20

    申请人： David Hartke ,  Richard P. Kolb

    发明人： David Hartke ,  Richard P. Kolb

    IPC分类号： F02M31/20 ,  F02M37/20 ,  F02M37/04

    CPC分类号： F02M37/20 ,  F02M31/20 ,  Y02T10/126

    摘要： A fuel system vapor separator has an outer housing member with a generally cylindrical internal wall and has two open opposed ends. A generally cylindrical inner housing member is fitted within the outer housing member and defines a sealed space between the two housing members. The housing members are sealingly closed at both ends. An inlet introduces fuel into the central region of the inner housing member while another inlet introduces a coolant fluid into the space defined between the outer and inner housing members for cooling the fuel. A float operated valve vents out fuel vapor accumulating within the inner housing member. The housing members are formed by an extrusion process such that they can be cut to various lengths depending upon the desired size of the assembled vapor separator.

    摘要翻译： 燃料系统蒸气分离器具有外部壳体构件，其具有大致圆柱形的内壁并且具有两个敞开的相对端部。 大致圆柱形的内部壳体构件装配在外部壳体构件内并限定两个壳体构件之间的密封空间。 壳体两端密封地封闭。 入口将燃料引入内部壳体构件的中心区域，而另一个入口将冷却剂流体引入到限定在外部壳体构件和内部壳体构件之间的空间中，以冷却燃料。 浮动操作阀排出积聚在内壳体内的燃料蒸气。 壳体构件通过挤压工艺形成，使得它们可以根据所组装的蒸气分离器的所需尺寸而被切割成各种长度。

    Apparatus for overscribing binary data of a selected polarity into a semiconductor store
    4.
    发明授权
    Apparatus for overscribing binary data of a selected polarity into a semiconductor store 失效
    用于将选定极性的二进制数据超描绘成半导体存储器的装置

    公开(公告)号：US4162541A

    公开(公告)日：1979-07-24

    申请号：US769596

    申请日：1977-02-17

    申请人： David Hartke

    发明人： David Hartke

    IPC分类号： G09G5/42 ,  G11C5/02 ,  G11C7/00 ,  G11C8/00

    CPC分类号： G09G5/42

    摘要： Apparatus which reduces the cycle sequences of a buffer in order to meet high data merge rates by selective control of the chip enable inputs of a plurality of memory chips. During a write ones merge cycle, data patterns from a data-in register control the chip enable inputs of the memory chips and, simultaneously, a common data input line connected to the memory chips is held at logic one. After allowing sufficient time for address decoding of selected memory chips, a common memory write line of the memory chips is enabled to write ones into the selected words of the selected memory chips, while all the other memory chips are undisturbed since their chip enable inputs have not been activated.

    摘要翻译： 减少缓冲器的循环序列以便通过选择性地控制多个存储器芯片的芯片使能输入以满足高数据合并率的装置。 在写入合并周期期间，来自数据输入寄存器的数据模式控制芯片使能存储器芯片的使能输入，同时，连接到存储器芯片的公共数据输入线保持逻辑1。 在允许足够的时间进行所选择的存储器芯片的地址解码之后，存储器芯片的公共存储器写入线能够将其写入所选择的存储器芯片的所选择的字中，而所有其他存储器芯片都不受干扰，因为它们的芯片使能输入具有 未激活

    Inter-circuit encapsulated packaging for power delivery
    6.
    发明授权
    Inter-circuit encapsulated packaging for power delivery 失效
    用于电力输送的电路间封装封装

    公开(公告)号：US06356448B1

    公开(公告)日：2002-03-12

    申请号：US09432878

    申请日：1999-11-02

    申请人： Joseph Ted DiBene, II ,  David Hartke

    发明人： Joseph Ted DiBene, II ,  David Hartke

    IPC分类号： H05K720

    CPC分类号： G06F1/18 ,  G06F1/182 ,  G06F1/189 ,  H01L2924/15192 ,  H01R4/64 ,  H01R12/52 ,  H05K1/0263 ,  H05K1/141 ,  H05K1/144 ,  H05K3/368 ,  H05K7/1092 ,  H05K2201/10325 ,  H05K2201/10598 ,  H05K2201/10704 ,  H05K2201/2036

    摘要： An encapsulated circuit assembly and methods for making an encapsulated circuit assembly for power delivery are disclosed. The assembly comprises a first printed circuit board, a second printed circuit board, and a mechanical coupler. The mechanical coupler is coupled between the first printed circuit board and the second printed circuit board and disposed between the first printed circuit board and the second printed circuit board. The mechanical coupler provides substantial electrical continuity between a trace on the first printed circuit board and a trace on the second printed circuit board.

    摘要翻译： 公开了一种封装电路组件和用于制造用于电力输送的封装电路组件的方法。 组件包括第一印刷电路板，第二印刷电路板和机械耦合器。 机械耦合器耦合在第一印刷电路板和第二印刷电路板之间并且设置在第一印刷电路板和第二印刷电路板之间。 机械耦合器在第一印刷电路板上的迹线和第二印刷电路板上的迹线之间提供实质的电连续性。

    Fax processor
    7.
    发明授权
    Fax processor 失效
    传真处理器

    公开(公告)号：US4149145A

    公开(公告)日：1979-04-10

    申请号：US769595

    申请日：1977-02-17

    申请人： David Hartke ,  Warren M. Sterling

    发明人： David Hartke ,  Warren M. Sterling

    IPC分类号： G09G5/42 ,  H04N1/415 ,  H04N1/417 ,  G06F3/14

    CPC分类号： H04N1/4175 ,  G09G5/42 ,  H04N1/415

    摘要： An autonomous processor for displaying on a video tube both text characters and facsimile data. To conserve memory space the facsimile data is stored in compressed form and is decompressed or unfolded in synchronism with the vertical and horizontal deflections in the video tube. Similarly the text characters are stored in coded form, together with interspaced commands, both inscribed in a list memory. Each character code in the list then selects an appropriate dot matrix from a font memory which also contains displacement data. Selected lines of the font dot matrices are then addressed by row coordinates to form a horizontal video signal, which is accumulated in a ping pong buffer concurrently unloading into a video register. This same video register merges the facsimile data which is concurrently unfolded.

    摘要翻译： 一种用于在视频管上显示文本字符和传真数据的自主处理器。 为了节省存储空间，传真数据以压缩形式存储，并与视频管中的垂直和水平偏转同步地解压缩或展开。 类似地，文本字符以编码形式存储，以及间隔的命令，两者都记录在列表存储器中。 列表中的每个字符代码然后从也包含位移数据的字体存储器中选择适当的点阵。 然后通过行坐标寻址字体点阵的所选行以形成水平视频信号，该水平视频信号被累积在同时卸载到视频寄存器中的乒乓缓冲器中。 同一视频寄存器合并同时展开的传真数据。

    Autonomous display processor
    9.
    发明授权
    Autonomous display processor 失效
    自主显示处理器

    公开(公告)号：US4115765A

    公开(公告)日：1978-09-19

    申请号：US769597

    申请日：1977-02-17

    申请人： David Hartke

    发明人： David Hartke

    IPC分类号： G09G5/42 ,  G06F3/14

    CPC分类号： G09G5/42

    摘要： An autonomous processor for displaying on a video tube both text characters and facsimile data. To conserve memory space the facsimile data is stored in compressed form and is decompressed or unfolded in synchronism with the vertical and horizontal deflections in the video tube. Similarly the text characters are stored in coded form, together with interspaced commands, both inscribed in a list memory. Each character code in the list then selects an appropriate dot matrix from a font memory which also contains displacement data. Selected lines of the font dot matrices are then addressed by row coordinates to form a horizontal video signal, which is accumulated in a ping pong buffer concurrently unloading into a video register. This same video register merges the facsimile data which is concurrently unfolded.

    摘要翻译： 一种用于在视频管上显示文本字符和传真数据的自主处理器。 为了节省存储空间，传真数据以压缩形式存储，并与视频管中的垂直和水平偏转同步地解压缩或展开。 类似地，文本字符以编码形式存储，以及间隔的命令，两者都记录在列表存储器中。 列表中的每个字符代码然后从也包含位移数据的字体存储器中选择适当的点阵。 然后通过行坐标寻址字体点阵的所选行以形成水平视频信号，该水平视频信号被累积在同时卸载到视频寄存器中的乒乓缓冲器中。 同一视频寄存器合并同时展开的传真数据。

    Soft display word processing system with multiple autonomous processors
    10.
    发明授权
    Soft display word processing system with multiple autonomous processors 失效
    具有多个自主处理器的软显示文字处理系统

    公开(公告)号：US4110823A

    公开(公告)日：1978-08-29

    申请号：US769594

    申请日：1977-02-17

    申请人： David Cronshaw ,  Jack E. Shemer ,  William D. Turner ,  David Hartke ,  James R. Keddy ,  Wilbur E. DuVall ,  Warren M. Sterling

    发明人： David Cronshaw ,  Jack E. Shemer ,  William D. Turner ,  David Hartke ,  James R. Keddy ,  Wilbur E. DuVall ,  Warren M. Sterling

    IPC分类号： G06F17/21 ,  G06F15/20 ,  G06F3/14 ,  G06F13/00

    CPC分类号： G06F17/21

    摘要： A distributed function processing system utilizing a conventional microprocessor operated as a text processor in combination with a plurality of other autonomous processing devices arranged to operate in a coherent processing system. One of the autonomous processors which is a memory control processor serves to periodically overlay a random access accelerator memory with the contents of a main memory system and concurrently resolves conflicts among various other autonomous memory service requests. This processor, therefore, accommodates the data rates of the main memory. The other processor is a display processor which generates signals to a video display system to provide a visual interface to the user and is therefore tied to the video rate. Accordingly, the processing burden is distributed within processors entailing differing rates operating autonomously. The memory control processor resolves and accommodates all of the memory service requests in the system and also performs control operations to support high speed I/O devices. Logic is provided to handle the other interrupts. Also, there is page mapping for context switching of a reference page and repeating logic for decoupling this processor from the other processors. This arrangement allows convenient expansion into plural work stations each sharing a common memory.

    摘要翻译： 一种分布式功能处理系统，其利用作为文本处理器操作的常规微处理器与多个其它自主处理装置相结合，被配置为在相干处理系统中操作。 作为存储器控制处理器的自主处理器之一用于周期性地将随机访问加速器存储器与主存储器系统的内容重叠，并且同时解决各种其他自主存储器服务请求之间的冲突。 因此，该处理器适应主存储器的数据速率。 另一个处理器是向视频显示系统产生信号以向用户提供可视界面并因此与视频速率相关联的显示处理器。 因此，处理负担分配在处理器中，这些处理器需要自主操作的不同速率。 存储器控制处理器解决并容纳系统中的所有存储器服务请求，并且还执行控制操作以支持高速I / O设备。 提供逻辑来处理其他中断。 此外，存在用于参考页面的上下文切换的页面映射和用于将该处理器与其他处理器分离的重复逻辑。 这种布置允许方便地扩展到共享共同存储器的多个工作站。