摘要:
A methodology for producing an edge aligned implant beneath an electrode with reduced lateral spread, comprising the steps of: providing a dielectric layer on a substrate; forming an etch-stop layer on the dielectric layer; forming a sacrificial material layer on the etch-stop layer; patterning the sacrificial layer with openings to expose the etch-stop layer and which openings corresponding to gate electrode positions; implanting dopant atoms through the opening into the substrate in regions adjacent to at least one edge of the opening in the sacrificial layer; depositing electrode material into the openings and onto the sacrificial layer; forming an electrode layer, either by itself of with another layer deposited or grown over it to allow alteration to provide an etch rate differential. The material that etches relatively slowly becomes or protects the gate electrode region. The alteration is done by a process such as diffusion or irradiation.
摘要:
There is disclosed a process particularly suited for making CCD's. The process comprises the steps of(a) depositing a layer of conductive material above a semiconductor substrate;(b) forming a patterned mask above the conductive layer, the pattern exposing spaced-apart strip portions of the conductive layer;(c) ion-implanting dopant strips into the substrate through the conductive layer strip portions exposed by the patterned mask;(d) removing a portion of the mask but retaining the rest so as to expose the conductive layer over first portions of the substrate that contain an implanted dopant strip and over portions of the substrate adjacent to the first portions;(e) forming on the conductive layer between the retained mask portions, and above the implanted dopant strips, strips of a material resistant to an etchant for the conductive material;(f) removing the retained mask portions; and(g) etching away the conductive layer where the latter is not covered with the etchant-resistant material so as to leave conductive strips overlying the implanted strips.
摘要:
A method and apparatus of making high energy implanted photodiode that is self aligned with the transfer gate, the high energy implant is defined by providing a substrate, or well, of a first conductivity type, defining a charge coupled device within the substrate, or well, such that gate electrode layers are allowed to exist over areas to contain photodiodes during construction of the charge coupled device, patterning a masking layer to block high energy implants such that openings in the masking layer are formed over the areas of the photodiodes, anisotropically etching down through the gate electrode over the photodiodes to the gate dielectric material, implanting photodiodes with high-energy ions of a second conductivity type opposite the first conductivity type and creating a pinned photodiode by employing a shallow implant of the first conductivity type. The apparatus made by this method yields a photodiode employing high energy ions to form the P/N junction that is self aligned with the transfer gate.
摘要:
A fully self-aligned, charge coupled device (CCD) comprises a semiconductor substrate having implanted barrier and/or storage regions, an insulating dielectric layer disposed over the substrate, a first layer of closely spaced electrodes in self-alignment with at least one implant underneath the first electrodes, a second layer of closely spaced electrodes in self-alignment with the first electrodes and with at least one implant underneath the second electrodes also in self-alignment with the first electrodes. The process for fabricating the fully self-aligned CCD comprises the steps of first forming upon the semiconductive substrate, a uniform insulating dielectric layer; then forming a sacrificial layer upon the dielectric layer, the sacrificial layer patterned by removal of selected portions of the layer, at least one edge of the patterned sacrificial layer serving as a mask for ion implantation into the semiconductor substrate, the mask optionally comprising also photoresist; then forming in only those regions in which the sacrificial layer was removed, a first gate electrode; then removing the sacrificial layer, thereby exposing the sidewalls of the closely spaced first gate electrode, at least one of the sidewalls serving as a mask for a second ion implantation into the semiconductor substrate, the mask optionally comprising also photoresist; then forming a first oxide layer over the exposed surface of the first gate electrode; then depositing and patterning a second gate electrode layer to form a second gate electrode disposed between portions of the first gate electrode.
摘要:
A process is disclosed of preparing a charge coupled device containing charge transfer direction biasing implants wherein the steps and materials for patterning electrodes and implants promote accurate edge alignments of implants and electrodes while minimizing strains and avoiding temperatures that permit unwanted lattice or intersticial ion migration in the semiconductive substrate.
摘要:
A fully self-aligned, charge coupled device (CCD) comprises a semiconductor substrate having implanted barrier and/or storage regions, an insulating dielectric layer disposed over the substrate, a first layer of closely spaced electrodes in self-alignment with at least one implant underneath the first electrodes, a second layer of closely spaced electrodes in self-alignment with the first electrodes and with at least one implant underneath the second electrodes also in self-alignment with the first electrodes. The process for fabricating the fully self-aligned CCD comprises the steps of first forming upon the semiconductive substrate, a uniform insulating dielectric layer; then forming a sacrificial layer upon the dielectric layer, the sacrificial layer patterned by removal of selected portions of the layer, at least one edge of the patterned sacrificial layer serving as a mask for ion implantation into the semiconductor substrate, the mask optionally comprising also photoresist; then forming in only those regions in which the sacrificial layer was removed, a first gate electrode; then removing the sacrificial layer, thereby exposing the sidewalls of the closely spaced first gate electrode, at least one of the sidewalls serving as a mask for a second ion implantation into the semiconductor substrate, the mask optionally comprising also photoresist; then forming a first oxide layer over the exposed surface of the first gate electrode; then depositing and patterning a second gate electrode layer to form a second gate electrode disposed between portions of the first gate electrode.
摘要:
An interline transfer type image sensing device that can be operated at high speed and with low image smear is described. The device incorporates a refractory metal layer which is used for both a light shield over the vertical charge transfer region and as a wiring layer for low resistance strapping of poly crystalline silicon (polysilicon) gate electrodes for the vertical charge transfer region. Plugs provided by a separate metallization layer connect the refractory light shield to the polysilicon gate electrode. These plugs allow high temperature processing after refractory light shield patterning for improved sensor performance without degradation of the polysilicon gate electrode or the refractory lightshield layer.
摘要:
A method of making a color filter array on a first substrate having an array of pixels, comprising the steps of: depositing and patterning a photoresist layer on the substrate layer to form selected openings over pixels in the array; providing a transferable colorant layer on a second substrate and positioning such transferable layer in transferable relationship with the first substrate; transferring the colorant material to the photoresist layer on the first substrate, removing the patterned photoresist layer by chemical mechanical polishing, leaving behind the colorant material in the position of the openings over the selected pixels.
摘要:
An interline transfer type image sensing device that can be operated at high speed and with low image smear is described. The device incorporates a refractory metal layer which is used for both a light shield over the vertical charge transfer region and as a wiring layer for low resistance strapping of poly crystalline silicon (polysilicon) gate electrodes for the vertical charge transfer region. Plugs provided by a separate metallization layer connect the refractory light shield to the polysilicon gate electrode. These plugs allow high temperature processing after refractory light shield patterning for improved sensor performance without degradation of the polysilicon gate electrode or the refractory lightshield layer.
摘要:
An image sensor including CCDs, a charge coupled device (CCD) or shift register. Each CCD structure is formed of a set of electrodes wherein at least one electrode of each set is formed of a connected layer of opaque conducting material.