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公开(公告)号：US07002166B2
公开(公告)日：2006-02-21
申请号：US10484647
申请日：2002-08-27
申请人： David Norman Jamieson , Steven Prawer , Andrew Steven Dzurak , Robert Graham Clark , Changyi Yang
发明人： David Norman Jamieson , Steven Prawer , Andrew Steven Dzurak , Robert Graham Clark , Changyi Yang
IPC分类号： H01L21/265 , H01L31/115 , H01J37/304 , G06N1/00 , G01T1/00
CPC分类号： H01J37/08 , B82Y10/00 , B82Y40/00 , G06N99/002 , H01J37/20 , H01J37/244 , H01J37/3171 , H01J37/3174 , H01J2237/08 , H01J2237/20228 , H01J2237/20292 , H01J2237/31703 , H01J2237/31711 , H01J2237/31713 , H01J2237/31755 , H01J2237/31788 , H01L21/265 , H01L21/26513
摘要： This invention concerns a method and system for single ion doping and machining by detecting the impact, penetration and stopping of single ions in a substrate. Such detection is essential for the successful implantation of a counted number of 31P ions into a semi-conductor substrate for construction of a Kane quantum computer. The invention particularly concerns the application of a potential across two electrodes on the surface of the substrate to create a field to separate and sweep out electron-hole pairs formed within the substrate. A detector is then used to detecting transient current in the electrodes, and so determine the arrival of a single ion in the substrate.
摘要翻译： 本发明涉及通过检测衬底中单一离子的冲击，穿透和停止来进行单离子掺杂和机械加工的方法和系统。 这种检测对于将数量为“31”的P离子成功地注入到用于构建Kane量子计算机的半导体衬底中是必不可少的。 本发明特别涉及在衬底的表面上跨两个电极施加电位以产生分离和扫除在衬底内形成的电子 - 空穴对的场。 然后使用检测器来检测电极中的瞬态电流，并且因此确定单个离子到达衬底中。
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公开(公告)号：US07755078B2
公开(公告)日：2010-07-13
申请号：US12157757
申请日：2008-06-13
IPC分类号： H01L31/00
CPC分类号： H01L29/7613 , B82Y10/00 , H01L29/122 , H01L2924/0002 , Y10S977/774 , H01L2924/00
摘要： A silicon integrated circuit device comprising a near intrinsic silicon substrate in which there are one or more ohmic contact regions. An insulating layer lies above the substrate, and on top of the insulating layer is a lower layer of one or more aluminium gates. The surface of each of the lower gates is oxidised to insulate them from an upper aluminium gate that extends over the lower gates.
摘要翻译： 一种硅集成电路器件，包括其中存在一个或多个欧姆接触区域的近本征硅衬底。 绝缘层位于衬底上方，绝缘层顶部是一个或多个铝门的下层。 每个下门的表面被氧化以将它们与在下门上延伸的上铝门绝缘。
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公开(公告)号：US07732804B2
公开(公告)日：2010-06-08
申请号：US10524951
申请日：2003-08-20
申请人： Lloyd Christopher Leonard Hollenberg , Andrew Steven Dzurak , Cameron Wellard , Alexander Rudolf Hamilton , David J. Reilly , Gerard J. Milburn , Robert Graham Clark
发明人： Lloyd Christopher Leonard Hollenberg , Andrew Steven Dzurak , Cameron Wellard , Alexander Rudolf Hamilton , David J. Reilly , Gerard J. Milburn , Robert Graham Clark
IPC分类号： H01L31/00
CPC分类号： G06N99/002 , B82Y10/00 , Y10S977/933
摘要： Ionisation of one of a pair of dopant atoms in a substrate creates a double well potential, and a charge qubit is realised by the location of one or more electrons or holes within this potential. The dopant atoms may comprise phosphorous atoms, located in a silicon substrate. A solid state quantum computer may be formed using a plurality of pairs of dopant atoms, corresponding gate electrodes, and read-out devices comprising single electron transistors.
摘要翻译： 在衬底中的一对掺杂剂原子之一的电离产生双阱电位，并且通过在该电位内的一个或多个电子或空穴的位置来实现电荷量子位。 掺杂剂原子可以包含位于硅衬底中的磷原子。 可以使用多对掺杂剂原子，对应的栅电极和包括单电子晶体管的读出器件来形成固态量子计算机。
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公开(公告)号：US08148715B2
公开(公告)日：2012-04-03
申请号：US12660085
申请日：2010-02-19
申请人： Lloyd Christopher Leonard Hollenberg , Andrew Steven Dzurak , Cameron Wellard , Alexander Rudolf Hamilton , David J. Reilly , Gerard J. Milburn , Robert Graham Clark
发明人： Lloyd Christopher Leonard Hollenberg , Andrew Steven Dzurak , Cameron Wellard , Alexander Rudolf Hamilton , David J. Reilly , Gerard J. Milburn , Robert Graham Clark
IPC分类号： H01L31/00
CPC分类号： G06N99/002 , B82Y10/00 , Y10S977/933
摘要： This invention concerns a quantum device, suitable for quantum computing, based on dopant atoms located in a solid semiconductor or insulator substrate. In further aspects the device is scaled up. The invention also concerns methods of reading out from the devices, initializing them, using them to perform logic operations and making them.
摘要翻译： 本发明涉及一种基于位于固体半导体或绝缘体衬底中的掺杂剂原子的适用于量子计算的量子器件。 在另外的方面，设备被放大。 本发明还涉及从设备读出初始化它们的方法，使用它们来执行逻辑操作并使它们成为可能。
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公开(公告)号：US07911265B2
公开(公告)日：2011-03-22
申请号：US12012578
申请日：2008-02-04
IPC分类号： H01L25/00
CPC分类号： H03K3/38 , H01L2924/0002 , H01L2924/00
摘要： This invention concerns interfacing to electronic circuits or systems operating at low temperature or ultra-low temperature using complementary metal-oxide semiconductor (CMOS) technology. Low temperature in this case refers to cryogenic temperatures in particular, but not exclusively, to the 4.2 K region. Ultra-low temperatures here refers to the sub-1 K range, usually accessed using dilution refrigerator systems. The electronic circuits comprise a controller (for writing and manipulation), an observer (for readout and measurement) circuits, or both, fabricated from ultra-thin silicon-on-insulator (SOI) CMOS technology.
摘要翻译： 本发明涉及使用互补金属氧化物半导体（CMOS）技术与在低温或超低温下工作的电子电路或系统的接口。 在这种情况下，低温是指低温，特别是低温，但并不排他地指向4.2K区域。 这里的超低温是指通常使用稀释冰箱系统访问的1K范围。 电子电路包括由超薄绝缘体上硅（SOI）CMOS技术制成的控制器（用于写入和操纵），观察器（用于读出和测量）电路或两者。
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公开(公告)号：US20080297230A1
公开(公告)日：2008-12-04
申请号：US12012578
申请日：2008-02-04
IPC分类号： H03K3/38
CPC分类号： H03K3/38 , H01L2924/0002 , H01L2924/00
摘要： This invention concerns interfacing to electronic circuits or systems operating at low temperature or ultra-low temperature using complementary metal-oxide semiconductor (CMOS) technology. Low temperature in this case refers to cryogenic temperatures in particular, but not exclusively, to the 4.2 K region. Ultra-low temperatures here refers to the sub-1 K range, usually accessed using dilution refrigerator systems. The electronic circuits comprise a controller (for writing and manipulation), an observer (for readout and measurement) circuits, or both, fabricated from ultra-thin silicon-on-insulator (SOI) CMOS technology.
摘要翻译： 本发明涉及使用互补金属氧化物半导体（CMOS）技术与在低温或超低温下工作的电子电路或系统的接口。 在这种情况下，低温是指低温，特别是低温，但并不排他地指向4.2K区域。 这里的超低温是指通常使用稀释冰箱系统访问的1K范围。 电子电路包括由超薄绝缘体上硅（SOI）CMOS技术制成的控制器（用于写入和操纵），观察器（用于读出和测量）电路或两者。
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公开(公告)号：US20110049475A1
公开(公告)日：2011-03-03
申请号：US12660085
申请日：2010-02-19
申请人： Lloyd Christopher Leonard Hollenberg , Andrew Steven Dzurak , Cameron Wellard , Alexander Rudolf Hamilton , David J. Reilly , Gerard J. Milburn , Robert Graham Clark
发明人： Lloyd Christopher Leonard Hollenberg , Andrew Steven Dzurak , Cameron Wellard , Alexander Rudolf Hamilton , David J. Reilly , Gerard J. Milburn , Robert Graham Clark
IPC分类号： H01L49/00
CPC分类号： G06N99/002 , B82Y10/00 , Y10S977/933
摘要： This invention concerns a quantum device, suitable for quantum computing, based on dopant atoms located in a solid semiconductor or insulator substrate. In further aspects the device is scaled up. The invention also concerns methods of reading out from the devices, initializing them, using them to perform logic operations and making them.
摘要翻译： 本发明涉及一种基于位于固体半导体或绝缘体衬底中的掺杂剂原子的适用于量子计算的量子器件。 在另外的方面，设备被放大。 本发明还涉及从设备读出初始化它们的方法，使用它们来执行逻辑操作并使它们成为可能。
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公开(公告)号：US20090309229A1
公开(公告)日：2009-12-17
申请号：US12157757
申请日：2008-06-13
CPC分类号： H01L29/7613 , B82Y10/00 , H01L29/122 , H01L2924/0002 , Y10S977/774 , H01L2924/00
摘要： A silicon integrated circuit device comprising a near intrinsic silicon substrate in which there are one or more ohmic contact regions. An insulating layer lies above the substrate, and on top of the insulating layer is a lower layer of one or more aluminium gates. The surface of each of the lower gates is oxidised to insulate them from an upper aluminium gate that extends over the lower gates.
摘要翻译： 一种硅集成电路器件，包括其中存在一个或多个欧姆接触区域的近本征硅衬底。 绝缘层位于衬底上方，绝缘层顶部是一个或多个铝门的下层。 每个下门的表面被氧化以将它们与在下门上延伸的上铝门绝缘。
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公开(公告)号：US07176066B2
公开(公告)日：2007-02-13
申请号：US11132851
申请日：2005-05-19
申请人： Rolf Brenner , Tilo Marcus Buehler , Robert Graham Clark , Andrew Steven Dzurak , Alexander Rudolf Hamilton , Nancy Ellen Lumpkin , Rita Paytricia McKinnon
发明人： Rolf Brenner , Tilo Marcus Buehler , Robert Graham Clark , Andrew Steven Dzurak , Alexander Rudolf Hamilton , Nancy Ellen Lumpkin , Rita Paytricia McKinnon
IPC分类号： H01L21/20 , H01L21/335 , H01L21/425
CPC分类号： G06N99/002 , B82Y10/00 , H01L21/266 , H01L29/66439 , H01L49/006
摘要： A silicon substrate is coated with one or more layers of resist. First and second circuit patterns are exposed in sequence, where the second pattern crosses the first pattern. The patterned resist layers are developed to open holes which extend down to the substrate only where the patterns cross over each other. These holes provide a mask suitable for implanting single phosphorous ions in the substrate, for a solid state quantum computer. Further development of the resist layers provides a mask for the deposition of nanoelectronic circuits, such as single electron transistors, aligned to the phosphorous ions.
摘要翻译： 硅衬底涂覆有一层或多层抗蚀剂。 顺序地暴露第一和第二电路图案，其中第二图案与第一图案交叉。 图案化的抗蚀剂层被显影以打开仅在图案彼此交叉的位置向下延伸到基底的孔。 这些孔提供了适用于在固态量子计算机中将衬底中的单个磷离子注入的掩模。 抗蚀剂层的进一步开发提供了用于沉积与磷离子对准的纳米电子电路（例如单电子晶体管）的掩模。
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公开(公告)号：US07061008B2
公开(公告)日：2006-06-13
申请号：US10362821
申请日：2001-08-24
申请人： Robert Graham Clark , Andrew Steven Dzurak , Steven Richard Schofield , Michelle Yvonne Simmons , Jeremy Lloyd O'Brien
发明人： Robert Graham Clark , Andrew Steven Dzurak , Steven Richard Schofield , Michelle Yvonne Simmons , Jeremy Lloyd O'Brien
IPC分类号： H01L29/06 , H01L31/0328 , H01L31/0336 , H01L31/072 , H01L31/109
CPC分类号： G06N99/002 , G01Q80/00 , H01L21/306
摘要： Individual hydrogen atoms are desorbed from a hydrogen terminated layer on a silicon substrate, using an STM tip, to form a pattern of exposed regions. A single donor-bearing molecule (such as phosphorous atoms). The spins of the donor atoms may be used as qubits in a slid quantum computer.
摘要翻译： 使用STM尖端，将单个氢原子从硅衬底上的氢终止层解吸，形成暴露区域的图案。 单个供体分子（如磷原子）。 供体原子的自旋可以用作滑动量子计算机中的量子位。
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