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    METHODS OF MANUFACTURING LIGHT EMITTING DIODES INCLUDING BARRIER LAYERS/SUBLAYERS
    1.
    发明申请
    METHODS OF MANUFACTURING LIGHT EMITTING DIODES INCLUDING BARRIER LAYERS/SUBLAYERS 有权
    制造发光二极体的方法，包括障碍层/子层

    公开(公告)号：US20070161137A1

    公开(公告)日：2007-07-12

    申请号：US11688605

    申请日：2007-03-20

    申请人： David Slater ,  Bradley Williams ,  Peter Andrews ,  John Edmond ,  Scott Allen

    发明人： David Slater ,  Bradley Williams ,  Peter Andrews ,  John Edmond ,  Scott Allen

    IPC分类号： H01L21/00

    CPC分类号： H01L33/60 ,  H01L33/20 ,  H01L33/32 ,  H01L33/405 ,  H01L33/44 ,  H01L33/62 ,  H01L2924/0002 ,  H01L2924/01057 ,  H01L2924/12041 ,  H01L2924/00

    摘要： Semiconductor light emitting devices, such as light emitting diodes, include a substrate, an epitaxial region on the substrate that includes a light emitting region such as a light emitting diode region, and a multilayer conductive stack including a reflector layer, on the epitaxial region. A barrier layer is provided on the reflector layer and extending on a sidewall of the reflector layer. The multilayer conductive stack can also include an ohmic layer between the reflector and the epitaxial region. The barrier layer further extends on a sidewall of the ohmic layer. The barrier layer can also extend onto the epitaxial region outside the multilayer conductive stack. The barrier layer can be fabricated as a series of alternating first and second sublayers.

    摘要翻译： 诸如发光二极管的半导体发光器件包括衬底，在衬底上的包括诸如发光二极管区域的发光区域的外延区域和在外延区域上包括反射器层的多层导电堆叠。 阻挡层设置在反射器层上并在反射器层的侧壁上延伸。 多层导电叠层还可以包括在反射器和外延区之间的欧姆层。 阻挡层进一步在欧姆层的侧壁上延伸。 阻挡层还可以延伸到多层导电叠层外的外延区域上。 阻挡层可以制成一系列交替的第一和第二子层。

    LIGHT EMITTING DEVICES SUITABLE FOR FLIP-CHIP BONDING
    3.
    发明申请
    LIGHT EMITTING DEVICES SUITABLE FOR FLIP-CHIP BONDING 有权
    适用于片芯接合的发光装置

    公开(公告)号：US20070241360A1

    公开(公告)日：2007-10-18

    申请号：US11772419

    申请日：2007-07-02

    申请人： David Slater, Jr. ,  Jayesh Bharathan ,  John Edmond ,  Mark Raffetto ,  Anwar Mohammed ,  Peter Andrews ,  Gerald Negley

    发明人： David Slater, Jr. ,  Jayesh Bharathan ,  John Edmond ,  Mark Raffetto ,  Anwar Mohammed ,  Peter Andrews ,  Gerald Negley

    IPC分类号： H01L33/00

    CPC分类号： H01L33/62 ,  H01L33/38 ,  H01L2224/04026 ,  H01L2224/26175 ,  H01L2224/291 ,  H01L2224/32245 ,  H01L2224/48463 ,  H01L2224/73265 ,  H01L2924/01057 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/12032 ,  H01L2924/12041 ,  H01L2924/00014 ,  H01L2924/014 ,  H01L2924/00

    摘要： Light emitting device die having a mesa configuration on a substrate and an electrode on the mesa are attached to a submount in a flip-chip configuration by forming predefined pattern of conductive die attach material on at least one of the electrode and the submount and mounting the light emitting device die to the submount. The predefined pattern of conductive die attach material is selected so as to prevent the conductive die attach material from contacting regions of having opposite conductivity types when the light emitting device die is mounted to the submount. The predefined pattern of conductive die attach material may provide a volume of die attach material that is less than a volume defined by an area of the electrode and a distance between the electrode and the submount. Light emitting device dies having predefined patterns of conductive die attach material are also provided. Light emitting devices having a gallium nitride based light emitting region on a substrate, such as a silicon carbide substrate, may also be mounted in a flip-chip configuration by mounting an electrode of the gallium nitride based light emitting region to a submount utilizing a B-stage curable die epoxy. Light emitting device dies having a B-stage curable die epoxy are also provided.

    摘要翻译： 通过在电极和底座中的至少一个上形成预定图案的导电芯片附着材料，并将其安装在基板上，并将底板上的电极和底板上的电极的底板配置在倒装芯片结构的底座上， 发光器件死到底座。 选择导电芯片附着材料的预定图案，以便当发光器件裸片安装到底座时，防止导电芯片附着材料接触具有相反导电类型的区域。 导电芯片附接材料的预定图案可以提供小于由电极区域限定的体积以及电极和底座之间的距离的管芯附着材料的体积。 还提供具有预定图案的导电芯片附着材料的发光器件裸片。 在碳化硅基板等基板上具有氮化镓系发光区域的发光元件也可以通过将氮化镓系发光区域的电极安装在利用B的基板的倒装芯片配置中 级环氧树脂。 还提供了具有B级可固化模具环氧树脂的发光器件模具。

    Flip-chip bonding of light emitting devices
    4.
    发明申请
    Flip-chip bonding of light emitting devices 有权
    发光器件的倒装键合

    公开(公告)号：US20050017256A1

    公开(公告)日：2005-01-27

    申请号：US10920101

    申请日：2004-08-17

    申请人： David Slater ,  Jayesh Bharathan ,  John Edmond ,  Mark Raffeto ,  Anwar Mohammed ,  Peter Andrews ,  Gerald Negley

    发明人： David Slater ,  Jayesh Bharathan ,  John Edmond ,  Mark Raffeto ,  Anwar Mohammed ,  Peter Andrews ,  Gerald Negley

    IPC分类号： H01L21/60 ,  H01L33/20 ,  H01L33/40 ,  H01L33/62 ,  H01L23/48 ,  H01L21/00

    CPC分类号： H01L33/62 ,  H01L33/38 ,  H01L2224/04026 ,  H01L2224/26175 ,  H01L2224/291 ,  H01L2224/32245 ,  H01L2224/48463 ,  H01L2224/73265 ,  H01L2924/01057 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/12032 ,  H01L2924/12041 ,  H01L2924/00014 ,  H01L2924/014 ,  H01L2924/00

    摘要： Light emitting device die having a mesa configuration on a substrate and an electrode on the mesa are attached to a submount in a flip-chip configuration by forming predefined pattern of conductive die attach material on at least one of the electrode and the submount and mounting the light emitting device die to the submount. The predefined pattern of conductive die attach material is selected so as to prevent the conductive die attach material from contacting regions of having opposite conductivity types when the light emitting device die is mounted to the submount. The predefined pattern of conductive die attach material may provide a volume of die attach material that is less than a volume defined by an area of the electrode and a distance between the electrode and the submount. Light emitting device dies having predefined patterns of conductive die attach material are also provided. Light emitting devices having a gallium nitride based light emitting region on a substrate, such as a silicon carbide substrate, may also be mounted in a flip-chip configuration by mounting an electrode of the gallium nitride based light emitting region to a submount utilizing a B-stage curable die epoxy. Light emitting device dies having a B-stage curable die epoxy are also provided.

    摘要翻译： 通过在电极和底座中的至少一个上形成预定图案的导电芯片附着材料，并将其安装在基板上，并将底板上的电极和底板上的电极的底板配置在倒装芯片结构的底座上， 发光器件死到底座。 选择导电芯片附着材料的预定图案，以便当发光器件裸片安装到底座时，防止导电芯片附着材料接触具有相反导电类型的区域。 导电芯片附接材料的预定图案可以提供小于由电极区域限定的体积以及电极和底座之间的距离的管芯附着材料的体积。 还提供具有预定图案的导电芯片附着材料的发光器件裸片。 在碳化硅基板等基板上具有氮化镓系发光区域的发光元件也可以通过将氮化镓系发光区域的电极安装在利用B的基板的倒装芯片配置中 级环氧树脂。 还提供了具有B级可固化模具环氧树脂的发光器件模具。

    High efficiency group III nitride-silicon carbide light emitting diode
    5.
    发明申请
    High efficiency group III nitride-silicon carbide light emitting diode 有权
    高效率III族氮化硅 - 碳化硅发光二极管

    公开(公告)号：US20060060877A1

    公开(公告)日：2006-03-23

    申请号：US10951042

    申请日：2004-09-22

    申请人： John Edmond ,  Jayesh Bharathan ,  David Slater

    发明人： John Edmond ,  Jayesh Bharathan ,  David Slater

    IPC分类号： H01L33/00

    CPC分类号： H01L33/36 ,  H01L33/007

    摘要： A method and resulting structures are disclosed for fabricating a high efficiency high extraction light emitting diode suitable for packaging. The method includes the steps of adding a light emitting active portion of wide-bandgap semiconductor material to a conductive silicon carbide substrate, joining the added active portion to a conductive sub-mounting structure, and removing a portion of the silicon carbide substrate opposite the added active portion to thereby reduce the overall thickness of the joined substrate, active portion and sub-mounting structure. The resulting the sub-mounting structure can be joined to a lead frame with the active portion positioned between the silicon carbide substrate and the sub-mounting structure to thereby use the sub-mounting structure to separate the active portion from the lead frame and avoid undesired electrical contact between the active portion and the lead frame.

    摘要翻译： 公开了一种制造适用于包装的高效率高抽提发光二极管的方法和结果。 该方法包括以下步骤：将宽带隙半导体材料的发光有源部分添加到导电碳化硅基板，将添加的有源部分接合到导电子安装结构，并且将与添加的相邻的碳化硅基板相对的一部分 从而减小接合的基板，有源部分和副安装结构的整体厚度。 所得到的子安装结构可以连接到引线框架，其中有源部分位于碳化硅基板和子安装结构之间，从而使用子安装结构将有源部分与引线框架分开，并避免不必要的 有源部分和引线框架之间的电接触。

    LED fabrication via ion implant isolation
    9.
    发明申请
    LED fabrication via ion implant isolation 审中-公开
    通过离子注入隔离制造LED

    公开(公告)号：US20050194584A1

    公开(公告)日：2005-09-08

    申请号：US10987627

    申请日：2004-11-12

    申请人： David Slater ,  John Edmond ,  Alexander Suvorov ,  Iain Hamilton

    发明人： David Slater ,  John Edmond ,  Alexander Suvorov ,  Iain Hamilton

    IPC分类号： H01L29/06 ,  H01L31/0328

    CPC分类号： H01L21/2654 ,  H01L33/025 ,  H01L33/145 ,  H01L33/24 ,  H01L33/32 ,  H01L33/44 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/00

    摘要： A semiconductor light emitting diode includes a semiconductor substrate, an epitaxial layer of n-type Group III nitride on the substrate, a p-type epitaxial layer of Group III nitride on the n-type epitaxial layer and forming a p-n junction with the n-type layer, and a resistive gallium nitride region on the n-type epitaxial layer and adjacent the p-type epitaxial layer for electrically isolating portions of the p-n junction. A metal contact layer is formed on the p-type epitaxial layer. Some embodiments include a semiconductor substrate, an epitaxial layer of n-type Group III nitride on the substrate, a p-type epitaxial layer of Group III nitride on the n-type epitaxial layer and forming a p-n junction with the n-type layer, wherein portions of the epitaxial region are patterned into a mesa and wherein the sidewalls of the mesa comprise a resistive Group III nitride region for electrically isolating portions of the p-n junction. In method embodiments disclosed, the resistive border is formed by forming an implant mask on the p-type epitaxial region and implanting ions into portions of the p-type epitaxial region to render portions of the p-type epitaxial region semi-insulating. A photoresist mask or a sufficiently thick metal layer may be used as the implant mask. In some method embodiments, a mesa is formed in the epitaxial region prior to implantation. During implantation, the epiwafer is mounted at an angle such that ions are implanted directly into the sidewalls of the mesa, thereby rendering portions of the mesa semi-insulating. The epiwafer may be rotated during ion implantation.

    摘要翻译： 半导体发光二极管包括半导体衬底，衬底上的n型III族氮化物的外延层，n型外延层上的III族氮化物的p型外延层，并与n型外延层形成pn结， 型层和n型外延层上的电阻性氮化镓区，并且邻近p型外延层，用于电隔离pn结的部分。 在p型外延层上形成金属接触层。 一些实施例包括半导体衬底，衬底上的n型III族氮化物的外延层，n型外延层上的III族氮化物的p型外延层，并与n型层形成pn结， 其中所述外延区域的部分被图案化成台面，并且其中所述台面的侧壁包括用于电绝缘所述pn结的部分的电阻性III族氮化物区域。 在公开的方法实施例中，通过在p型外延区上形成注入掩模并将离子注入到p型外延区的一部分中以形成半绝缘的p型外延区的部分来形成电阻边界。 可以使用光致抗蚀剂掩模或足够厚的金属层作为植入物掩模。 在一些方法实施例中，在植入之前在外延区域中形成台面。 在植入期间，外延片安装成一定角度，使得离子直接注入到台面的侧壁中，从而使台面的部分半绝缘。 在离子注入期间，外延膜可以旋转。