公开(公告)号：US07183610B2

公开(公告)日：2007-02-27

申请号：US10836833

申请日：2004-04-30

申请人： Deva N. Pattanayak ,  Yuming Bai ,  Kyle Terrill ,  Christiana Yue ,  Robert Xu ,  Kam Hong Lui ,  Kuo-In Chen ,  Sharon Shi

发明人： Deva N. Pattanayak ,  Yuming Bai ,  Kyle Terrill ,  Christiana Yue ,  Robert Xu ,  Kam Hong Lui ,  Kuo-In Chen ,  Sharon Shi

IPC分类号： H01L29/76

CPC分类号： H01L29/7813 ,  H01L29/0696 ,  H01L29/407 ,  H01L29/41741 ,  H01L29/4236 ,  H01L29/42368 ,  H01L29/42376 ,  H01L29/4238 ,  H01L29/66734 ,  H01L29/7811

摘要： In a trench MOSFET, the lower portion of the trench contains a buried source electrode, which is insulated from the epitaxial layer and semiconductor substrate but in electrical contact with the source region. When the MOSFET is in an “off” condition, the bias of the buried source electrode causes the “drift” region of the mesa to become depleted, enhancing the ability of the MOSFET to block current. The doping concentration of the drift region can therefore be increased, reducing the on-resistance of the MOSFET. The buried source electrode also reduces the gate-to-drain capacitance of the MOSFET, improving the ability of the MOSFET to operate at high frequencies. The substrate may advantageously include a plurality of annular trenches separated by annular mesas and a gate metal layer that extends outward from a central region in a plurality of gate metal legs separated by source metal regions.

摘要翻译： 在沟槽MOSFET中，沟槽的下部包含与外延层和半导体衬底绝缘但与源极区域电接触的掩埋源电极。 当MOSFET处于“关闭”状态时，掩埋源电极的偏置导致台面的“漂移”区域耗尽，增强了MOSFET阻止电流的能力。 因此，可以增加漂移区的掺杂浓度，从而降低MOSFET的导通电阻。 埋入式源极还降低了MOSFET的栅 - 漏电容，提高了MOSFET在高频下的工作能力。 衬底可以有利地包括由环形台面分隔开的多个环形沟槽和从源极金属区域分开的多个栅极金属腿中的中心区域向外延伸的栅极金属层。

公开(公告)号：US20080182376A1

公开(公告)日：2008-07-31

申请号：US12080031

申请日：2008-03-31

申请人： Deva N. Pattanayak ,  Yuming Bai ,  Kyle Terrill ,  Christiana Yue ,  Robert Xu ,  Kam Hong Lui ,  Kuo-In Chen ,  Sharon Shi

发明人： Deva N. Pattanayak ,  Yuming Bai ,  Kyle Terrill ,  Christiana Yue ,  Robert Xu ,  Kam Hong Lui ,  Kuo-In Chen ,  Sharon Shi

IPC分类号： H01L21/336

CPC分类号： H01L29/7813 ,  H01L29/0696 ,  H01L29/407 ,  H01L29/41741 ,  H01L29/4236 ,  H01L29/42368 ,  H01L29/42376 ,  H01L29/4238 ,  H01L29/66734 ,  H01L29/7811

摘要： In a trench MOSFET, the lower portion of the trench contains a buried source electrode, which is insulated from the epitaxial layer and semiconductor substrate but in electrical contact with the source region. When the MOSFET is in an “off” condition, the bias of the buried source electrode causes the “drift” region of the mesa to become depleted, enhancing the ability of the MOSFET to block current. The doping concentration of the drift region can therefore be increased, reducing the on-resistance of the MOSFET. The buried source electrode also reduces the gate-to-drain capacitance of the MOSFET, improving the ability of the MOSFET to operate at high frequencies. The substrate may advantageously include a plurality of annular trenches separated by annular mesas and a gate metal layer that extends outward from a central region in a plurality of gate metal legs separated by source metal regions.

摘要翻译： 在沟槽MOSFET中，沟槽的下部包含与外延层和半导体衬底绝缘但与源极区域电接触的掩埋源电极。 当MOSFET处于“关闭”状态时，掩埋源电极的偏置导致台面的“漂移”区域耗尽，增强了MOSFET阻止电流的能力。 因此，可以增加漂移区的掺杂浓度，从而降低MOSFET的导通电阻。 埋入式源极还降低了MOSFET的栅 - 漏电容，提高了MOSFET在高频下的工作能力。 衬底可以有利地包括由环形台面分隔开的多个环形沟槽和从源极金属区域分开的多个栅极金属腿中的中心区域向外延伸的栅极金属层。

公开(公告)号：US07704836B2

公开(公告)日：2010-04-27

申请号：US12080031

申请日：2008-03-31

申请人： Deva N. Pattanayak ,  Yuming Bai ,  Kyle Terrill ,  Christiana Yue ,  Robert Xu ,  Kam Hong Lui ,  Kuo-In Chen ,  Sharon Shi

发明人： Deva N. Pattanayak ,  Yuming Bai ,  Kyle Terrill ,  Christiana Yue ,  Robert Xu ,  Kam Hong Lui ,  Kuo-In Chen ,  Sharon Shi

IPC分类号： H01L21/336

CPC分类号： H01L29/7813 ,  H01L29/0696 ,  H01L29/407 ,  H01L29/41741 ,  H01L29/4236 ,  H01L29/42368 ,  H01L29/42376 ,  H01L29/4238 ,  H01L29/66734 ,  H01L29/7811

摘要： In a trench MOSFET, the lower portion of the trench contains a buried source electrode, which is insulated from the epitaxial layer and semiconductor substrate but in electrical contact with the source region. When the MOSFET is in an “off” condition, the bias of the buried source electrode causes the “drift” region of the mesa to become depleted, enhancing the ability of the MOSFET to block current. The doping concentration of the drift region can therefore be increased, reducing the on-resistance of the MOSFET. The buried source electrode also reduces the gate-to-drain capacitance of the MOSFET, improving the ability of the MOSFET to operate at high frequencies. The substrate may advantageously include a plurality of annular trenches separated by annular mesas and a gate metal layer that extends outward from a central region in a plurality of gate metal legs separated by source metal regions.

摘要翻译： 在沟槽MOSFET中，沟槽的下部包含与外延层和半导体衬底绝缘但与源极区域电接触的掩埋源电极。 当MOSFET处于“关闭”状态时，掩埋源电极的偏置导致台面的“漂移”区域耗尽，增强了MOSFET阻止电流的能力。 因此，可以增加漂移区的掺杂浓度，从而降低MOSFET的导通电阻。 埋入式源极还降低了MOSFET的栅 - 漏电容，提高了MOSFET在高频下的工作能力。 衬底可以有利地包括由环形台面分隔开的多个环形沟槽和从源极金属区域分开的多个栅极金属腿中的中心区域向外延伸的栅极金属层。

公开(公告)号：US20100019316A1

公开(公告)日：2010-01-28

申请号：US12586906

申请日：2009-09-29

申请人： Deva N. Pattanayak ,  Yuming Bai ,  Kyle Terrill ,  Christiana Yue ,  Robert Xu ,  Kam Hong Lui ,  Kuo-In Chen ,  Sharon Shi

发明人： Deva N. Pattanayak ,  Yuming Bai ,  Kyle Terrill ,  Christiana Yue ,  Robert Xu ,  Kam Hong Lui ,  Kuo-In Chen ,  Sharon Shi

IPC分类号： H01L29/78

CPC分类号： H01L29/7813 ,  H01L29/0696 ,  H01L29/407 ,  H01L29/41741 ,  H01L29/4236 ,  H01L29/42368 ,  H01L29/42376 ,  H01L29/4238 ,  H01L29/66734 ,  H01L29/7811

摘要： A method of fabricating a trench MOSFET, the lower portion of the trench containing a buried source electrode which is insulated from the epitaxial layer and semiconductor substrate but in electrical contact with the source region. When the MOSFET is in an “off” condition, the bias of the buried source electrode causes the “drift” region of the mesa to become depleted, enhancing the ability of the MOSFET to block current. The doping concentration of the drift region can therefore be increased, reducing the on-resistance of the MOSFET. The buried source electrode also reduces the gate-to-drain capacitance of the MOSFET, improving the ability of the MOSFET to operate at high frequencies. The substrate may advantageously include a plurality of annular trenches separated by annular mesas and a gate metal layer that extends outward from a central region in a plurality of gate metal legs separated by source metal regions.

摘要翻译： 一种制造沟槽MOSFET的方法，沟槽的下部包含与外延层和半导体衬底绝缘但与源极区域电接触的掩埋源电极。 当MOSFET处于“关闭”状态时，掩埋源电极的偏置导致台面的“漂移”区域耗尽，增强了MOSFET阻止电流的能力。 因此，可以增加漂移区的掺杂浓度，从而降低MOSFET的导通电阻。 埋入式源极还降低了MOSFET的栅 - 漏电容，提高了MOSFET在高频下的工作能力。 衬底可以有利地包括由环形台面分隔开的多个环形沟槽和从源极金属区域分开的多个栅极金属腿中的中心区域向外延伸的栅极金属层。

公开(公告)号：US07557409B2

公开(公告)日：2009-07-07

申请号：US11698519

申请日：2007-01-26

申请人： Deva N. Pattanayak ,  Yuming Bai ,  Kyle Terrill ,  Christiana Yue ,  Robert Xu ,  Kam Hong Lui ,  Kuo-In Chen ,  Sharon Shi

发明人： Deva N. Pattanayak ,  Yuming Bai ,  Kyle Terrill ,  Christiana Yue ,  Robert Xu ,  Kam Hong Lui ,  Kuo-In Chen ,  Sharon Shi

IPC分类号： H01L29/76

CPC分类号： H01L29/7813 ,  H01L29/0696 ,  H01L29/407 ,  H01L29/41741 ,  H01L29/4236 ,  H01L29/42368 ,  H01L29/42376 ,  H01L29/4238 ,  H01L29/66734 ,  H01L29/7811

摘要： In a trench MOSFET, the lower portion of the trench contains a buried source electrode, which is insulated from the epitaxial layer and semiconductor substrate but in electrical contact with the source region. When the MOSFET is in an “off” condition, the bias of the buried source electrode causes the “drift” region of the mesa to become depleted, enhancing the ability of the MOSFET to block current. The doping concentration of the drift region can therefore be increased, reducing the on-resistance of the MOSFET. The buried source electrode also reduces the gate-to-drain capacitance of the MOSFET, improving the ability of the MOSFET to operate at high frequencies. The substrate may advantageously include a plurality of annular trenches separated by annular mesas and a gate metal layer that extends outward from a central region in a plurality of gate metal legs separated by source metal regions.

摘要翻译： 在沟槽MOSFET中，沟槽的下部包含与外延层和半导体衬底绝缘但与源极区域电接触的掩埋源电极。 当MOSFET处于“关闭”状态时，掩埋源电极的偏置导致台面的“漂移”区域耗尽，增强了MOSFET阻止电流的能力。 因此，可以增加漂移区的掺杂浓度，从而降低MOSFET的导通电阻。 埋入式源极还降低了MOSFET的栅 - 漏电容，提高了MOSFET在高频下的工作能力。 衬底可以有利地包括由环形台面分隔开的多个环形沟槽和从源极金属区域分开的多个栅极金属腿中的中心区域向外延伸的栅极金属层。

公开(公告)号：US20070187753A1

公开(公告)日：2007-08-16

申请号：US11698519

申请日：2007-01-26

申请人： Deva Pattanayak ,  Yuming Bai ,  Kyle Terrill ,  Christiana Yue ,  Robert Xu ,  Kam Lui ,  Kuo-In Chen ,  Sharon Shi

发明人： Deva Pattanayak ,  Yuming Bai ,  Kyle Terrill ,  Christiana Yue ,  Robert Xu ,  Kam Lui ,  Kuo-In Chen ,  Sharon Shi

IPC分类号： H01L29/94 ,  H01L21/336

CPC分类号： H01L29/7813 ,  H01L29/0696 ,  H01L29/407 ,  H01L29/41741 ,  H01L29/4236 ,  H01L29/42368 ,  H01L29/42376 ,  H01L29/4238 ,  H01L29/66734 ,  H01L29/7811

摘要： In a trench MOSFET, the lower portion of the trench contains a buried source electrode, which is insulated from the epitaxial layer and semiconductor substrate but in electrical contact with the source region. When the MOSFET is in an “off” condition, the bias of the buried source electrode causes the “drift” region of the mesa to become depleted, enhancing the ability of the MOSFET to block current. The doping concentration of the drift region can therefore be increased, reducing the on-resistance of the MOSFET. The buried source electrode also reduces the gate-to-drain capacitance of the MOSFET, improving the ability of the MOSFET to operate at high frequencies. The substrate may advantageously include a plurality of annular trenches separated by annular mesas and a gate metal layer that extends outward from a central region in a plurality of gate metal legs separated by source metal regions.

公开(公告)号：US20050242392A1

公开(公告)日：2005-11-03

申请号：US10836833

申请日：2004-04-30

申请人： Deva Pattanayak ,  Yuming Bai ,  Kyle Terrill ,  Christiana Yue ,  Robert Xu ,  Kam Lui ,  Kuo-In Chen ,  Sharon Shi

发明人： Deva Pattanayak ,  Yuming Bai ,  Kyle Terrill ,  Christiana Yue ,  Robert Xu ,  Kam Lui ,  Kuo-In Chen ,  Sharon Shi

IPC分类号： H01L21/336 ,  H01L29/06 ,  H01L29/40 ,  H01L29/417 ,  H01L29/423 ,  H01L29/78 ,  H01L29/94 ,  H01L21/8238

CPC分类号： H01L29/7813 ,  H01L29/0696 ,  H01L29/407 ,  H01L29/41741 ,  H01L29/4236 ,  H01L29/42368 ,  H01L29/42376 ,  H01L29/4238 ,  H01L29/66734 ,  H01L29/7811

摘要： In a trench MOSFET, the lower portion of the trench contains a buried source electrode, which is insulated from the epitaxial layer and semiconductor substrate but in electrical contact with the source region. When the MOSFET is in an “off” condition, the bias of the buried source electrode causes the “drift” region of the mesa to become depleted, enhancing the ability of the MOSFET to block current. The doping concentration of the drift region can therefore be increased, reducing the on-resistance of the MOSFET. The buried source electrode also reduces the gate-to-drain capacitance of the MOSFET, improving the ability of the MOSFET to operate at high frequencies. The substrate may advantageously include a plurality of annular trenches separated by annular mesas and a gate metal layer that extends outward from a central region in a plurality of gate metal legs separated by source metal regions.

摘要翻译： 在沟槽MOSFET中，沟槽的下部包含与外延层和半导体衬底绝缘但与源极区域电接触的掩埋源电极。 当MOSFET处于“关闭”状态时，掩埋源电极的偏置导致台面的“漂移”区域耗尽，增强了MOSFET阻止电流的能力。 因此，可以增加漂移区的掺杂浓度，从而降低MOSFET的导通电阻。 埋入式源极还降低了MOSFET的栅 - 漏电容，提高了MOSFET在高频下的工作能力。 衬底可以有利地包括由环形台面分隔开的多个环形沟槽和从源极金属区域分开的多个栅极金属腿中的中心区域向外延伸的栅极金属层。

公开(公告)号：US20110049682A1

公开(公告)日：2011-03-03

申请号：US12873147

申请日：2010-08-31

申请人： Hamilton Lu ,  The-Tu Chau ,  Kyle Terrill ,  Deva N. Pattanayak ,  Sharon Shi ,  Kuo-In Chen ,  Robert Xu

发明人： Hamilton Lu ,  The-Tu Chau ,  Kyle Terrill ,  Deva N. Pattanayak ,  Sharon Shi ,  Kuo-In Chen ,  Robert Xu

IPC分类号： H01L29/06 ,  H01L21/203 ,  H01L21/302

CPC分类号： H01L21/2205 ,  H01L21/02381 ,  H01L21/02532 ,  H01L21/02584 ,  H01L21/02694 ,  H01L29/16 ,  H01L29/365 ,  H01L29/7813

摘要： Systems and methods for substrate wafer back side and edge cross section seals. In accordance with a first method embodiment, a silicon wafer of a first conductivity type is accessed. An epitaxial layer of the first conductivity type is grown on a front surface of the silicon wafer. The epitaxial layer is implanted to form a region of an opposite conductivity type. The growing and implanting are repeated to form a vertical column of the opposite conductivity type. The wafer may also be implanted to form a region of the opposite conductivity type vertically aligned with the vertical column.

摘要翻译： 衬底晶圆背面和边缘截面密封的系统和方法。 根据第一方法实施例，访问第一导电类型的硅晶片。 第一导电类型的外延层生长在硅晶片的前表面上。 植入外延层以形成相反导电类型的区域。 重复生长和植入以形成相反导电类型的垂直柱。 也可以将晶片植入以形成与垂直柱垂直对准的相反导电类型的区域。

公开(公告)号：US09230810B2

公开(公告)日：2016-01-05

申请号：US12873147

申请日：2010-08-31

申请人： Hamilton Lu ,  The-Tu Chau ,  Kyle Terrill ,  Deva N. Pattanayak ,  Sharon Shi ,  Kuo-In Chen ,  Robert Xu

发明人： Hamilton Lu ,  The-Tu Chau ,  Kyle Terrill ,  Deva N. Pattanayak ,  Sharon Shi ,  Kuo-In Chen ,  Robert Xu

IPC分类号： H01L21/322 ,  H01L21/20 ,  H01L21/22 ,  H01L29/78

CPC分类号： H01L21/2205 ,  H01L21/02381 ,  H01L21/02532 ,  H01L21/02584 ,  H01L21/02694 ,  H01L29/16 ,  H01L29/365 ,  H01L29/7813

摘要： Systems and methods for substrate wafer back side and edge cross section seals. In accordance with a first method embodiment, a silicon wafer of a first conductivity type is accessed. An epitaxial layer of the first conductivity type is grown on a front surface of the silicon wafer. The epitaxial layer is implanted to form a region of an opposite conductivity type. The growing and implanting are repeated to form a vertical column of the opposite conductivity type. The wafer may also be implanted to form a region of the opposite conductivity type vertically aligned with the vertical column.

摘要翻译： 衬底晶圆背面和边缘截面密封的系统和方法。 根据第一方法实施例，访问第一导电类型的硅晶片。 第一导电类型的外延层生长在硅晶片的前表面上。 植入外延层以形成相反导电类型的区域。 重复生长和植入以形成相反导电类型的垂直柱。 也可以将晶片植入以形成与垂直柱垂直对准的相反导电类型的区域。

公开(公告)号：US09306056B2

公开(公告)日：2016-04-05

申请号：US12610148

申请日：2009-10-30

申请人： Deva Pattanayak ,  King Owyang ,  Mohammed Kasem ,  Kyle Terrill ,  Reuven Katraro ,  Kuo-In Chen ,  Calvin Choi ,  Qufei Chen ,  Ronald Wong ,  Kam Hong Lui ,  Robert Xu

发明人： Deva Pattanayak ,  King Owyang ,  Mohammed Kasem ,  Kyle Terrill ,  Reuven Katraro ,  Kuo-In Chen ,  Calvin Choi ,  Qufei Chen ,  Ronald Wong ,  Kam Hong Lui ,  Robert Xu

IPC分类号： H01L23/48 ,  H01L29/78 ,  H01L23/00 ,  H01L29/417 ,  H01L29/66 ,  H01L29/45

CPC分类号： H01L29/7809 ,  H01L24/05 ,  H01L24/06 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L29/408 ,  H01L29/41766 ,  H01L29/45 ,  H01L29/456 ,  H01L29/66734 ,  H01L29/7813 ,  H01L2224/0401 ,  H01L2224/05 ,  H01L2224/05552 ,  H01L2224/05554 ,  H01L2224/06051 ,  H01L2224/13007 ,  H01L2224/13014 ,  H01L2224/13023 ,  H01L2224/13099 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/00012 ,  H01L2924/00

摘要： A semiconductor device (e.g., a flip chip) includes a substrate layer that is separated from a drain contact by an intervening layer. Trench-like feed-through elements that pass through the intervening layer are used to electrically connect the drain contact and the substrate layer when the device is operated.

摘要翻译： 半导体器件（例如，倒装芯片）包括通过中间层与漏极接触分离的衬底层。 通过中间层的沟槽状馈通元件用于在器件工作时电连接漏极接触和衬底层。