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    METHODS OF MANUFACTURING SEMICONDUCTOR STRUCTURES
    4.
    发明申请
    METHODS OF MANUFACTURING SEMICONDUCTOR STRUCTURES 有权
    制造半导体结构的方法

    公开(公告)号：US20080197394A1

    公开(公告)日：2008-08-21

    申请号：US11676635

    申请日：2007-02-20

    申请人： Dirk Caspary ,  Arnd Scholz ,  Stefano Parascandola ,  Christoph Noelscher

    发明人： Dirk Caspary ,  Arnd Scholz ,  Stefano Parascandola ,  Christoph Noelscher

    IPC分类号： H01L29/94 ,  G03F1/00 ,  H01L21/311 ,  H01L27/108

    CPC分类号： H01L21/3086 ,  H01L21/3088 ,  H01L27/0207 ,  H01L27/1087 ,  H01L27/115

    摘要： A method of manufacturing semiconductor structures is disclosed. In one embodiment, a first mask is provided above a substrate. The first mask includes first mask lines extending along a first axis. A second mask is provided above the first mask. The second mask includes second mask lines extending along a second axis that intersects the first axis. At least one of the first and second masks is formed by a pitch fragmentation method. Structures may be formed in the substrate, wherein the first and the second mask are effective as a combined mask. The structures may be equally spaced at a pitch in the range of a minimum lithographic feature size for repetitive line structures.

    摘要翻译： 公开了制造半导体结构的方法。 在一个实施例中，在衬底上方提供第一掩模。 第一掩模包括沿着第一轴线延伸的第一掩模线。 在第一掩模上方提供第二掩模。 第二掩模包括沿着与第一轴相交的第二轴延伸的第二掩模线。 第一和第二掩模中的至少一个由音调分段方法形成。 可以在衬底中形成结构，其中第一和第二掩模作为组合掩模是有效的。 结构可以在重复线结构的最小光刻特征尺寸的范围内以间距等间隔。

    Method of producing pitch fractionizations in semiconductor technology
    5.
    发明申请
    Method of producing pitch fractionizations in semiconductor technology 有权
    在半导体技术中制备节距分级的方法

    公开(公告)号：US20070026684A1

    公开(公告)日：2007-02-01

    申请号：US11194489

    申请日：2005-08-01

    申请人： Stefano Parascandola ,  Dirk Caspary

    发明人： Stefano Parascandola ,  Dirk Caspary

    IPC分类号： H01L21/311 ,  H01L21/461 ,  B44C1/22

    CPC分类号： H01L21/31144 ,  H01L21/0337 ,  H01L21/0338 ,  H01L21/32139

    摘要： Spacers are formed on sidewalls of striplike parts of a pattern layer of periodic structure. The pattern layer is removed, and the spacers are covered with a further spacer layer, which is then structured to second sidewall spacers. Gaps between the spacers are filled with a complementary layer. The upper surface is planarized to a lower surface level, leaving a periodic succession of the first spacers, the second spacers and the residual parts of the complementary layer. The lateral dimensions are adapted in such a manner that a removal of one or two of the remaining layers renders a periodic pattern of smaller pitch.

    摘要翻译： 间隔物形成在周期性结构的图案层的带状部分的侧壁上。 去除图案层，并且间隔物被另外的间隔层覆盖，然后隔离层被构造成第二侧壁间隔物。 间隔物之间​​的间隙填充有互补层。 上表面被平坦化到较低的表面水平，留下第一间隔物，第二间隔物和互补层的残留部分的周期性连续。 横向尺寸以这样一种方式进行调整，使得一个或两个剩余的层的移除呈现较小间距的周期性图案。

    Method of forming semiconductor device structures using hardmasks
    7.
    发明申请
    Method of forming semiconductor device structures using hardmasks 审中-公开
    使用硬掩模形成半导体器件结构的方法

    公开(公告)号：US20070212892A1

    公开(公告)日：2007-09-13

    申请号：US11588429

    申请日：2006-10-27

    申请人： Dirk Caspary ,  Stefano Parascandola

    发明人： Dirk Caspary ,  Stefano Parascandola

    IPC分类号： H01L21/302

    CPC分类号： H01L21/0337 ,  H01L21/0338

    摘要： A first hardmask layer is provided over a substrate, and a second hardmask layer is provided over the first hardmask layer. The second hardmask layer is patterned to form a second hardmask structure having sidewalls. A sacrificial layer of a sacrificial material is conformally deposited such that the deposited sacrificial layer has substantially horizontal and vertical portions. The horizontal portions of the sacrificial layer are removed to form lines of the sacrificial material adjacent to the sidewalls of the second hardmask lines. The sacrificial layer is at least partially removed to structure the sacrificial material and the remaining sacrificial layer is used to structure the first hardmask. The second hardmask structures is removed to uncover portions of the first hardmask. Uncovered portions of the substrate are etched, thereby forming structures in the substrate below the first hardmask.

    摘要翻译： 在衬底上提供第一硬掩模层，并且在第一硬掩模层上提供第二硬掩模层。 图案化第二硬掩模层以形成具有侧壁的第二硬掩模结构。 牺牲材料的牺牲层被共形沉积，使得沉积的牺牲层具有基本水平和垂直的部分。 去除牺牲层的水平部分以形成与第二硬掩模线的侧壁相邻的牺牲材料的线。 至少部分去除牺牲层以构造牺牲材料，并且使用剩余的牺牲层来构造第一硬掩模。 移除第二硬掩模结构以露出​​第一硬掩模的部分。 对衬底的未覆盖部分进行蚀刻，从而在第一硬掩模下面的衬底中形成结构。

    Methods of manufacturing semiconductor structures
    8.
    发明授权
    Methods of manufacturing semiconductor structures 有权
    制造半导体结构的方法

    公开(公告)号：US07867912B2

    公开(公告)日：2011-01-11

    申请号：US11676635

    申请日：2007-02-20

    申请人： Dirk Caspary ,  Arnd Scholz ,  Stefano Parascandola ,  Christoph Nölscher

    发明人： Dirk Caspary ,  Arnd Scholz ,  Stefano Parascandola ,  Christoph Nölscher

    IPC分类号： H01L21/302 ,  H01L21/461

    CPC分类号： H01L21/3086 ,  H01L21/3088 ,  H01L27/0207 ,  H01L27/1087 ,  H01L27/115

    摘要： A method of manufacturing semiconductor structures is disclosed. In one embodiment, a first mask is provided above a substrate. The first mask includes first mask lines extending along a first axis. A second mask is provided above the first mask. The second mask includes second mask lines extending along a second axis that intersects the first axis. At least one of the first and second masks is formed by a pitch fragmentation method. Structures may be formed in the substrate, wherein the first and the second mask are effective as a combined mask. The structures may be equally spaced at a pitch in the range of a minimum lithographic feature size for repetitive line structures.

    摘要翻译： 公开了制造半导体结构的方法。 在一个实施例中，在衬底上方提供第一掩模。 第一掩模包括沿着第一轴线延伸的第一掩模线。 在第一掩模上方提供第二掩模。 第二掩模包括沿着与第一轴相交的第二轴延伸的第二掩模线。 第一和第二掩模中的至少一个由音调分段方法形成。 可以在衬底中形成结构，其中第一和第二掩模作为组合掩模是有效的。 结构可以在重复线结构的最小光刻特征尺寸的范围内以间距等间隔。

    Method of manufacturing a semiconductor device and semiconductor device
    10.
    发明申请
    Method of manufacturing a semiconductor device and semiconductor device 审中-公开
    制造半导体器件和半导体器件的方法

    公开(公告)号：US20080203459A1

    公开(公告)日：2008-08-28

    申请号：US11711486

    申请日：2007-02-27

    申请人： Dirk Caspary

    发明人： Dirk Caspary

    IPC分类号： H01L27/24 ,  H01L21/78

    CPC分类号： H01L27/115 ,  H01L27/11568

    摘要： A carrier is structured with isolation regions in a precise fashion. First structures and second structures are formed above a carrier. At least one of the second structures is removed selectively with respect to the first structures. At least one recess in the carrier is formed according to the structure thus obtained. An embodiment of a semiconductor device that may be produced in this way is provided with at least one insulating striplike region and/or a plurality of insulating regions that are arranged at distances from one another along a line.

    摘要翻译： 载体以精确的方式构造有隔离区域。 第一结构和第二结构形成在载体上。 第二结构中的至少一个相对于第一结构被选择性地移除。 根据如此获得的结构，形成载体中的至少一个凹部。 可以以这种方式制造的半导体器件的实施例设置有沿着线彼此间隔设置的至少一个绝缘带状区域和/或多个绝缘区域。