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32 条记录 (耗时 0.029 秒)

    System to control effective series resistance of decoupling capacitor
    2.
    发明授权
    System to control effective series resistance of decoupling capacitor 有权
    系统来控制去耦电容的有效串联电阻

    公开(公告)号：US07286368B2

    公开(公告)日：2007-10-23

    申请号：US10976716

    申请日：2004-10-29

    申请人： Dong Zhong ,  David G. Figueroa ,  Yuan-Liang Li ,  Michael M. Desmith

    发明人： Dong Zhong ,  David G. Figueroa ,  Yuan-Liang Li ,  Michael M. Desmith

    IPC分类号： H05K7/00

    CPC分类号： H01L23/50 ,  H01L2224/16225 ,  H01L2924/01079 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01L2924/19106

    摘要： According to some embodiments, a system includes an integrated circuit package to support an integrated circuit die. The integrated circuit package may include a plurality of conductive contacts and a decoupling capacitor. The decoupling capacitor may include a positive terminal contact pad coupled to a first one of the plurality of conductive contacts, the positive terminal contact pad comprising a first substantially non-conductive area, and a negative terminal contact pad coupled to a second one of the plurality of conductive contacts, the negative terminal contact pad comprising a second substantially non-conductive area.

    摘要翻译： 根据一些实施例，系统包括用于支撑集成电路管芯的集成电路封装。 集成电路封装可以包括多个导电触点和去耦电容器。 去耦电容器可以包括耦合到多个导电触点中的第一个的正极端子接触焊盘，正极端子接触焊盘包括第一基本上不导电的区域，以及耦合到多个导电触点中的第二个的负极端子接触焊盘 的导电触点，负极接触焊盘包括第二基本上不导电的区域。

    Low impedance, high-power socket and method of using
    5.
    发明授权
    Low impedance, high-power socket and method of using 失效
    低阻抗，大功率插座和使用方法

    公开(公告)号：US06964584B2

    公开(公告)日：2005-11-15

    申请号：US10032377

    申请日：2001-12-21

    申请人： Dong Zhong ,  Yuan-Liang Li ,  David G. Figueroa ,  Jiangqi He

    发明人： Dong Zhong ,  Yuan-Liang Li ,  David G. Figueroa ,  Jiangqi He

    IPC分类号： H01R13/6466 ,  H01R13/6473 ,  H01R13/66

    CPC分类号： H01R13/6625 ,  H01R13/6466 ,  H01R13/6473

    摘要： The present invention relates to a power socket for a microelectronic device that, in one embodiment, uses a low-resistance power and ground terminal configuration. In another embodiment, a low-resistance power and ground terminal configuration is combined on the power socket with a vertically oriented interdigital capacitor that is used to lower inductance. By this combination a significantly lowered impedance is achieved during operation of the microelectronic device. The capacitor may include plates that are vertically oriented relative to the major planar surface of the socket faces and capacitors may be located between a power and a ground contact, between two power contacts, or between two ground contacts.

    摘要翻译： 本发明涉及一种用于微电子器件的电源插座，其在一个实施例中使用低电阻功率和接地端子配置。 在另一个实施例中，低电阻功率和接地端子配置结合在电源插座上，并具有用于降低电感的垂直取向的交叉指状电容器。 通过该组合，在微电子器件的操作期间实现显着降低的阻抗。 电容器可以包括相对于插座面的主平面垂直定向的板，并且电容器可以位于电源和接地触点之间，两个电源触点之间或两个接地触点之间。

    Capacitor design for controlling equivalent series resistance
    7.
    发明授权
    Capacitor design for controlling equivalent series resistance 有权
    用于控制等效串联电阻的电容器设计

    公开(公告)号：US07212395B2

    公开(公告)日：2007-05-01

    申请号：US11024060

    申请日：2004-12-28

    申请人： Yuan-Liang Li ,  David G. Figueroa ,  Farzaneh Yahyaei-moayyed ,  Dong Zhong

    发明人： Yuan-Liang Li ,  David G. Figueroa ,  Farzaneh Yahyaei-moayyed ,  Dong Zhong

    IPC分类号： H01G4/228

    CPC分类号： H01G4/012 ,  H01G4/232 ,  H01G4/30 ,  H01L2224/16 ,  H01L2924/15312 ,  H01L2924/19103 ,  H01L2924/19106 ,  H05K1/0231

    摘要： According to some embodiments, a capacitor includes a first external capacitor plane including a first at least one terminal of a first polarity, and a first internal capacitor plane including a second at least one terminal of the first polarity. The second at least one terminal of the first polarity may be electrically coupled to the first at least one terminal of the first polarity, and a total area of the second at least one terminal of the first polarity may be less than a total area of the first at least one terminal of the first polarity.

    摘要翻译： 根据一些实施例，电容器包括包括第一极性的第一至少一个端子的第一外部电容器平面和包括第一极性的第二至少一个端子的第一内部电容器平面。 第一极性的第二至少一个端子可以电耦合到第一极性的第一至少一个端子，并且第一极性的第二至少一个端子的总面积可以小于第一极性的总面积 第一极性的至少一个端子。