公开(公告)号：US4722912A

公开(公告)日：1988-02-02

申请号：US856277

申请日：1986-04-28

申请人： Doris W. Flatley ,  Alfred C. Ipri

发明人： Doris W. Flatley ,  Alfred C. Ipri

IPC分类号： H01L21/316 ,  H01L21/336 ,  H01L21/86 ,  H01L27/08

CPC分类号： H01L29/66757 ,  H01L21/02238 ,  H01L21/31662 ,  H01L21/86 ,  H01L29/66772

摘要： A method for forming a layer of silicon dioxide over a silicon island on an insulating surface wherein the layer on top of the island is thinner than on the sidewalls is disclosed. The silicon island is oxidized and a silicon layer is deposited thereover. The layer of silicon is oxidized and the oxide layer is anisotropically etched until the top surface of the island is exposed, leaving oxide only on the sidewalls of the island. The exposed portion of the island is then oxidized to form a thin layer of gate oxide thereon. A conductive polycrystalline silicon electrode is deposited on the oxide-covered island. The disclosed method is particularly useful in the formation of MOSFETs.

摘要翻译： 公开了一种在绝缘表面上的硅岛上形成二氧化硅层的方法，其中岛顶部的层比在侧壁上薄。 硅岛氧化，硅层沉积在其上。 硅层被氧化，并且各向异性蚀刻氧化层，直到岛的顶表面露出，仅在岛的侧壁上留下氧化物。 然后，岛的暴露部分被氧化以在其上形成薄层的栅极氧化物。 导电多晶硅电极沉积在氧化物覆盖的岛上。 所公开的方法在形成MOSFET中特别有用。

公开(公告)号：US4178191A

公开(公告)日：1979-12-11

申请号：US932626

申请日：1978-08-10

申请人： Doris W. Flatley

发明人： Doris W. Flatley

IPC分类号： H01L21/265 ,  H01L21/762 ,  H01L21/225 ,  H01L11/00 ,  H01L21/263

CPC分类号： H01L21/7621 ,  H01L21/26513 ,  H01L21/76213 ,  Y10S148/077 ,  Y10S148/093 ,  Y10S438/911 ,  Y10S438/919

摘要： An improved process of forming planar silicon-on-sapphire MOS integrated circuit devices by a local oxidation process in which portions of a silicon layer on a sapphire substrate are thermally oxidized throughout the thickness of the layer to provide interdevice dielectric isolation and a substantially planar topology includes a step of ion implanting phosphorus, boron, or a combination thereof into the silicon prior to the thermal oxidation step. The implanted impurities have a stabilizing effect on the devices thereafter built in the remaining silicon.

摘要翻译： 通过局部氧化工艺形成平坦的蓝宝石上蓝宝石MOS集成电路器件的改进方法，其中蓝宝石衬底上的硅层的一部分在该层的整个厚度上被热氧化以提供器件间绝缘隔离和基本上平面的拓扑 包括在热氧化步骤之前将磷，硼或其组合离子注入到硅中的步骤。 植入的杂质对其后构成剩余硅的器件具有稳定作用。

公开(公告)号：US4658495A

公开(公告)日：1987-04-21

申请号：US856278

申请日：1986-04-28

申请人： Doris W. Flatley ,  Alfred C. Ipri

发明人： Doris W. Flatley ,  Alfred C. Ipri

IPC分类号： H01L21/316 ,  H01L21/336 ,  H01L21/86 ,  H01L21/473

CPC分类号： H01L29/66757 ,  H01L21/02238 ,  H01L21/31662 ,  H01L21/86 ,  H01L29/66772 ,  Y10S148/15 ,  Y10S438/911 ,  Y10S438/981

摘要： A method for forming a layer of silicon dioxide over a silicon island on an insulating surface wherein the layer on top of the island is thinner than on the sidewalls is disclosed. The silicon island is oxidized and a silicon layer is deposited thereover. A layer of planarizing material is deposited over the silicon layer. The planarizing layer is anisotropically etched until the surface of the silicon layer overlying the island is exposed. The silicon layer is in turn etched until the surface of the oxide layer overlying the island is exposed. The remaining planarizing material is removed and the remaining silicon layer is oxidized. The thickness of the gate oxide layer on top of the island may be controlled by again exposing the island surface and reoxidizing to a predetermined thickness. A conductive polycrystalline silicon electrode is deposited on the oxide-covered island. The disclosed method is particularly useful in the formation of MOSFETs.

摘要翻译： 公开了一种在绝缘表面上的硅岛上形成二氧化硅层的方法，其中岛顶部的层比在侧壁上薄。 硅岛氧化，硅层沉积在其上。 平坦化材料层沉积在硅层上。 各向异性蚀刻平坦化层，直到覆盖在岛上的硅层的表面露出。 再次蚀刻硅层直至覆盖岛上的氧化物层的表面露出。 剩余的平坦化材料被去除，剩余的硅层被氧化。 可以通过再次暴露岛表面并再氧化至预定厚度来控制岛顶上的栅极氧化物层的厚度。 导电多晶硅电极沉积在氧化物覆盖的岛上。 所公开的方法在形成MOSFET中特别有用。

公开(公告)号：US4637836A

公开(公告)日：1987-01-20

申请号：US778986

申请日：1985-09-23

申请人： Doris W. Flatley ,  Sheng T. Hsu

发明人： Doris W. Flatley ,  Sheng T. Hsu

IPC分类号： H01L27/092 ,  H01L21/265 ,  H01L21/3215 ,  H01L21/8234 ,  H01L21/8238 ,  H01L27/088 ,  H01L29/78 ,  H01L21/26

CPC分类号： H01L21/823828 ,  H01L21/32155 ,  H01L21/823857 ,  Y10S438/919

摘要： The ion implantation of a silicon structure isolated from a semiconductor substrate by a layer of silicon dioxide with boron ions to render it p type conductive is improved by initially doping the silicon with phosphorus ions. The presence of the phosphorus ions in the silicon prevents the implanted boron ions from rapidly migrating into the silicon dioxide during annealing.

摘要翻译： 通过用磷离子初始掺杂硅，改善了通过具有硼离子的二氧化硅层与半导体衬底隔离以形成p型导电的硅结构的离子注入。 在硅中存在磷离子防止注入的硼离子在退火过程中迅速迁移到二氧化硅中。

公开(公告)号：US4349584A

公开(公告)日：1982-09-14

申请号：US258431

申请日：1981-04-28

申请人： Doris W. Flatley ,  Sheng T. Hsu

发明人： Doris W. Flatley ,  Sheng T. Hsu

IPC分类号： H01L21/768 ,  H01L21/28 ,  H01L21/3105 ,  H01L21/316

CPC分类号： H01L21/3105 ,  Y10S438/978

摘要： A process for defining improved tapered openings in glass coatings requires that passivating layers be formed of a doped silicon oxide having a relatively low flow temperature formed on a layer of undoped silicon oxide. After the contact openings are formed, both oxide layers are heated to a temperature below the flow temperature of the doped layer for a period of time sufficient to only soften and partially reflow the doped layer, the temperature being insufficient to form a significant oxide growth on the exposed portion of the semiconductor body.

摘要翻译： 用于在玻璃涂层中限定改进的锥形开口的方法要求钝化层由形成在未掺杂的氧化硅层上的相对低的流动温度的掺杂氧化硅形成。 在形成接触开口之后，将两个氧化物层加热到低于掺杂层的流动温度的温度一段足以仅使软化并部分回流掺杂层的时间，该温度不足以形成显着的氧化物生长 半导体本体的暴露部分。

公开(公告)号：US4735917A

公开(公告)日：1988-04-05

申请号：US856280

申请日：1986-04-28

申请人： Doris W. Flatley ,  Kenneth M. Schlesier

发明人： Doris W. Flatley ,  Kenneth M. Schlesier

IPC分类号： H01L21/3105 ,  H01L21/86 ,  H01L21/473

CPC分类号： H01L21/31051 ,  H01L21/86 ,  Y10S438/953

摘要： A process for forming a silicon-on-sapphire integrated circuit comprises forming a layer of a conformal dielectric material, such as silicon dioxide, over a sapphire substrate having at least one island of silicon on a major surface thereof; forming a layer of a planarizing material over the dielectric layer, anisotropically etching the planarizing material for a time sufficient to expose the surface of the dielectric layer overlying the island; etching the dielectric layer for a time sufficient to expose at least the top surface of the island; removing the remaining planarizing material, growing a thin layer of gate oxide on the exposed surface of the island and providing a patterned layer of conductive polycrystalline silicon thereover. The etching of the dielectric layer can be continued to at least partially expose the sidewall surface of the islands. Preferably, etching is continued for a time sufficient to completely expose the sidewall surfaces of the islaThe government has rights to this invention pursant to Subcontract No. A5ZV-522881-E-507 under Contract No. F04704-84-C-0061 awarded by the Department of the Air Force.

摘要翻译： 一种用于形成蓝宝石上硅集成电路的工艺包括在其主表面上具有至少一个硅岛的蓝宝石衬底上形成诸如二氧化硅的共形绝缘材料层; 在所述电介质层上形成平坦化材料层，各向异性地蚀刻所述平坦化材料足以暴露所述岛上的所述电介质层的表面的时间; 蚀刻电介质层足以暴露至少岛的顶表面的时间; 去除剩余的平坦化材料，在岛的暴露表面上生长薄层的栅极氧化物，并在其上提供导电多晶硅的图案化层。 电介质层的蚀刻可以继续至少部分地暴露岛的侧壁表面。 优选地，蚀刻持续一段时间，足以完全暴露岛的侧壁表面和与其相邻的表面的一部分。 在每个岛上形成单独的MOSFET，并且包括由沟道区域隔开的源极和漏极区域以及在沟道区域上的沟道电介质。

公开(公告)号：US4716451A

公开(公告)日：1987-12-29

申请号：US448724

申请日：1982-12-10

申请人： Sheng T. Hsu ,  Doris W. Flatley

发明人： Sheng T. Hsu ,  Doris W. Flatley

IPC分类号： H01L21/8238 ,  H01L21/322 ,  H01L21/74 ,  H01L27/092 ,  H01L29/78 ,  H01L27/04

CPC分类号： H01L27/0928 ,  H01L21/3221 ,  H01L21/74

摘要： A semiconductor device includes a substrate of single crystalline silicon having the active regions of a semiconductor element, such as the source, drain, channel and gates, along one surface of the substrate, and a thin gettering region of a gettering material in the substrate. The gettering region is spaced from both surfaces of the substrate and is adjacent the active regions of the semiconductor element so as to getter contaminants in the substrate from the area of the substrate containing the semiconductor element.

摘要翻译： 半导体器件包括沿衬底的一个表面具有诸如源极，漏极，沟道和栅极的半导体元件的有源区的单晶硅衬底，以及衬底中吸杂材料的薄吸气区。 吸气区域与衬底的两个表面间隔开并且与半导体元件的有源区域相邻，从而从包含半导体元件的衬底的区域吸收衬底中的污染物。

公开(公告)号：US4259779A

公开(公告)日：1981-04-07

申请号：US827373

申请日：1977-08-24

申请人： Alfred C. Ipri ,  Doris W. Flatley

发明人： Alfred C. Ipri ,  Doris W. Flatley

IPC分类号： H01L29/78 ,  B01J17/00

CPC分类号： H01L29/78 ,  Y10S257/906 ,  Y10S438/953

摘要： The radiation resistance of an MOS transistor is improved by making the transistor in a manner such that, after the gate insulation layer is formed, all further steps are carried out at a relatively low temperature, i.e., less than about 900.degree. C. The source and drain regions are preferably formed by ion implantation with very little or no post implant thermal activation, and the metallization is applied by low temperature techniques.

摘要翻译： 通过使晶体管以形成栅极绝缘层的方式来提高MOS晶体管的辐射电阻，所有其它步骤在相对较低的温度（即小于约900℃）下进行。源 并且漏极区优选通过离子注入形成，具有非常少的或没有后植入物热激活，并且金属化通过低温技术施加。

公开(公告)号：US4999691A

公开(公告)日：1991-03-12

申请号：US453090

申请日：1989-12-22

申请人： Sheng T. Hsu ,  Doris W. Flatley

发明人： Sheng T. Hsu ,  Doris W. Flatley

IPC分类号： H01L21/822 ,  H01L27/06

CPC分类号： H01L21/8221 ,  H01L27/0688

摘要： A structure and method for making a pair of MOS field effect transistors (MOSFETs), one stacked upon the other in an integrated circuit device is disclosed. In one embodiment of the device, the active layer of the upper MOSFET is epitaxially grown from an exposed surface of the active layer of the lower MOSFET. In another embodiment, the active layer of the upper MOSFET is polysilicon which, optionally, may be recrystallized. In all embodiments, the pair of MOSFETs share a common gate.

摘要翻译： 公开了一种用于在集成电路器件中彼此堆叠的一对MOS场效应晶体管（MOSFET）的结构和方法。 在器件的一个实施例中，上MOSFET的有源层从下MOSFET的有源层的暴露表面外延生长。 在另一个实施例中，上部MOSFET的有源层是可以重结晶的多晶硅。 在所有实施例中，该对MOSFET共享公共栅极。

公开(公告)号：US4927777A

公开(公告)日：1990-05-22

申请号：US418762

申请日：1989-10-06

申请人： Sheng T. Hsu ,  Doris W. Flatley

发明人： Sheng T. Hsu ,  Doris W. Flatley

IPC分类号： H01L21/266 ,  H01L21/336 ,  H01L21/8238

CPC分类号： H01L29/6659 ,  H01L21/266 ,  H01L21/823864

摘要： A method of making a MOS transistor having source and drain extensions includes forming on a surface of a substrate of single crystalline silicon a gate line having a thin layer of silicon oxide between the gate line and the substrate surface. A light dose of ions of a desired conductivity type are embedded in the substrate surface at each side of the gate line up to the side walls of the gate line. Spacers of thermally grown silicon oxide are formed on the side walls of the gate line and a dose of the ions of the desired conductivity type are embedded into the substrate surface at each side of the gate line to form source and drain regions. The source and drain regions extend up to the spacers and have lightly doped extensions extending up to the side walls of the gate line under the spacers.

摘要翻译： 制造具有源极和漏极延伸的MOS晶体管的方法包括在栅极线和衬底表面之间在单晶硅的衬底的表面上形成具有薄的氧化硅层的栅极线。 期望的导电类型的光剂量的离子被嵌入栅极线的每一侧的基板表面直到栅极线的侧壁。 在栅极线的侧壁上形成热生长氧化硅的间隔物，并且期望的导电类型的离子的剂量被嵌入在栅极线的每一侧的衬底表面中以形成源极和漏极区域。 源极和漏极区域延伸到间隔物，并且具有在隔离物下方的栅极线的侧壁延伸的轻掺杂延伸部。