Sealed self aligned contact process
    1.
    发明授权
    Sealed self aligned contact process 失效
    密封自对准接触过程

    公开(公告)号:US5385634A

    公开(公告)日:1995-01-31

    申请号:US43569

    申请日:1993-04-07

    摘要: In fabricating a contact window to source/drain electrode next to a gate electrode of an integrated circuit: (1) establishing a structure with a window over the source/drain region next to the gate electrode; (2) establishing a region of titanium silicide over the source/drain electrode and establishing a titanium nitride layer over the window and gate electrode; (3) establishing a layer of silicon nitride over the titanium nitride layer; (4) patterning the silicon nitride layer; (5) using the patterned silicon nitride layer as a mask to pattern the titanium nitride layer; (6) adding another silicon nitride layer to seal the gate electrode where it is not protected by titanium nitride; (7) opening a window over the electrode by an anisotropic etch; (8) widening the window with an isotropic etch, using the silicon nitride and titanium nitride as a protective barrier; and (9) adding contact material in said windows.

    摘要翻译: 在制造与集成电路的栅电极相邻的源极/漏电极的接触窗口时:(1)在栅电极旁边的源极/漏极区域上建立具有窗口的结构; (2)在源/漏电极上建立硅化钛区域,并在窗口和栅电极上建立氮化钛层; (3)在氮化钛层上建立氮化硅层; (4)构图氮化硅层; (5)使用图案化氮化硅层作为掩模来图案化氮化钛层; (6)添加另一个氮化硅层以密封其不受氮化钛保护的栅电极; (7)通过各向异性蚀刻在电极上打开窗口; (8)使用氮化硅和氮化钛作为保护屏障,用各向同性蚀刻来加宽窗口; 和(9)在所述窗口中添加接触材料。

    Process for fabricating transistors using composite nitride structure
    2.
    发明授权
    Process for fabricating transistors using composite nitride structure 失效
    使用复合氮化物结构制造晶体管的工艺

    公开(公告)号:US5610099A

    公开(公告)日:1997-03-11

    申请号:US267278

    申请日:1994-06-28

    CPC分类号: H01L29/6659 H01L21/28518

    摘要: In fabricating a source/drain electrode of an integrated circuit transistor and a contact window for it: (1) establishing a structure with a window over the source/drain region next to a gate electrode and isolation structure; (2) establishing a dielectric layer covering the isolation structure, the window, and gate electrode; (3) implanting a moderate concentration of impurities into the source/drain region through said dielectric layer so that the moderate concentration region extends partially under the gate electrode; (4) removing the horizontal portions of the dielectric layer with an anisotropic etch thereby leaving the dielectric on vertical side walls; (5) establishing a region of titanium silicide over the moderately dosed source/drain region and establishing a titanium nitride layer over the isolation structure, windows, and gate electrode; (6) establishing a layer of silicon nitride over the titanium nitride layer; (7) implanting the substrate with a relatively heavier dose of ions through the silicon nitride, titanium nitride, and titanium silicide layers to create a heavier concentration source/drain region intersecting said moderate concentration region, where the heavy concentration region does not underlie the gate electrode; (8) patterning the silicon nitride layer; (9) using the patterned silicon nitride layer as a mask to pattern the titanium nitride layer; (10) adding thick interlevel dielectric over the patterned nitride layers; (11) opening windows over the electrodes; and (12) adding contact material in said windows.

    摘要翻译: 在制造集成电路晶体管的源极/漏极电极及其接触窗口时:(1)在栅极电极和隔离结构旁边的源极/漏极区域上建立具有窗口的结构; (2)建立覆盖隔离结构,窗口和栅电极的电介质层; (3)通过所述电介质层将中等浓度的杂质注入源极/漏极区域,使得中等浓度区域部分地延伸到栅电极下方; (4)用各向异性蚀刻去除电介质层的水平部分,从而将电介质留在垂直侧壁上; (5)在中等剂量的源极/漏极区域上建立硅化钛区域,并在隔离结构,窗口和栅电极上建立氮化钛层; (6)在氮化钛层上建立氮化硅层; (7)通过氮化硅,氮化钛和硅化钛层将相对较重剂量的离子注入衬底以产生与所述中等浓度区域相交的较重的浓度源/漏区,其中重浓度区域不位于栅极 电极; (8)构图氮化硅层; (9)使用图案化的氮化硅层作为掩模来图案化氮化钛层; (10)在图案化的氮化物层上添加厚的层间电介质; (11)在电极上打开窗户; 和(12)在所述窗口中添加接触材料。

    Process architecture and manufacturing tool sets employing hard mask
patterning for use in the manufacture of one or more metallization
levels on a workpiece

    公开(公告)号:US6120641A

    公开(公告)日:2000-09-19

    申请号:US128238

    申请日:1998-08-03

    摘要: A manufacturing tool configuration for applying one or more levels of interconnect metallization to a generally planar dielectric surface of a workpiece with a minimal number of workpiece transfer operations between the tool sets is disclosed. The tool configuration comprises a film deposition tool set, a hard mask formation tool set, a hard mask etching tool set, a pattern processing tool set, a wet processing tool set, and a dielectric processing tool set. The film deposition tool set is used to deposit a conductive barrier layer exterior to the planar dielectric surface of the workpiece and a conductive seed layer exterior to the barrier layer. The hard mask formation tool set is used to form a hard mask dielectric layer exterior to the seed layer in accordance with one of the disclosed processes, and to form a still further hard mask dielectric layer exterior to the hard mask dielectric layer. In accordance with a first disclosed process, the pattern processing tool set is used to provide an interconnect line pattern over the hard mask dielectric layer and to provide a post pattern over interconnect line metallization formed using the interconnect line pattern. In accordance with a second disclosed process, the pattern processing tools set is used to provide a post pattern over the further hard mask dielectric layer so that the post pattern is ultimately formed in the further hard mask dielectric layer. The hard mask etching tool set is used to etch exposed regions of the hard mask dielectric layer after formation of the interconnect line pattern thereover and, in accordance with the second disclosed process, the exposed portions of the further hard mask dielectric layer after the formation of the post pattern thereover. The wet processing tool set performs at least the following wet processing operations: 1) applying copper metallization, using an electrochemical deposition process, into the interconnect line pattern and the post pattern formed by the pattern processing tool set, 2) removing material applied by the pattern processing tool set to form the interconnect line pattern and the post pattern, 3) removing the hard mask dielectric layer and, if necessary, the further hard mask dielectric layer, and 4) removing portions of the seed layer and the barrier layer that are not overlied by interconnect line metallization. The dielectric processing tool set is used to deposit a dielectric layer over the interconnect line metallization and post metallization and for etching the deposited dielectric layer to expose upper connection regions of the post metallization. In accordance with one embodiment of the tools set architecture, an inspections tools set is also employed to inspect the workpiece at intermediate stages of the processing.

    Apparatus for application of chemical process to a workpiece
    8.
    发明授权
    Apparatus for application of chemical process to a workpiece 失效
    化学工艺应用于工件的设备

    公开(公告)号:US06451114B1

    公开(公告)日:2002-09-17

    申请号:US09553676

    申请日:2000-04-21

    申请人: E. Henry Stevens

    发明人: E. Henry Stevens

    IPC分类号: B05C502

    CPC分类号: H01L21/6708 H01L21/67051

    摘要: An apparatus for application of a chemical process to a workpiece in which movement and precise location of the workpiece within the apparatus is accomplished by means of a single linear actuator and two locator components. A sequence of liquid solutions may be applied to a surface of the workpiece during processing, and a sequence of controlled atmospheres may be provided within a reaction chamber of the apparatus to thereby facilitate implementation of chemical processes that utilize both liquid-phase and gas-phase reactions in concert.

    摘要翻译: 一种用于向工件施加化学过程的装置,其中通过单个线性致动器和两个定位器部件来实现工件在装置内的移动和精确位置。 在处理过程中可以将一系列液体溶液施加到工件的表面,并且可以在设备的反应室内提供一系列受控的气氛,从而有助于实现利用液相和气相的化学过程 反应一致。

    Process and manufacturing tool architecture for use in the manufacturing of one or more protected metallization structures on a workpiece
    9.
    发明授权
    Process and manufacturing tool architecture for use in the manufacturing of one or more protected metallization structures on a workpiece 失效
    用于在工件上制造一个或多个被保护的金属化结构的工艺和制造工具架构

    公开(公告)号:US06376374B1

    公开(公告)日:2002-04-23

    申请号:US09076565

    申请日:1998-05-12

    申请人: E. Henry Stevens

    发明人: E. Henry Stevens

    IPC分类号: H01L2244

    摘要: A process for providing one or more protected copper elements on a surface of a workpiece is set forth. In accordance with the process, a barrier layer is applied to the workpiece. If the barrier layer is not suitable as a seed layer for subsequent electroplating processes, a separate seed layer is applied over the surface of the barrier layer. One or more copper elements are then electroplated on selected portions of the seed layer or, if suitable, the barrier layer. If used, the seed layer is then substantially removed. At least a portion of a surface of the barrier layer is rendered unplatable while leaving the copper elements suitable for electroplating. A protective layer is then electroplated onto surfaces of the one or more copper elements.

    摘要翻译: 阐述了在工件表面上提供一个或多个被保护的铜元素的工艺。 根据该工艺,将阻挡层施加到工件上。 如果阻挡层不适用于随后的电镀工艺的种子层,则在阻挡层的表面上施加单独的种子层。 然后将一种或多种铜元素电镀在种子层的选定部分上,或者如果合适的话,电镀在阻挡层上。 如果使用,则基本上除去种子层。 阻挡层的表面的至少一部分被赋予不可电镀,同时留下适合于电镀的铜元素。 然后将保护层电镀到一个或多个铜元件的表面上。