公开(公告)号：US06936509B2

公开(公告)日：2005-08-30

申请号：US10665713

申请日：2003-09-19

申请人： Douglas Duane Coolbaugh ,  Mark D. Dupuis ,  Matthew D. Gallagher ,  Peter J. Geiss ,  Brett A. Philips

发明人： Douglas Duane Coolbaugh ,  Mark D. Dupuis ,  Matthew D. Gallagher ,  Peter J. Geiss ,  Brett A. Philips

IPC分类号： H01L29/73 ,  H01L21/20 ,  H01L21/331 ,  H01L29/732 ,  H01L29/737 ,  H01L21/8249

CPC分类号： H01L29/66242 ,  H01L29/7378

摘要： A SiGe bipolar transistor including a semiconductor substrate having a collector and sub-collector region formed therein, wherein the collector and sub-collector are formed between isolation regions that are also present in the substrate is provided. Each isolation region includes a recessed surface and a non-recessed surface which are formed utilizing lithography and etching. A SiGe layer is formed on the substrate as well as the recessed non-recessed surfaces of each isolation region, the SiGe layer includes polycrystalline Si regions and a SiGe base region. A patterned insulator layer is formed on the SiGe base region; and an emitter is formed on the patterned insulator layer and in contact with the SiGe base region through an emitter window opening.

摘要翻译： 提供一种SiGe双极晶体管，其包括其中形成有集电极和副集电极区的半导体衬底，其中集电极和副集电极形成在也存在于衬底中的隔离区之间。 每个隔离区域包括使用光刻和蚀刻形成的凹陷表面和非凹陷表面。 在衬底上形成SiGe层以及每个隔离区的凹入的非凹入表面，SiGe层包括多晶Si区和SiGe基区。 在SiGe基极区上形成图案化的绝缘体层; 并且在图案化的绝缘体层上形成发射极，并通过发射器窗口与SiGe基极区域接触。

公开(公告)号：US06674102B2

公开(公告)日：2004-01-06

申请号：US09769640

申请日：2001-01-25

申请人： Douglas Duane Coolbaugh ,  Mark D. Dupuis ,  Matthew D. Gallagher ,  Peter J. Geiss ,  Brett A. Philips

发明人： Douglas Duane Coolbaugh ,  Mark D. Dupuis ,  Matthew D. Gallagher ,  Peter J. Geiss ,  Brett A. Philips

IPC分类号： H01L29737

CPC分类号： H01L29/66242 ,  H01L29/7378

摘要： A SiGe bipolar transistor including a semiconductor substrate having a collector and sub-collector region formed therein, wherein the collector and sub-collector are formed between isolation regions that are also present in the substrate is provided. Each isolation region includes a recessed surface and a non-recessed surface which are formed utilizing lithography and etching. A SiGe layer is formed on the substrate as well as the recessed non-recessed surfaces of each isolation region, the SiGe layer includes polycrystalline Si regions and a SiGe base region. A patterned insulator layer is formed on the SiGe base region; and an emitter is formed on the patterned insulator layer and in contact with the SiGe base region through an emitter window opening.

公开(公告)号：US06660664B1

公开(公告)日：2003-12-09

申请号：US09541091

申请日：2000-03-31

申请人： James W. Adkisson ,  Arne W. Ballantine ,  Matthew D. Gallagher ,  Peter J. Geiss ,  Jeffrey D. Gilbert ,  Shwu-Jen Jeng ,  Donna K. Johnson ,  Robb A. Johnson ,  Glen L. Miles ,  Kirk D. Peterson ,  James J. Toomey ,  Tina Wagner

发明人： James W. Adkisson ,  Arne W. Ballantine ,  Matthew D. Gallagher ,  Peter J. Geiss ,  Jeffrey D. Gilbert ,  Shwu-Jen Jeng ,  Donna K. Johnson ,  Robb A. Johnson ,  Glen L. Miles ,  Kirk D. Peterson ,  James J. Toomey ,  Tina Wagner

IPC分类号： H01L2131

CPC分类号： H01L28/20 ,  H01L21/3185

摘要： A process of forming a nitride film on a semiconductor substrate including exposing a surface of the substrate to a rapid thermal process to form the nitride film.

摘要翻译： 一种在半导体衬底上形成氮化物膜的方法，包括将衬底的表面暴露于快速热处理以形成氮化物膜。

公开(公告)号：US07696034B2

公开(公告)日：2010-04-13

申请号：US12128077

申请日：2008-05-28

申请人： Peter J. Geiss ,  Marwan H. Khater ,  Qizhi Liu ,  Randy W. Mann ,  Robert J. Purtell ,  Beth Ann Rainey ,  Jae-Sung Rieh ,  Andreas D. Stricker

发明人： Peter J. Geiss ,  Marwan H. Khater ,  Qizhi Liu ,  Randy W. Mann ,  Robert J. Purtell ,  Beth Ann Rainey ,  Jae-Sung Rieh ,  Andreas D. Stricker

IPC分类号： H01L21/8238

CPC分类号： H01L29/66242 ,  H01L21/28518 ,  H01L21/8249 ,  H01L27/0623 ,  H01L29/0804 ,  H01L29/456 ,  H01L29/7371

摘要： Methods for fabricating a heterojunction bipolar transistor having a raised extrinsic base is provided in which the base resistance is reduced by forming a silicide atop the raised extrinsic base that extends to the emitter region in a self-aligned manner. The silicide formation is incorporated into a BiCMOS process flow after the raised extrinsic base has been formed. The present invention also provides a heterojunction bipolar transistor having a raised extrinsic base and a silicide located atop the raised extrinsic base. The silicide atop the raised extrinsic base extends to the emitter in a self-aligned manner. The emitter is separated from the silicide by a spacer.

摘要翻译： 提供了制造具有凸起非本征基极的异质结双极晶体管的方法，其中通过在以自对准方式延伸到发射极区域的凸起的外部基极之上形成硅化物来降低基极电阻。 在形成凸起的外基之后，将硅化物形成结合到BiCMOS工艺流程中。 本发明还提供了一种异质结双极晶体管，其具有凸起的外部基极和位于凸起外部基极顶部的硅化物。 凸起的外基极上面的硅化物以自对准的方式延伸到发射极。 发射极通过间隔物与硅化物分离。

公开(公告)号：US06541336B1

公开(公告)日：2003-04-01

申请号：US10147248

申请日：2002-05-15

申请人： Marc W. Cantell ,  Rajesh Chopdekar ,  Peter J. Geiss

发明人： Marc W. Cantell ,  Rajesh Chopdekar ,  Peter J. Geiss

IPC分类号： H01L218042

CPC分类号： H01L29/66287 ,  H01L29/0804

摘要： A method of fabricating a bipolar transistor. The method comprising: forming an emitter opening in a dielectric layer to expose a surface of a base layer; performing a clean of the exposed surface, the clean removing any oxide present on the surface and passivating the surface to inhibit oxide growth; and forming an emitter layer on the surface after the performing a clean.

摘要翻译： 一种制造双极晶体管的方法。 该方法包括：在电介质层中形成发射极开口以露出基底层的表面; 清洁暴露的表面，清洁去除表面上存在的任何氧化物，钝化表面以抑制氧化物生长; 并且在执行清洁之后在表面上形成发射极层。

公开(公告)号：US20080124882A1

公开(公告)日：2008-05-29

申请号：US11937534

申请日：2007-11-09

申请人： Peter J. Geiss ,  Alvin J. Joseph ,  Rajendran Krishnasamy ,  Xuefeng Liu

发明人： Peter J. Geiss ,  Alvin J. Joseph ,  Rajendran Krishnasamy ,  Xuefeng Liu

IPC分类号： H01L21/331

CPC分类号： H01L29/66242 ,  H01L29/7378

摘要： A heterojunction bipolar transistor is formed in a semiconductor substrate of a first conductivity type including a collector region. A base region is formed on the substrate and an emitter region is formed over the base region. At least one of the collector, base and emitter regions includes a first region doped with an impurity having a first concentration and a second region doped with the impurity having a second concentration. Noise performance and reliability of the heterojunction bipolar transistor is improved without degrading ac performance.

摘要翻译： 在包括集电极区域的第一导电类型的半导体衬底中形成异质结双极晶体管。 在基板上形成基极区域，在基极区域上形成发射极区域。 集电极，基极和发射极区域中的至少一个包括掺杂有第一浓度的杂质的第一区域和掺杂有第二浓度的杂质的第二区域。 提高异质结双极晶体管的噪声性能和可靠性，而不会降低交流性能。

公开(公告)号：US06965133B2

公开(公告)日：2005-11-15

申请号：US10708598

申请日：2004-03-13

申请人： Peter J. Geiss ,  Marwan H. Khater ,  Qizhi Liu ,  Randy W. Mann ,  Robert J. Purtell ,  BethAnn Rainey ,  Jae-Sung Rieh ,  Andreas D. Stricker

发明人： Peter J. Geiss ,  Marwan H. Khater ,  Qizhi Liu ,  Randy W. Mann ,  Robert J. Purtell ,  BethAnn Rainey ,  Jae-Sung Rieh ,  Andreas D. Stricker

IPC分类号： H01L21/28 ,  H01L21/331 ,  H01L21/8222 ,  H01L21/8248 ,  H01L21/8249 ,  H01L27/06 ,  H01L29/417 ,  H01L29/73 ,  H01L29/732 ,  H01L29/737 ,  H01L31/072 ,  H01L31/109

CPC分类号： H01L29/66242 ,  H01L21/28518 ,  H01L21/8249 ,  H01L27/0623 ,  H01L29/0804 ,  H01L29/456 ,  H01L29/7371

摘要： Methods for fabricating a heterojunction bipolar transistor having a raised extrinsic base is provided in which the base resistance is reduced by forming a silicide atop the raised extrinsic base that extends to the emitter region in a self-aligned manner. The silicide formation is incorporated into a BiCMOS process flow after the raised extrinsic base has been formed. The present invention also provides a heterojunction bipolar transistor having a raised extrinsic base and a silicide located atop the raised extrinsic base. The silicide atop the raised extrinsic base extends to the emitter in a self-aligned manner. The emitter is separated from the silicide by a spacer.

摘要翻译： 提供了制造具有凸起非本征基极的异质结双极晶体管的方法，其中通过在以自对准方式延伸到发射极区域的凸起的外部基极之上形成硅化物来降低基极电阻。 在形成凸起的外基之后，将硅化物形成结合到BiCMOS工艺流程中。 本发明还提供了一种异质结双极晶体管，其具有凸起的外部基极和位于凸起外部基极顶部的硅化物。 凸起的外基极上面的硅化物以自对准的方式延伸到发射极。 发射极通过间隔物与硅化物分离。

公开(公告)号：US06448124B1

公开(公告)日：2002-09-10

申请号：US09439067

申请日：1999-11-12

申请人： Douglas D. Coolbaugh ,  James S. Dunn ,  Peter J. Geiss ,  Peter B. Gray ,  David L. Harame ,  Kathryn T. Schonenberg ,  Stephen A. St. Onge ,  Seshadri Subbanna

发明人： Douglas D. Coolbaugh ,  James S. Dunn ,  Peter J. Geiss ,  Peter B. Gray ,  David L. Harame ,  Kathryn T. Schonenberg ,  Stephen A. St. Onge ,  Seshadri Subbanna

IPC分类号： H01L218238

CPC分类号： H01L21/76224 ,  H01L21/763 ,  H01L21/8249

摘要： A method of forming a BiCMOS integrated circuit is provided which comprises the steps of: (a) forming a first portion of a bipolar device in first regions of a substrate; (b) forming a first protective layer over said first regions to protect said first portion of said bipolar devices; (c) forming field effect transistor devices in second regions of said substrate; (d) forming a second protective layer over said second regions of said substrate to protect said field effect transistor devices; (e) removing said first protective layer; (f) forming a second portion of said bipolar devices in said first regions of said substrate; and (g) removing said second protective layer.

摘要翻译： 提供一种形成BiCMOS集成电路的方法，其包括以下步骤：（a）在衬底的第一区域中形成双极器件的第一部分; （b）在所述第一区域上形成第一保护层以保护所述双极器件的所述第一部分; （c）在所述衬底的第二区域中形成场效应晶体管器件; （d）在所述衬底的所述第二区域上形成第二保护层以保护所述场效应晶体管器件; （e）去除所述第一保护层; （f）在所述衬底的所述第一区域中形成所述双极器件的第二部分; 和（g）去除所述第二保护层。

公开(公告)号：US07491985B2

公开(公告)日：2009-02-17

申请号：US11288843

申请日：2005-11-29

申请人： Peter J. Geiss ,  Peter B. Gray ,  Alvin J. Joseph ,  Qizhi Liu

发明人： Peter J. Geiss ,  Peter B. Gray ,  Alvin J. Joseph ,  Qizhi Liu

IPC分类号： H01L31/072 ,  H01L31/109 ,  H01L31/0328 ,  H01L31/0336

CPC分类号： H01L29/0821 ,  H01L21/8249 ,  H01L27/0623 ,  H01L29/66242 ,  H01L29/66318

摘要： A heterobipolar transistor (HBT) for high-speed BiCMOS applications is provided in which the collector resistance, Rc, is lowered by providing a buried refractory metal silicide layer underneath the shallow trench isolation region on the subcollector of the device. Specifically, the HBT of the present invention includes a substrate including at least a subcollector; a buried refractory metal silicide layer located on the subcollector; and a shallow trench isolation region located on a surface of the buried refractory metal silicide layer. The present invention also provides a method of fabricating such a HBT. The method includes forming a buried refractory metal silicide underneath the shallow trench isolation region on the subcollector of the device.

摘要翻译： 提供了用于高速BiCMOS应用的异步双极晶体管（HBT），其中通过在器件的子集电极上的浅沟槽隔离区域的下面提供掩埋难熔金属硅化物层来降低集电极电阻Rc。 具体地，本发明的HBT包括至少包括子集电极的基板; 位于子集电极上的埋置难熔金属硅化物层; 以及位于掩埋难熔金属硅化物层的表面上的浅沟槽隔离区域。 本发明还提供一种制造这种HBT的方法。 该方法包括在器件的子集电极上的浅沟槽隔离区域的下面形成埋置难熔金属硅化物。

公开(公告)号：US20080268604A1

公开(公告)日：2008-10-30

申请号：US12128077

申请日：2008-05-28

申请人： Peter J. Geiss ,  Marwan H. Khater ,  Qizhi Liu ,  Randy W. Mann ,  Robert J. Purtell ,  BethAnn Rainey ,  Jae-Sung Rieh ,  Andreas D. Stricker

发明人： Peter J. Geiss ,  Marwan H. Khater ,  Qizhi Liu ,  Randy W. Mann ,  Robert J. Purtell ,  BethAnn Rainey ,  Jae-Sung Rieh ,  Andreas D. Stricker

IPC分类号： H01L21/331

CPC分类号： H01L29/66242 ,  H01L21/28518 ,  H01L21/8249 ,  H01L27/0623 ,  H01L29/0804 ,  H01L29/456 ,  H01L29/7371

摘要： Methods for fabricating a heterojunction bipolar transistor having a raised extrinsic base is provided in which the base resistance is reduced by forming a silicide atop the raised extrinsic base that extends to the emitter region in a self-aligned manner. The silicide formation is incorporated into a BiCMOS process flow after the raised extrinsic base has been formed. The present invention also provides a heterojunction bipolar transistor having a raised extrinsic base and a silicide located atop the raised extrinsic base. The silicide atop the raised extrinsic base extends to the emitter in a self-aligned manner. The emitter is separated from the silicide by a spacer.

摘要翻译： 提供了制造具有凸起非本征基极的异质结双极晶体管的方法，其中通过在以自对准方式延伸到发射极区域的凸起的外部基极之上形成硅化物来降低基极电阻。 在形成凸起的外基之后，将硅化物形成结合到BiCMOS工艺流程中。 本发明还提供了一种异质结双极晶体管，其具有凸起的外部基极和位于凸起外部基极顶部的硅化物。 凸起的外基极上面的硅化物以自对准的方式延伸到发射极。 发射极通过间隔物与硅化物分离。