Method for making a semiconductor device that has a dual damascene interconnect
    1.
    发明授权
    Method for making a semiconductor device that has a dual damascene interconnect 失效
    制造具有双镶嵌互连的半导体器件的方法

    公开(公告)号:US06448185B1

    公开(公告)日:2002-09-10

    申请号:US09872109

    申请日:2001-06-01

    IPC分类号: H01L21302

    摘要: An improved method of forming a semiconductor device is described. In that method, a dielectric layer that comprises a carbon doped oxide is formed on a substrate. After a first etched region is formed in the dielectric layer, that region is filled with a sacrificial light absorbing material. A layer of photoresist is then deposited and patterned, followed by forming a second etched region by removing part of the sacrificial light absorbing material and a second part of the dielectric layer. Remaining portions of the photoresist are then removed by exposing the resulting device to a plasma generated from a forming gas. The device is then exposed to a solution for removing the remaining portions of the sacrificial light absorbing material.

    摘要翻译: 描述了一种形成半导体器件的改进方法。 在该方法中,在基板上形成包含碳掺杂氧化物的电介质层。 在电介质层中形成第一蚀刻区域之后,该区域填充牺牲光吸收材料。 然后沉积和图案化一层光致抗蚀剂,然后通过去除部分牺牲光吸收材料和介电层的第二部分形成第二蚀刻区域。 然后通过将所得到的装置暴露于由成形气体产生的等离子体来除去光致抗蚀剂的剩余部分。 然后将该装置暴露于溶液以除去牺牲光吸收材料的剩余部分。

    Method for making a sub 100 nanometer semiconductor device using conventional lithography steps
    2.
    发明授权
    Method for making a sub 100 nanometer semiconductor device using conventional lithography steps 失效
    使用常规光刻步骤制造亚100纳米半导体器件的方法

    公开(公告)号:US06596646B2

    公开(公告)日:2003-07-22

    申请号:US09918622

    申请日:2001-07-30

    IPC分类号: H01L21302

    CPC分类号: H01L21/32139 H01L21/31144

    摘要: A method of forming a semiconductor device is described. In that method, a masking layer is formed on a substrate. A layer of photoresist is then deposited and patterned on that layer to expose a first part of the masking layer while covering a second part of the masking layer. After the exposed part of that layer is etched, the resulting device is exposed to a plasma generated from a forming gas. Part of the second part of the masking layer is then removed by exposing the resulting device to a solution, while part of the second part of the masking layer is retained.

    摘要翻译: 描述形成半导体器件的方法。 在该方法中,在基板上形成掩模层。 然后在该层上沉积并图案化一层光致抗蚀剂以暴露掩模层的第一部分,同时覆盖掩模层的第二部分。 在蚀刻该层的暴露部分之后,将所得到的器件暴露于由成形气体产生的等离子体。 然后通过将所得到的器件暴露于溶液中去除掩模层的第二部分的一部分,同时保留掩模层的第二部分的一部分。

    Self-aligned via and plug patterning with photobuckets for back end of line (BEOL) interconnects
    3.
    发明授权
    Self-aligned via and plug patterning with photobuckets for back end of line (BEOL) interconnects 有权
    自对准通孔和插头图案化,用于后端(BEOL)互连的光触点

    公开(公告)号:US09236342B2

    公开(公告)日:2016-01-12

    申请号:US14133385

    申请日:2013-12-18

    摘要: Self-aligned via and plug patterning with photobuckets for back end of line (BEOL) interconnects is described. In an example, an interconnect structure for an integrated circuit includes a first layer of the interconnect structure disposed above a substrate, the first layer having a first grating of alternating metal lines and dielectric lines in a first direction. The dielectric lines have an uppermost surface higher than an uppermost surface of the metal lines. The integrated circuit also includes a second layer of the interconnect structure disposed above the first layer of the interconnect structure. The second layer includes a second grating of alternating metal lines and dielectric lines in a second direction, perpendicular to the first direction. The dielectric lines have a lowermost surface lower than a lowermost surface of the metal lines of the second grating. The dielectric lines of the second grating overlap and contact, but are distinct from, the dielectric lines of the first grating. The integrated circuit also includes a region of dielectric material disposed between the metal lines of the first grating and the metal lines of the second grating, and in a same plane as upper portions of the dielectric lines of the first grating and lower portions of the dielectric lines of the second grating. The region of dielectric material is composed of a cross-linked photolyzable material.

    摘要翻译: 描述了用于后端(BEOL)互连的带有光触点的自对准通孔和插头图案。 在一个示例中,用于集成电路的互连结构包括设置在衬底上方的互连结构的第一层,第一层具有在第一方向上交替的金属线和介质线的第一光栅。 介质线具有高于金属线的最上表面的最上表面。 集成电路还包括布置在互连结构的第一层之上的互连结构的第二层。 第二层包括垂直于第一方向的第二方向的交替金属线和介质线的第二光栅。 介质线具有比第二光栅的金属线的最下表面低的最低表面。 第二光栅的介质线与第一光栅的介质线重叠并接触,但不同。 集成电路还包括设置在第一光栅的金属线和第二光栅的金属线之间的电介质材料区域,并且在与第一光栅的介质线的上部和电介质的下部相同的平面中 第二光栅的线。 介电材料的区域由交联的可光致发光材料组成。

    Orientation independent electroosmotic pump
    4.
    发明授权
    Orientation independent electroosmotic pump 有权
    定向独立电渗泵

    公开(公告)号:US07645368B2

    公开(公告)日:2010-01-12

    申请号:US11125720

    申请日:2005-05-10

    IPC分类号: F04F1/00

    摘要: According to some embodiments, a method, system, and apparatus for providing an orientation independent electroosmotic pump. In some embodiments, the method includes an anode and a cathode at different electrical potentials, the anode and cathode are each sealed in an ion-exchange membrane and at least partially immersed in an electrolyte contained in a reservoir of an electroosmotic pump, collecting gases generated by electrolytic decomposition of the electrolyte within a space defined by the ion-exchange membranes that seal the anode and cathode, recombining the collected gases to produce a liquid using a catalyst, the catalyst being located outside of the reservoir, and introducing the produced liquid into the fluid reservoir through an osmotic membrane.

    摘要翻译: 根据一些实施例,一种用于提供取向独立电渗泵的方法,系统和装置。 在一些实施例中,该方法包括在不同电势下的阳极和阴极,阳极和阴极各自密封在离子交换膜中并且至少部分地浸入包含在电渗泵的储存器中的电解质中,收集产生的气体 通过在由密封阳极和阴极的离子交换膜限定的空间内电解分解电解质,使用催化剂将收集的气体重新组合以产生液体,催化剂位于储存器外部,并将所产生的液体引入 流体储存器通过渗透膜。

    SELF-ALIGNED VIA AND PLUG PATTERNING WITH PHOTOBUCKETS FOR BACK END OF LINE (BEOL) INTERCONNECTS
    7.
    发明申请
    SELF-ALIGNED VIA AND PLUG PATTERNING WITH PHOTOBUCKETS FOR BACK END OF LINE (BEOL) INTERCONNECTS 有权
    自动对准通过与背光源(BEOL)互连的光电放大器

    公开(公告)号:US20150171010A1

    公开(公告)日:2015-06-18

    申请号:US14133385

    申请日:2013-12-18

    摘要: Self-aligned via and plug patterning with photobuckets for back end of line (BEOL) interconnects is described. In an example, an interconnect structure for an integrated circuit includes a first layer of the interconnect structure disposed above a substrate, the first layer having a first grating of alternating metal lines and dielectric lines in a first direction. The dielectric lines have an uppermost surface higher than an uppermost surface of the metal lines. The integrated circuit also includes a second layer of the interconnect structure disposed above the first layer of the interconnect structure. The second layer includes a second grating of alternating metal lines and dielectric lines in a second direction, perpendicular to the first direction. The dielectric lines have a lowermost surface lower than a lowermost surface of the metal lines of the second grating. The dielectric lines of the second grating overlap and contact, but are distinct from, the dielectric lines of the first grating. The integrated circuit also includes a region of dielectric material disposed between the metal lines of the first grating and the metal lines of the second grating, and in a same plane as upper portions of the dielectric lines of the first grating and lower portions of the dielectric lines of the second grating. The region of dielectric material is composed of a cross-linked photolyzable material.

    摘要翻译: 描述了用于后端(BEOL)互连的带有光触点的自对准通孔和插头图案。 在一个示例中,用于集成电路的互连结构包括设置在衬底上方的互连结构的第一层,第一层具有在第一方向上交替的金属线和介质线的第一光栅。 介质线具有高于金属线的最上表面的最上表面。 集成电路还包括布置在互连结构的第一层之上的互连结构的第二层。 第二层包括垂直于第一方向的第二方向的交替金属线和介质线的第二光栅。 介质线具有比第二光栅的金属线的最下表面低的最低表面。 第二光栅的介质线与第一光栅的介质线重叠并接触,但不同。 集成电路还包括设置在第一光栅的金属线和第二光栅的金属线之间的电介质材料区域,并且在与第一光栅的介质线的上部和电介质的下部相同的平面中 第二光栅的线。 介电材料的区域由交联的可光致发光材料组成。

    Self-aligned via patterning with multi-colored photobuckets for back end of line (BEOL) interconnects
    8.
    发明授权
    Self-aligned via patterning with multi-colored photobuckets for back end of line (BEOL) interconnects 有权
    通过用于后端(BEOL)互连的多色photobuckets进行图案化自对准

    公开(公告)号:US09041217B1

    公开(公告)日:2015-05-26

    申请号:US14133344

    申请日:2013-12-18

    IPC分类号: H01L23/522 H01L21/768

    摘要: Self-aligned via patterning with multi-colored photobuckets for back end of line (BEOL) interconnects is described. In an example, an interconnect structure for an integrated circuit includes a first layer of the interconnect structure disposed above a substrate, the first layer including a first grating of alternating metal lines and dielectric lines in a first direction. The dielectric lines have an uppermost surface higher than an uppermost surface of the metal lines. A second layer of the interconnect structure is disposed above the first layer of the interconnect structure, the second layer including a second grating of alternating metal lines and dielectric lines in a second direction, perpendicular to the first direction. The dielectric lines have a lowermost surface lower than a lowermost surface of the metal lines of the second grating. The dielectric lines of the second grating overlap and contact, but are distinct from, the dielectric lines of the first grating. First and second dielectric regions are disposed between the metal lines of the first grating and the metal lines of the second grating, and in a same plane as upper portions of the dielectric lines of the first grating and lower portions of the dielectric lines of the second grating. The first dielectric region is composed of a first cross-linked photolyzable material, and the second dielectric region is composed of a second, different, cross-linked photolyzable material.

    摘要翻译: 描述了通过用于后端(BEOL)互连的多色photobuckets图案化的自对准。 在一个示例中,用于集成电路的互连结构包括布置在衬底上方的互连结构的第一层,第一层包括在第一方向上交替的金属线和介质线的第一光栅。 介质线具有高于金属线的最上表面的最上表面。 所述互连结构的第二层设置在所述互连结构的所述第一层上方,所述第二层包括垂直于所述第一方向的第二方向的交替金属线和介质线的第二光栅。 介质线具有比第二光栅的金属线的最下表面低的最低表面。 第二光栅的介质线与第一光栅的介质线重叠并接触,但不同。 第一和第二电介质区域设置在第一光栅的金属线和第二光栅的金属线之间,并且在与第一光栅的介电线的上部和第二栅的介电线的下部相同的平面中 光栅。 第一电介质区域由第一交联光可光化材料组成,第二电介质区域由第二不同的交联光可光化材料组成。

    Identification and characterization of a novel alpha-amylase from maize endosperm
    10.
    发明申请
    Identification and characterization of a novel alpha-amylase from maize endosperm 失效
    来自玉米胚乳的新型α-淀粉酶的鉴定和表征

    公开(公告)号:US20080134363A1

    公开(公告)日:2008-06-05

    申请号:US11891589

    申请日:2007-08-10

    摘要: SHE, a Starch Hydrolytic Enzyme active in maize endosperm (Zea mays), and the cDNA sequence encoding SHE are disclosed. The specificity of native, purified SHE is similar, in general terms, to previously known alpha-amylases. However, the activity of SHE toward amylopectin results in hydrolysis products that are distinctly different from those of other alpha-amylases. SHE, and its homologous equivalents in other plants such as rice, Arabidopsis, apple and potato, can be used in starch processing for generating different, e.g., larger sized, alpha-limit dextrins for industrial use, as compared to those generated by previously known alpha-amylases or other starch hydrolytic enzymes. In addition, modification of the expression of this enzyme in transgenic maize plants or in other transgenic organisms (including bacteria, yeast, and other plant species) can be useful for the generation of novel starch forms or altered starch metabolism.

    摘要翻译: SHE,在玉米胚乳(Zea mays)中活性的淀粉水解酶,以及编码SHE的cDNA序列。 天然纯化的SHE的特异性通常与以前已知的α-淀粉酶相似。 然而,SHE对支链淀粉的活性导致与其它α-淀粉酶明显不同的水解产物。 SHE及其在其他植物如水稻,拟南芥,苹果和马铃薯中的同源等同物可用于淀粉加工中,用于产生不同的,例如较大尺寸的工业用α限制糊精,与之前已知的 α-淀粉酶或其他淀粉水解酶。 此外,在转基因玉米植物或其他转基因生物(包括细菌,酵母和其他植物物种)中修饰该酶的表达可用于产生新的淀粉形式或改变的淀粉代谢。