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公开(公告)号:US20200235288A1
公开(公告)日:2020-07-23
申请号:US16744963
申请日:2020-01-16
Applicant: Everspin Technologies, Inc.
Inventor: Sumio IKEGAWA , Han Kyu LEE , Sanjeev AGGARWAL , Jijun SUN , Syed M. ALAM , Thomas ANDRE
Abstract: The present disclosure is drawn to, among other things, a magnetoresistive device and a magnetoresistive memory comprising a plurality of such magnetoresistive devices. In some aspects, a magnetoresistive device may include a magnetically fixed region, a magnetically free region above or below the magnetically fixed region, and an intermediate region positioned between the magnetically fixed region and the magnetically free region, wherein the intermediate region includes a first dielectric material. The magnetoresistive device may also include encapsulation layers formed on opposing side walls of the magnetically free region, wherein the encapsulation layers include the first dielectric material.
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公开(公告)号:US20240006011A1
公开(公告)日:2024-01-04
申请号:US18467996
申请日:2023-09-15
Applicant: Everspin Technologies, Inc.
Inventor: Syed M. ALAM , Jason JANESKY , Han Kyu LEE , Hamid ALMASI , Pedro SANCHEZ , Cristian P. MASGRAS , Iftekhar RAHMAN , Sumio IKEGAWA , Sanjeev AGGARWAL , Dimitri HOUSSAMEDDINE , Frederick Charles NEUMEYER
CPC classification number: G11C29/42 , G11C29/1201 , G11C2029/0407 , G11C29/4401 , G11C29/18
Abstract: The present disclosure is drawn to, among other things, a method of managing a memory device. In some aspects, the method includes determining whether a first address for a page in a first memory region is mapped in a map table, setting a target address as a second address identified in the map table as being mapped to the first address, setting the target address as the first address, determining a number of bits that fail in each word of a plurality of first-layer error correction code (ECC) words for the target address, and adding the target address to the map table, writing-back contents from the target address to a repair address in the first memory region, and updating the map table by mapping the target address to the repair address.
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公开(公告)号:US20220139488A1
公开(公告)日:2022-05-05
申请号:US17512392
申请日:2021-10-27
Applicant: Everspin Technologies, Inc.
Inventor: Syed M. ALAM , Jason JANESKY , Han Kyu LEE , Hamid ALMASI , Pedro SANCHEZ , Cristian P. MASGRAS , Iftekhar RAHMAN , Sumio IKEGAWA , Sanjeev AGGARWAL , Dimitri HOUSSAMEDDINE , Frederick Charles NEUMEYER
Abstract: The present disclosure is drawn to, among other things, a method of managing a memory device. In some aspects, the method includes determining whether a first address for a page in a first memory region is mapped in a map table, setting a target address as a second address identified in the map table as being mapped to the first address, setting the target address as the first address, determining a number of bits that fail in each word of a plurality of first-layer error correction code (ECC) words for the target address, and adding the target address to the map table, writing-back contents from the target address to a repair address in the first memory region, and updating the map table by mapping the target address to the repair address.
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公开(公告)号:US20210249589A1
公开(公告)日:2021-08-12
申请号:US16783740
申请日:2020-02-06
Applicant: Everspin Technologies, Inc.
Inventor: Sumio IKEGAWA , Hamid ALMASI , SHIMON , Kerry NAGEL , Han Kyu LEE
Abstract: A magnetoresistive device may include one or more electrodes or electrically conductive lines and a fixed region and a free region disposed between the electrodes or electrically conductive lines. The fixed region may have a fixed magnetic state and the free region may be configured to have a first magnetic state and a second magnetic state. The free region may store a first value when in the first magnetic state and store a second value when in the second magnetic state. The magnetoresistive device may further include a dielectric layer between the free region and the fixed region and a spin-Hall (SH) material proximate to at least a portion of the free region. An insertion layer may be disposed between the SH material and the free region.
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