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公开(公告)号：US09362961B2
公开(公告)日：2016-06-07
申请号：US14449483
申请日：2014-08-01
Applicant: FUJITSU LIMITED
Inventor： Hiroshi Matsumura , Toshihide Suzuki
CPC classification number: H04B1/04 , H03L7/06 , H03L7/0805 , H03L7/24 , H04B1/16
Abstract: A voltage controlled oscillator outputs an output signal whose frequency corresponds to inputted control voltage. A distributor distributes the output signal outputted from the voltage controlled oscillator. A plurality of injection-locked oscillators regulate self-oscillation frequencies according to the above frequency and output signals obtained by frequency-multiplying signals distributed by the distributor. A combiner combines and outputs the signals outputted from the plurality of injection-locked oscillators. This makes it possible to increase output power while preventing an operating band from narrowing.
Abstract translation: 压控振荡器输出频率对应于输入的控制电压的输出信号。 分配器分配从压控振荡器输出的输出信号。 多个注入锁定振荡器根据上述频率调节自振荡频率，并通过由分配器分配的信号进行倍频获得的输出信号。 组合器组合并输出从多个注入锁定振荡器输出的信号。 这使得可以增加输出功率，同时防止工作频带变窄。
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公开(公告)号：US20130326300A1
公开(公告)日：2013-12-05
申请号：US13961112
申请日：2013-08-07
Applicant: FUJITSU LIMITED
Inventor： Toshihide Suzuki , Yoichi Kawano
IPC: G01R31/3183 , H03K17/16
CPC classification number: G01R31/3183 , G01R31/2822 , H03F1/56 , H03F2200/387 , H03H11/30 , H03K17/161 , H04B1/0458 , H04L25/0278 , H04L25/0298
Abstract: A termination circuit includes a pMOS transistor configured to have a source connected with a signal terminal outputting or inputting a transmission signal, a drain connected with a grounding line, and a gate receiving a control signal, the pMOS transistor being turned on when enabling a characteristic impedance matching function and being turned off when disabling the matching function; and an inductor and a capacitor configured to be connected with the signal terminal for matching characteristic impedance.
Abstract translation: 终端电路包括：pMOS晶体管，被配置为具有与输出或输入发送信号的信号端子连接的源极，与接地线路连接的漏极以及接收控制信号的栅极，当使能特性时，pMOS晶体管导通 阻抗匹配功能，禁用匹配功能时关闭; 以及电感器和电容器，被配置为与信号端子连接以匹配特性阻抗。
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公开(公告)号：US20150229017A1
公开(公告)日：2015-08-13
申请号：US14571469
申请日：2014-12-16
Applicant: FUJITSU LIMITED
Inventor： Toshihide Suzuki , Shinya Sasaki , Koji Nozaki
CPC classification number: H01P5/107 , H01L21/568 , H01L23/66 , H01L24/19 , H01L24/20 , H01L2223/6627 , H01L2223/6677 , H01L2224/04105 , H01L2224/16225 , H01L2224/48091 , H01L2924/1815 , H01L2924/18162 , H01P11/002 , Y10T29/49018 , H01L2924/00014
Abstract: A high frequency module includes a metal housing including a waveguide, and a package unit that includes a back short positioned on an extension of the waveguide, a semiconductor chip, and an antenna coupler positioned between the waveguide and the back short and in which the back short and the semiconductor chip are integrated by resin and the antenna coupler and the semiconductor chip are electrically coupled with each other by a redistribution line.
Abstract translation: 高频模块包括包括波导的金属外壳和包括位于波导的延伸部上的背部短路的封装单元，半导体芯片和位于波导与背部短路之间的天线耦合器，其中背面 并且半导体芯片通过树脂集成，并且天线耦合器和半导体芯片通过再分配线彼此电耦合。
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公开(公告)号：US09509058B2
公开(公告)日：2016-11-29
申请号：US14740507
申请日：2015-06-16
Applicant: FUJITSU LIMITED
Inventor： Hiroshi Matsumura , Daijiro Ishibashi , Toshihide Suzuki , Yoichi Kawano
CPC classification number: H01Q19/10 , H01L21/56 , H01L21/561 , H01L21/568 , H01L23/293 , H01L23/3107 , H01L23/66 , H01L24/19 , H01L24/20 , H01L24/96 , H01L24/97 , H01L2223/6677 , H01L2224/04105 , H01L2224/12105 , H01L2224/18 , H01L2224/24195 , H01L2224/73259 , H01L2924/18162 , H01L2924/19105 , H01Q1/2283 , H01Q7/00
Abstract: A high-frequency module includes an integrated body including a semiconductor chip and a reflector, the semiconductor and the reflector being integrated by a resin; an antenna provided with a space from the reflector; and a rewiring layer provided on the surface of the integrated body, the rewiring layer including a rewiring line electrically coupling the semiconductor chip to the antenna. Further, a method for manufacturing a high-frequency module, the method includes forming an integrated body by integrating a semiconductor chip with a reflector by a resin; and forming a rewiring layer on the surface of the integrated body, the rewiring layer including a rewiring line electrically coupling the semiconductor chip to an antenna provided with a space from the reflector.
Abstract translation: 高频模块包括：包括半导体芯片和反射器的集成主体，半导体和反射器由树脂集成; 天线，设置有从所述反射器的空间; 以及设置在整体的表面上的再布线层，重新布线层包括将半导体芯片电耦合到天线的再布线。 此外，一种制造高频模块的方法，该方法包括通过树脂将半导体芯片与反射器集成来形成集成体; 以及在所述集成体的表面上形成再布线层，所述重新布线层包括将所述半导体芯片电耦合到从所述反射器设置有空间的天线的再布线。
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公开(公告)号：US20160006131A1
公开(公告)日：2016-01-07
申请号：US14740507
申请日：2015-06-16
Applicant: FUJITSU LIMITED
Inventor： Hiroshi Matsumura , Daijiro Ishibashi , Toshihide Suzuki , Yoichi Kawano
CPC classification number: H01Q19/10 , H01L21/56 , H01L21/561 , H01L21/568 , H01L23/293 , H01L23/3107 , H01L23/66 , H01L24/19 , H01L24/20 , H01L24/96 , H01L24/97 , H01L2223/6677 , H01L2224/04105 , H01L2224/12105 , H01L2224/18 , H01L2224/24195 , H01L2224/73259 , H01L2924/18162 , H01L2924/19105 , H01Q1/2283 , H01Q7/00
Abstract: A high-frequency module includes an integrated body including a semiconductor chip and a reflector, the semiconductor and the reflector being integrated by a resin; an antenna provided with a space from the reflector; and a rewiring layer provided on the surface of the integrated body, the rewiring layer including a rewiring line electrically coupling the semiconductor chip to the antenna. Further, a method for manufacturing a high-frequency module, the method includes forming an integrated body by integrating a semiconductor chip with a reflector by a resin; and forming a rewiring layer on the surface of the integrated body, the rewiring layer including a rewiring line electrically coupling the semiconductor chip to an antenna provided with a space from the reflector.
Abstract translation: 高频模块包括：包括半导体芯片和反射器的集成主体，半导体和反射器由树脂集成; 天线，设置有从所述反射器的空间; 以及设置在整体的表面上的再布线层，重新布线层包括将半导体芯片电耦合到天线的再布线。 此外，一种制造高频模块的方法，该方法包括通过树脂将半导体芯片与反射器集成来形成集成体; 以及在所述集成体的表面上形成再布线层，所述重新布线层包括将所述半导体芯片电耦合到从所述反射器设置有空间的天线的再布线。
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Patent Agency Ranking
公开(公告)号：US20150028957A1
公开(公告)日：2015-01-29
申请号：US14322531
申请日：2014-07-02
Applicant: FUJITSU LIMITED
Inventor： Toshihide Suzuki , Hiroshi Matsumura
CPC classification number: H03L7/18 , H03L7/0992
Abstract: A PLL device includes a variable frequency oscillator and a frequency divider section. The variable frequency oscillator varies an oscillation frequency in response to a control signal including information on a phase difference between a reference signal and a frequency division signal and oscillates an output signal obtained by multiplying a frequency of the reference signal. The frequency divider section frequency-divides the output signal to generate the frequency division signal. An injection locked frequency divider is arranged in the frequency divider section, the control signal is input to the injection locked frequency divider, and the operation frequency of the injection locked frequency divider is controlled by the control signal.
Abstract translation: PLL装置包括可变频率振荡器和分频器部分。 可变频率振荡器响应于包括关于参考信号和分频信号之间的相位差的信息的控制信号而改变振荡频率，并且振荡通过乘以参考信号的频率而获得的输出信号。 分频器部分频率分频输出信号以产生分频信号。 在分频器部分设置一个注入锁定分频器，控制信号输入到注入锁定分频器，并通过控制信号控制注入锁定分频器的工作频率。
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公开(公告)号：US20140284804A1
公开(公告)日：2014-09-25
申请号：US14172020
申请日：2014-02-04
Applicant: FUJITSU LIMITED
Inventor： Toshihide Suzuki , Masaru Sato
IPC: H01L23/48
CPC classification number: H01L23/481 , H01L23/5223 , H01L23/5225 , H01L23/66 , H01L2924/0002 , H01L2924/00
Abstract: A semiconductor device includes a first electrode formed on a substrate, the first electrode being a first electrical potential; and a second electrode formed on the first electrode, the second electrode including a signal wiring that transmits a signal and a planar electrode part with a prescribed area. A shape of the first electrode corresponding to the planar electrode part is made into a slit shape such that a longitudinal direction of a slit is parallel to a direction in which the signal proceeds in the planar electrode part.
Abstract translation: 半导体器件包括形成在衬底上的第一电极，第一电极是第一电位; 以及形成在所述第一电极上的第二电极，所述第二电极包括发送信号的信号线和具有规定区域的平面电极部。 对应于平面电极部分的第一电极的形状被制成狭缝形状，使得狭缝的纵向方向平行于在平面电极部分中信号进行的方向。
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公开(公告)号：US09069043B2
公开(公告)日：2015-06-30
申请号：US13961112
申请日：2013-08-07
Applicant: FUJITSU LIMITED
Inventor： Toshihide Suzuki , Yoichi Kawano
IPC: H03K17/16 , H03K19/003 , G01R31/3183 , H04L25/02 , H03H11/30 , H03F1/56 , G01R31/28 , H04B1/04
CPC classification number: G01R31/3183 , G01R31/2822 , H03F1/56 , H03F2200/387 , H03H11/30 , H03K17/161 , H04B1/0458 , H04L25/0278 , H04L25/0298
Abstract: A termination circuit includes a pMOS transistor configured to have a source connected with a signal terminal outputting or inputting a transmission signal, a drain connected with a grounding line, and a gate receiving a control signal, the pMOS transistor being turned on when enabling a characteristic impedance matching function and being turned off when disabling the matching function; and an inductor and a capacitor configured to be connected with the signal terminal for matching characteristic impedance.
Abstract translation: 终端电路包括：pMOS晶体管，被配置为具有与输出或输入发送信号的信号端子连接的源极，与接地线路连接的漏极以及接收控制信号的栅极，当使能特性时，pMOS晶体管导通 阻抗匹配功能，禁用匹配功能时关闭; 以及电感器和电容器，被配置为与信号端子连接以匹配特性阻抗。
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公开(公告)号：US09252078B2
公开(公告)日：2016-02-02
申请号：US14172020
申请日：2014-02-04
Applicant: FUJITSU LIMITED
Inventor： Toshihide Suzuki , Masaru Sato
IPC: H01L23/34 , H01L23/48 , H01L23/522 , H01L23/66
CPC classification number: H01L23/481 , H01L23/5223 , H01L23/5225 , H01L23/66 , H01L2924/0002 , H01L2924/00
Abstract: A semiconductor device includes a first electrode formed on a substrate, the first electrode being a first electrical potential; and a second electrode formed on the first electrode, the second electrode including a signal wiring that transmits a signal and a planar electrode part with a prescribed area. A shape of the first electrode corresponding to the planar electrode part is made into a slit shape such that a longitudinal direction of a slit is parallel to a direction in which the signal proceeds in the planar electrode part.
Abstract translation: 半导体器件包括形成在衬底上的第一电极，第一电极是第一电位; 以及形成在所述第一电极上的第二电极，所述第二电极包括发送信号的信号线和具有规定区域的平面电极部。 对应于平面电极部分的第一电极的形状被制成狭缝形状，使得狭缝的纵向方向平行于在平面电极部分中信号进行的方向。
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公开(公告)号：US20150072630A1
公开(公告)日：2015-03-12
申请号：US14449483
申请日：2014-08-01
Applicant: FUJITSU LIMITED
Inventor： Hiroshi Matsumura , Toshihide Suzuki
CPC classification number: H04B1/04 , H03L7/06 , H03L7/0805 , H03L7/24 , H04B1/16
Abstract: A voltage controlled oscillator outputs an output signal whose frequency corresponds to inputted control voltage. A distributor distributes the output signal outputted from the voltage controlled oscillator. A plurality of injection-locked oscillators regulate self-oscillation frequencies according to the above frequency and output signals obtained by frequency-multiplying signals distributed by the distributor. A combiner combines and outputs the signals outputted from the plurality of injection-locked oscillators. This makes it possible to increase output power while preventing an operating band from narrowing.
Abstract translation: 压控振荡器输出频率对应于输入的控制电压的输出信号。 分配器分配从压控振荡器输出的输出信号。 多个注入锁定振荡器根据上述频率调节自振荡频率，并通过由分配器分配的信号进行倍频获得的输出信号。 组合器组合并输出从多个注入锁定振荡器输出的信号。 这使得可以增加输出功率，同时防止工作频带变窄。
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