利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

40 条记录 (耗时 0.036 秒)

    Counteracting overtunneling in nonvolatile memory cells
    2.
    发明授权
    Counteracting overtunneling in nonvolatile memory cells 有权
    在非易失性存储单元中反作用超导

    公开(公告)号：US07573749B2

    公开(公告)日：2009-08-11

    申请号：US11731228

    申请日：2007-03-29

    申请人： Christopher J. Diorio ,  Chad A. Lindhorst ,  Shailendra Srinivas ,  Alberto Pesavento ,  Troy N. Gilliland

    发明人： Christopher J. Diorio ,  Chad A. Lindhorst ,  Shailendra Srinivas ,  Alberto Pesavento ,  Troy N. Gilliland

    IPC分类号： G11C11/34

    CPC分类号： G11C16/3468 ,  G11C16/3404 ,  G11C16/3472 ,  G11C16/3477 ,  G11C16/3486 ,  G11C2216/10

    摘要： Methods and apparatuses prevent overtunneling in nonvolatile floating gate memory (NVM) cells. An individual cell includes a circuit with a transistor that has a floating gate that stores charge, and a capacitor structure for extracting charge from the gate, such as by tunneling. A counteracting circuit prevents extracting charge from the floating gate beyond a threshold, therefore preventing overtunneling or correcting for it. In one embodiment, the counteracting circuit supplies electrons to the floating gate, to compensate for tunneling beyond a point. In another embodiment, the counteracting circuit includes a switch, and a sensor to trigger the switch when the appropriate threshold is reached. The switch may be arranged in any number of suitable ways, such as to prevent a high voltage from being applied to the capacitor structure, or to prevent a power supply from being applied to a terminal of the transistor or to a well of the transistor.

    摘要翻译： 方法和装置防止非易失性浮动栅极存储器（NVM）单元中的超导。 单个电池包括具有晶体管的电路，其具有存储电荷的浮动栅极，以及用于从栅极提取电荷的电容器结构，例如通过隧道。 反作用电路防止从浮动栅极提取电荷超过阈值，因此防止对其进行过度隧穿或纠正。 在一个实施例中，反作用电路将电子提供给浮动栅极，以补偿超出点的隧穿。 在另一个实施例中，抵消电路包括开关和当达到适当的阈值时触发开关的传感器。 开关可以以任何数量的适当方式布置，例如防止高电压施加到电容器结构，或者防止电源施加到晶体管的端子或晶体管的阱。

    Counteracting overtunneling in nonvolatile memory cells using charge extraction control
    3.
    发明授权
    Counteracting overtunneling in nonvolatile memory cells using charge extraction control 有权
    使用电荷提取控制在非易失性存储单元中对抗超导

    公开(公告)号：US07212446B2

    公开(公告)日：2007-05-01

    申请号：US10830280

    申请日：2004-04-21

    申请人： Christopher J. Diorio ,  Chad A. Lindhorst ,  Shailendra Srinivas ,  Alberto Pesavento ,  Troy N. Gilliland

    发明人： Christopher J. Diorio ,  Chad A. Lindhorst ,  Shailendra Srinivas ,  Alberto Pesavento ,  Troy N. Gilliland

    IPC分类号： G11C11/34

    CPC分类号： G11C16/3468 ,  G11C16/3404 ,  G11C16/3472 ,  G11C16/3477 ,  G11C16/3486 ,  G11C2216/10

    摘要： Methods and apparatuses prevent overtunneling in nonvolatile floating gate memory (NVM) cells. An individual cell includes a circuit with a transistor that has a floating gate that stores charge, and a capacitor structure for extracting charge from the gate, such as by tunneling. A counteracting circuit prevents extracting charge from the floating gate beyond a threshold, therefore preventing overtunneling or correcting for it. In one embodiment, the counteracting circuit supplies electrons to the floating gate, to compensate for tunneling beyond a point. In another embodiment, the counteracting circuit includes a switch, and a sensor to trigger the switch when the appropriate threshold is reached. The switch may be arranged in any number of suitable ways, such as to prevent a high voltage from being applied to the capacitor structure, or to prevent a power supply from being applied to a terminal of the transistor or to a well of the transistor.

    摘要翻译： 方法和装置防止非易失性浮动栅极存储器（NVM）单元中的超导。 单个电池包括具有存储电荷的浮动栅极的晶体管的电路，以及用于从栅极提取电荷的电容器结构，例如通过隧道。 反作用电路防止从浮动栅极提取电荷超过阈值，因此防止对其进行过度隧穿或纠正。 在一个实施例中，反作用电路将电子提供给浮动栅极，以补偿超出点的隧穿。 在另一个实施例中，抵消电路包括开关和当达到适当的阈值时触发开关的传感器。 开关可以以任何数量的适当方式布置，例如防止高电压施加到电容器结构，或者防止电源施加到晶体管的端子或晶体管的阱。

    Rewriteable electronic fuses
    5.
    发明授权
    Rewriteable electronic fuses 有权
    可重写电子保险丝

    公开(公告)号：US07388420B2

    公开(公告)日：2008-06-17

    申请号：US10814866

    申请日：2004-03-30

    申请人： Christopher J. Diorio ,  Frédéric J. Bernard ,  Todd E. Humes ,  Alberto Pesavento

    发明人： Christopher J. Diorio ,  Frédéric J. Bernard ,  Todd E. Humes ,  Alberto Pesavento

    IPC分类号： H01H37/76

    CPC分类号： G11C16/0441 ,  G11C7/20 ,  G11C14/00 ,  G11C16/045

    摘要： Rewriteable electronic fuses include latches and/or logic gates coupled to one or more nonvolatile memory elements. The nonvolatile memory elements are configured to be programmed to memory values capable of causing associated electronic circuits to settle to predetermined states as power-up or reset signals are applied to the fuses. Although not required, the nonvolatile memory elements used in the rewriteable electronic fuses may comprise floating-gate transistors. An amount of charge stored on the floating gate of a given floating-gate transistor determines the memory value and, consequently, the state to which a fuse settles upon power-up or reset of the fuse.

    摘要翻译： 可重写电子熔丝包括耦合到一个或多个非易失性存储元件的锁存器和/或逻辑门。 非易失性存储器元件被配置为被编程为能够使相关联的电子电路稳定到预定状态的存储器值，因为上电或复位信号被施加到保险丝。 虽然不是必需的，但是在可重写电子熔丝中使用的非易失性存储元件可以包括浮栅晶体管。 存储在给定浮栅晶体管的浮置栅极上的电荷量确定存储器值，并且因此确定保险丝上电或复位时保险丝熔断的状态。

    Rewriteable electronic fuses
    7.
    发明授权
    Rewriteable electronic fuses 有权
    可重写电子保险丝

    公开(公告)号：US07177182B2

    公开(公告)日：2007-02-13

    申请号：US10814868

    申请日：2004-03-30

    申请人： Christopher J. Diorio ,  Frédéric J. Bernard ,  Todd E. Humes ,  Alberto Pesavento

    发明人： Christopher J. Diorio ,  Frédéric J. Bernard ,  Todd E. Humes ,  Alberto Pesavento

    IPC分类号： G11C16/04 ,  G11C17/18

    CPC分类号： G11C16/0441 ,  G11C16/045 ,  G11C16/10

    摘要： Rewriteable electronic fuses include latches and/or logic gates coupled to one or more nonvolatile memory elements. The nonvolatile memory elements are configured to be programmed to memory values capable of causing associated electronic circuits to settle to predetermined states as power-up or reset signals are applied to the fuses. Although not required, the nonvolatile memory elements used in the rewriteable electronic fuses may comprise floating-gate transistors. An amount of charge stored on the floating gate of a given floating-gate transistor determines the memory value and, consequently, the state to which a fuse settles upon power-up or reset of the fuse.

    摘要翻译： 可重写电子熔丝包括耦合到一个或多个非易失性存储元件的锁存器和/或逻辑门。 非易失性存储器元件被配置为被编程为能够使相关联的电子电路稳定到预定状态的存储器值，因为上电或复位信号被施加到保险丝。 虽然不是必需的，但是在可重写电子熔丝中使用的非易失性存储元件可以包括浮栅晶体管。 存储在给定浮栅晶体管的浮置栅极上的电荷量确定存储器值，并且因此确定保险丝上电或复位时保险丝熔断的状态。

    pFET nonvolatile memory
    8.
    发明授权
    pFET nonvolatile memory 有权
    pFET非易失性存储器

    公开(公告)号：US07221596B2

    公开(公告)日：2007-05-22

    申请号：US10839985

    申请日：2004-05-05

    申请人： Alberto Pesavento ,  Frédéric J. Bernard ,  John D. Hyde

    发明人： Alberto Pesavento ,  Frédéric J. Bernard ,  John D. Hyde

    IPC分类号： G11C16/06

    CPC分类号： G11C16/0441 ,  G11C16/28 ,  G11C2216/10 ,  H01L27/115 ,  H01L29/7883

    摘要： A nonvolatile memory cell is constructed using a floating-gate (FG) pFET Readout Transistor (RT) having its source tied to a power source (Vdd) and its drain providing a current which can be sensed to determine a cell state. The gate of the RT provides for charge/information storage. A control capacitor structure (CCS) having terminals coupled to a first voltage source and the FG and a tunneling capacitor structure (TCS) having terminals coupled to a second voltage source and the FG are utilized in each embodiment. The CCS has much more capacitance than the TCS. Manipulation of the voltages applied to the first voltage source and second voltage source (and Vdd) controls an electric field across the CCS and pFET dielectrics and thus Fowler-Nordheim tunneling of electrons onto and off of the FG, thus controlling the charge on the FG and the information stored thereon.

    摘要翻译： 使用其源极连接到电源（Vdd）的浮栅（FG）pFET读出晶体管（RT）构成非易失性存储单元，其漏极提供可被感测以确定单元状态的电流。 RT的门提供充电/信息存储。 具有耦合到第一电压源的端子和具有耦合到第二电压源和FG的端子的隧道电容器结构（TCS）的控制电容器结构（CCS）在每个实施例中被使用。 CCS具有比TCS多得多的电容。 对施加到第一电压源和第二电压源（和Vdd）的电压的操纵控制跨越CCS和pFET电介质的电场，并且因此Fowler-Nordheim隧道电子进入FG和FG，从而控制FG上的电荷 以及存储在其上的信息。

    MTP NVM elements by-passed for programming
    9.
    发明授权
    MTP NVM elements by-passed for programming 有权
    MTP NVM元素被旁路进行编程

    公开(公告)号：US07289358B2

    公开(公告)日：2007-10-30

    申请号：US11335185

    申请日：2006-01-18

    申请人： Alberto Pesavento ,  Troy N. Gilliland ,  Frederic J. Bernard

    发明人： Alberto Pesavento ,  Troy N. Gilliland ,  Frederic J. Bernard

    IPC分类号： G11C11/34

    CPC分类号： G11C16/3459 ,  G11C16/06 ,  G11C17/16

    摘要： Non-Volatile Memory (NVM) cells include a selection circuit for providing an output based on selecting between an input data signal and an output of a Multiple Time Programmable (MTP) NVM element. The input data signal may be latched by a latch circuit such as a flip-flop first. The selector circuit's output is used to confirm the programming values for the MTP NVM element such that the element can be programmed correctly without losing time by reading the programmed MTP NVM element or reprogramming a misprogrammed element.

    摘要翻译： 非易失性存储器（NVM）单元包括用于基于输入数据信号与多时间可编程（MTP）NVM元件的输出之间的选择来提供输出的选择电路。 输入数据信号可以由诸如触发器的锁存电路首先锁存。 选择器电路的输出用于确认MTP NVM元件的编程值，使得可以通过读取编程的MTP NVM元件或重新编程未编程的元件而无需花费时间编程元件。

    Method and apparatus for preventing overtunneling in pFET-based nonvolatile memory cells
    10.
    发明授权
    Method and apparatus for preventing overtunneling in pFET-based nonvolatile memory cells 有权
    用于防止基于pFET的非易失性存储单元中的过度隧穿的方法和装置

    公开(公告)号：US06853583B2

    公开(公告)日：2005-02-08

    申请号：US10245183

    申请日：2002-09-16

    申请人： Christopher J. Diorio ,  Chad Lindhorst ,  Shail Srinivas ,  Alberto Pesavento ,  Troy Gilliland

    发明人： Christopher J. Diorio ,  Chad Lindhorst ,  Shail Srinivas ,  Alberto Pesavento ,  Troy Gilliland

    IPC分类号： G11C16/34 ,  G11C16/06

    CPC分类号： G11C16/3477 ,  G11C16/3404 ,  G11C16/3468 ,  G11C16/3472

    摘要： Methods and apparatuses prevent overtunneling in pFET-based nonvolatile floating gate memory (NVM) cells. During a tunneling process, in which charge carriers are removed from a floating gate of a pFET-based NVM cell, a channel current of a memory cell transistor is monitored and compared to a predetermined minimum channel current required to maintain a conducting channel in an injection transistor of the memory cell. When the monitored channel current drops below the predetermined minimum channel current, charge carriers are injected onto the floating gate by impact-ionized hot-electron injection (IHEI) so that overtunneling is avoided.

    摘要翻译： 方法和装置可以防止基于pFET的非易失性浮动栅极存储器（NVM）单元中的超导。 在其中从基于pFET的NVM单元的浮置栅极去除电荷载流子的隧穿过程中，监测存储单元晶体管的沟道电流，并将其与在注入中维持导通通道所需的预定最小沟道电流进行比较 晶体管的存储单元。 当监测的通道电流下降到预定的最小通道电流以下时，电荷载流子通过冲击电离热电子注入（IHEI）注入到浮动栅极上，从而避免了超导。