公开(公告)号：US07834409B2

公开(公告)日：2010-11-16

申请号：US11883671

申请日：2006-01-25

申请人： Frank Reichenbach ,  Franz Laermer ,  Silvia Kronmueller ,  Christoph Schelling ,  Tino Fuchs ,  Christina Leinenbach

发明人： Frank Reichenbach ,  Franz Laermer ,  Silvia Kronmueller ,  Christoph Schelling ,  Tino Fuchs ,  Christina Leinenbach

IPC分类号： H01L29/82 ,  H01L21/00

CPC分类号： G01L9/0073 ,  B81B2203/0127 ,  B81B2203/0315 ,  B81C1/00182 ,  G01L9/0042 ,  H04R19/005 ,  H04R19/04 ,  H04R31/00

摘要： A micromechanical component having a conductive substrate, an elastically deflectable diaphragm including at least one conductive layer, which is provided over a front side of the substrate, the conductive layer being electrically insulated from the substrate, a hollow space, which is provided between the substrate and the diaphragm and is filled with a medium, and a plurality of perforation openings, which run under the diaphragm through the substrate, the perforation openings providing access to the hollow space from a back surface of the substrate, so that a volume of the medium located in the hollow space may change when the diaphragm is deflected. Also described is a corresponding manufacturing method.

摘要翻译： 一种具有导电基底的微机械元件，包括至少一个导电层的弹性可偏转隔膜，该导电层设置在基板的前侧，导电层与基板电绝缘，中空空间设置在基板 和隔膜，并且填充有介质，以及多个穿孔，其在隔膜下方穿过基底，穿孔开口提供从基底的背面进入中空空间，使得一定体积的介质 当隔膜偏转时，位于中空空间中的位置可能会改变。 还描述了相应的制造方法。

公开(公告)号：US20090026561A1

公开(公告)日：2009-01-29

申请号：US11883671

申请日：2006-01-25

申请人： Frank Reichenbach ,  Franz Laermer ,  Silvia Kronmueller ,  Christoph Schelling ,  Tino Fuchs ,  Christina Leinenbach

发明人： Frank Reichenbach ,  Franz Laermer ,  Silvia Kronmueller ,  Christoph Schelling ,  Tino Fuchs ,  Christina Leinenbach

IPC分类号： H01L29/84 ,  H01L21/02

CPC分类号： G01L9/0073 ,  B81B2203/0127 ,  B81B2203/0315 ,  B81C1/00182 ,  G01L9/0042 ,  H04R19/005 ,  H04R19/04 ,  H04R31/00

摘要： A micromechanical component having a conductive substrate, an elastically deflectable diaphragm including at least one conductive layer, which is provided over a front side of the substrate, the conductive layer being electrically insulated from the substrate, a hollow space, which is provided between the substrate and the diaphragm and is filled with a medium, and a plurality of perforation openings, which run under the diaphragm through the substrate, the perforation openings providing access to the hollow space from a back surface of the substrate, so that a volume of the medium located in the hollow space may change when the diaphragm is deflected. Also described is a corresponding manufacturing method.

摘要翻译： 一种具有导电基底的微机械元件，包括至少一个导电层的弹性可偏转隔膜，该导电层设置在基板的前侧，导电层与基板电绝缘，中空空间设置在基板 和隔膜，并且填充有介质，以及多个穿孔，其在隔膜下方穿过基底，穿孔开口提供从基底的背面进入中空空间，使得一定体积的介质 当隔膜偏转时，位于中空空间中的位置可能会改变。 还描述了相应的制造方法。

公开(公告)号：US20080311751A1

公开(公告)日：2008-12-18

申请号：US11658461

申请日：2005-07-01

申请人： Franz Laermer ,  Silvia Kronmueller ,  Tino Fuchs ,  Christina Leinenbach

发明人： Franz Laermer ,  Silvia Kronmueller ,  Tino Fuchs ,  Christina Leinenbach

IPC分类号： H01L21/311 ,  H01L21/306

CPC分类号： H01L21/32137 ,  B81C1/00476 ,  B81C1/00595 ,  H01L21/3065 ,  H01L21/30655

摘要： A method for etching a layer that is to be removed on a substrate, in which a Si1-xGex layer is the layer to be removed, this layer being removed, at least in areas, in gas phase etching with the aid of an etching gas, in particular ClF3. The etching behavior of the Si1-xGex layer can be controlled via the Ge portion in the Si1-xGex layer. The etching method is particularly well-suited for manufacturing self-supporting structures in a micromechanical sensor and for manufacturing such self-supporting structures in a closed hollow space, because the Si1-xGex layer, as a sacrificial layer or filling layer, is etched highly selectively relative to silicon.

摘要翻译： 在蚀刻气体辅助下，在气相蚀刻中至少在区域中蚀刻要除去的层的方法，其中Si1-xGex层是要去除的层，Si1-xGex层被去除的层， ，特别是ClF3。 可以通过Si1-xGex层中的Ge部分来控制Si1-xGex层的蚀刻行为。 蚀刻方法特别适用于在微机械传感器中制造自支撑结构，并且在封闭的中空空间中制造这种自支撑结构，因为作为牺牲层或填充层的Si1-xGex层被高度蚀刻 选择性地相对于硅。

公开(公告)号：US08182707B2

公开(公告)日：2012-05-22

申请号：US11658461

申请日：2005-07-01

申请人： Franz Laermer ,  Silvia Kronmueller ,  Tino Fuchs ,  Christina Leinenbach

发明人： Franz Laermer ,  Silvia Kronmueller ,  Tino Fuchs ,  Christina Leinenbach

IPC分类号： B44C1/22 ,  C03C15/00 ,  C03C25/68 ,  C23F1/00

CPC分类号： H01L21/32137 ,  B81C1/00476 ,  B81C1/00595 ,  H01L21/3065 ,  H01L21/30655

摘要： A method for etching a layer that is to be removed on a substrate, in which a Si1-xGex layer is the layer to be removed, this layer being removed, at least in areas, in gas phase etching with the aid of an etching gas, in particular ClF3. The etching behavior of the Si1-xGex layer can be controlled via the Ge portion in the Si1-xGex layer. The etching method is particularly well-suited for manufacturing self-supporting structures in a micromechanical sensor and for manufacturing such self-supporting structures in a closed hollow space, because the Si1-xGex layer, as a sacrificial layer or filling layer, is etched highly selectively relative to silicon.

摘要翻译： 在蚀刻气体辅助下，在气相蚀刻中至少在区域中蚀刻要除去的层的方法，其中Si1-xGex层是要去除的层，Si1-xGex层被去除的层， ，特别是ClF3。 可以通过Si1-xGex层中的Ge部分来控制Si1-xGex层的蚀刻行为。 蚀刻方法特别适用于在微机械传感器中制造自支撑结构，并且在封闭的中空空间中制造这种自支撑结构，因为作为牺牲层或填充层的Si1-xGex层被高度蚀刻 选择性地相对于硅。

公开(公告)号：US07851248B2

公开(公告)日：2010-12-14

申请号：US12305150

申请日：2007-08-21

申请人： Silvia Kronmueller ,  Tino Fuchs ,  Ando Feyh ,  Christina Leinenbach ,  Marco Lammer

发明人： Silvia Kronmueller ,  Tino Fuchs ,  Ando Feyh ,  Christina Leinenbach ,  Marco Lammer

IPC分类号： H01L21/00

CPC分类号： B81C1/00333 ,  B81C2201/0115 ,  B81C2201/0132 ,  B81C2203/0136 ,  B81C2203/0145

摘要： A capping technology is provided in which, despite the fact that structures which are surrounded by a silicon-germanium filling layer are exposed using ClF3 etching through micropores in the silicon cap, an etching attack on the silicon cap is prevented, namely, either by particularly selective (approximately 10,000:1 or higher) adjustment of the etching process itself, or by using the finding that the oxide of a germanium-rich layer, in contrast to oxidized porous silicon, is not stable but instead may be easily dissolved, to protect the silicon cap.

摘要翻译： 提供了一种封盖技术，尽管事实上，利用ClF3蚀刻通过硅盖中的微孔暴露由硅 - 锗填充层包围的结构，但是防止了对硅帽的蚀刻攻击，即特别地 选择性（大约10,000:1或更高）调整蚀刻工艺本身，或通过使用与氧化多孔硅相反的富锗层的氧化物不稳定但可以容易地溶解的发现来保护 硅帽。

公开(公告)号：US20100003790A1

公开(公告)日：2010-01-07

申请号：US12305150

申请日：2007-08-21

申请人： Silvia Kronmueller ,  Tino Fuchs ,  Ando Feyh ,  Christina Leinenbach ,  Marco Lammer

发明人： Silvia Kronmueller ,  Tino Fuchs ,  Ando Feyh ,  Christina Leinenbach ,  Marco Lammer

IPC分类号： H01L21/50

CPC分类号： B81C1/00333 ,  B81C2201/0115 ,  B81C2201/0132 ,  B81C2203/0136 ,  B81C2203/0145

摘要： A capping technology is provided in which, despite the fact that structures which are surrounded by a silicon-germanium filling layer are exposed using ClF3 etching through micropores in the silicon cap, an etching attack on the silicon cap is prevented, namely, either by particularly selective (approximately 10,000:1 or higher) adjustment of the etching process itself, or by using the finding that the oxide of a germanium-rich layer, in contrast to oxidized porous silicon, is not stable but instead may be easily dissolved, to protect the silicon cap.

摘要翻译： 提供了一种封盖技术，尽管事实上，利用ClF3蚀刻通过硅盖中的微孔暴露由硅 - 锗填充层包围的结构，但是防止了对硅帽的蚀刻攻击，即特别地 选择性（大约10,000:1或更高）调整蚀刻工艺本身，或通过使用与氧化多孔硅相反的富锗层的氧化物不稳定但可以容易地溶解的发现来保护 硅帽。

公开(公告)号：US20100203739A1

公开(公告)日：2010-08-12

申请号：US12452692

申请日：2008-07-02

申请人： Volker Becker ,  Franz Laermer ,  Tino Fuchs ,  Christina Leinenbach

发明人： Volker Becker ,  Franz Laermer ,  Tino Fuchs ,  Christina Leinenbach

IPC分类号： H01L21/306 ,  C23F1/08

CPC分类号： H01L21/3065 ,  B81C1/00531 ,  B81C1/00595 ,  B81C2201/0132 ,  B81C2201/0138 ,  H01L21/02019 ,  H01L21/30621 ,  H01L21/32135

摘要： A method for selective etching of an SiGe mixed semiconductor layer on a silicon semiconductor substrate by dry chemical etching of the SiGe mixed semiconductor layer with the aid of an etching gas selected from the group including ClF3 and/or ClF5, a gas selected from the group including Cl2 and/or HCl being added to the etching gas.

摘要翻译： 借助于选自ClF3和/或ClF5的蚀刻气体，通过SiGe混合半导体层的干法化学蚀刻来选择性地蚀刻硅半导体衬底上的SiGe混合半导体层的方法， 包括添加到蚀刻气体中的Cl 2和/或HCl。

公开(公告)号：US20120018779A1

公开(公告)日：2012-01-26

申请号：US12740607

申请日：2008-10-13

申请人： Franz Laermer ,  Tino Fuchs ,  Christina Leinenbach

发明人： Franz Laermer ,  Tino Fuchs ,  Christina Leinenbach

IPC分类号： H01L29/06 ,  H01L21/20

CPC分类号： B81C1/00103 ,  B81B2203/0384 ,  B81C2201/0136

摘要： A method for producing micromechanical patterns having a relief-like sidewall outline shape or an angle of inclination that is able to be set, the micromechanical patterns being etched out of a SiGe mixed semiconductor layer that is present on or deposited on a silicon semiconductor substrate, by dry chemical etching of the SiGe mixed semiconductor layer; the sidewall outline shape of the micromechanical pattern being developed by varying the germanium proportion in the SiGe mixed semiconductor layer that is to be etched; a greater germanium proportion being present in regions that are to be etched more strongly; the variation in the germanium proportion in the SiGe mixed semiconductor layer being set by a method selected from the group including depositing a SiGe mixed semiconductor layer having varying germanium content, introducing germanium into a silicon semiconductor layer or a SiGe mixed semiconductor layer, introducing silicon into a germanium layer or an SiGe mixed semiconductor layer and/or by thermal oxidation of a SiGe mixed semiconductor layer.

摘要翻译： 一种用于生产具有凸起状侧壁轮廓形状或能够被设定的倾斜角的微机械图案的方法，从存在于或沉积在硅半导体衬底上的SiGe混合半导体层中蚀刻微机械图案， 通过干法化学蚀刻SiGe混合半导体层; 通过改变要蚀刻的SiGe混合半导体层中的锗比例来显影微机械图案的侧壁轮廓形状; 存在于要被更强蚀刻的区域中更大的锗比例; SiGe混合半导体层中的锗比例的变化通过选自包括沉积具有不同锗含量的SiGe混合半导体层，将锗引入到硅半导体层或SiGe混合半导体层中的方法来设置，将硅引入 锗层或SiGe混合半导体层和/或通过SiGe混合半导体层的热氧化。

公开(公告)号：US08946090B2

公开(公告)日：2015-02-03

申请号：US12452692

申请日：2008-07-02

申请人： Volker Becker ,  Franz Laermer ,  Tino Fuchs ,  Christina Leinenbach

发明人： Volker Becker ,  Franz Laermer ,  Tino Fuchs ,  Christina Leinenbach

IPC分类号： H01L21/302 ,  H01L21/3065 ,  H01L21/306 ,  H01L21/02 ,  B81C1/00 ,  H01L21/3213

CPC分类号： H01L21/3065 ,  B81C1/00531 ,  B81C1/00595 ,  B81C2201/0132 ,  B81C2201/0138 ,  H01L21/02019 ,  H01L21/30621 ,  H01L21/32135

摘要： A method for selective etching of an SiGe mixed semiconductor layer on a silicon semiconductor substrate by dry chemical etching of the SiGe mixed semiconductor layer with the aid of an etching gas selected from the group including ClF3 and/or ClF5, a gas selected from the group including Cl2 and/or HCl being added to the etching gas.

摘要翻译： 借助于选自ClF3和/或ClF5的蚀刻气体，通过SiGe混合半导体层的干法化学蚀刻来选择性地蚀刻硅半导体衬底上的SiGe混合半导体层的方法， 包括添加到蚀刻气体中的Cl 2和/或HCl。

公开(公告)号：US08501516B2

公开(公告)日：2013-08-06

申请号：US12740607

申请日：2008-10-13

申请人： Franz Laermer ,  Tino Fuchs ,  Christina Leinenbach

发明人： Franz Laermer ,  Tino Fuchs ,  Christina Leinenbach

IPC分类号： H01L21/306

CPC分类号： B81C1/00103 ,  B81B2203/0384 ,  B81C2201/0136

摘要： A method for producing micromechanical patterns having a relief-like sidewall outline shape or an angle of inclination that is able to be set, the micromechanical patterns being etched out of a SiGe mixed semiconductor layer that is present on or deposited on a silicon semiconductor substrate, by dry chemical etching of the SiGe mixed semiconductor layer; the sidewall outline shape of the micromechanical pattern being developed by varying the germanium proportion in the SiGe mixed semiconductor layer that is to be etched; a greater germanium proportion being present in regions that are to be etched more strongly; the variation in the germanium proportion in the SiGe mixed semiconductor layer being set by a method selected from the group including depositing a SiGe mixed semiconductor layer having varying germanium content, introducing germanium into a silicon semiconductor layer or a SiGe mixed semiconductor layer, introducing silicon into a germanium layer or an SiGe mixed semiconductor layer and/or by thermal oxidation of a SiGe mixed semiconductor layer.

摘要翻译： 一种用于生产具有凸起状侧壁轮廓形状或能够被设定的倾斜角的微机械图案的方法，从存在于或沉积在硅半导体衬底上的SiGe混合半导体层中蚀刻微机械图案， 通过干法化学蚀刻SiGe混合半导体层; 通过改变要蚀刻的SiGe混合半导体层中的锗比例来显影微机械图案的侧壁轮廓形状; 存在于要被更强蚀刻的区域中更大的锗比例; SiGe混合半导体层中的锗比例的变化通过选自包括沉积具有不同锗含量的SiGe混合半导体层，将锗引入到硅半导体层或SiGe混合半导体层中的方法来设置，将硅引入 锗层或SiGe混合半导体层和/或通过SiGe混合半导体层的热氧化。