公开(公告)号：US20120202300A1

公开(公告)日：2012-08-09

申请号：US13020339

申请日：2011-02-03

申请人： Frank Yu ,  Eric Hsieh ,  Twu Ares ,  Wei-Lung Hsu

发明人： Frank Yu ,  Eric Hsieh ,  Twu Ares ,  Wei-Lung Hsu

IPC分类号： H01L21/66 ,  B23K31/12

CPC分类号： H01L22/12 ,  H01L24/743 ,  H01L24/75 ,  H01L24/83 ,  H01L2224/32245 ,  H01L2224/83855 ,  H01L2224/83908 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01075 ,  H01L2924/01082 ,  H01L2924/12041 ,  H01L2924/15787 ,  H01L2924/00

摘要： A method for assembling integrated circuit (IC) devices includes dispensing a die attach adhesive onto a surface of a workpiece using a die bonding system, and placing an IC die on the die attach adhesive at surface of the workpiece to form an IC device. A pre-cure bond line thickness (pre-cure BLT) value is automatically optically measured for the die attach adhesive. The IC device is unloaded from the die bonding system after automatically optically measuring. The method can include comparing the pre-cure BLT value to a pre-cure BLT specification range, and if the pre-cure BLT value is outside the pre-cure BLT specification range, adjusting at least one die attach adhesive dispensing parameter based on the pre-cure BLT value for subsequent assembling. The adjusting can be automatic adjusting and the adjustment can be to the Z height parameter of the bond arm.

摘要翻译： 集成电路（IC）装置的组装方法包括使用管芯接合系统将管芯附着粘合剂分散到工件的表面上，并将IC管芯粘附在工件的表面上，形成IC器件。 对于芯片附着粘合剂，自动光学测量预固化粘合线厚度（预固化BLT）值。 自动光学测量后，IC芯片从裸片粘接系统卸载。 该方法可以包括将预固化BLT值与预固化BLT规格范围进行比较，如果预固化BLT值在预固化BLT规格范围之外，则调整至少一个管芯附着粘合剂分配参数，基于 预固化BLT值用于后续组装。 调整可以进行自动调整，调整可以达到接合臂的Z高度参数。

公开(公告)号：US20090236715A1

公开(公告)日：2009-09-24

申请号：US12050722

申请日：2008-03-18

申请人： Kazuaki Ano ,  Frank Yu ,  Wei Lung Hsu

发明人： Kazuaki Ano ,  Frank Yu ,  Wei Lung Hsu

IPC分类号： H01L23/00 ,  H01L21/50

CPC分类号： H01L24/83 ,  H01L24/32 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/32057 ,  H01L2224/83051 ,  H01L2224/83191 ,  H01L2224/83194 ,  H01L2224/83365 ,  H01L2224/83385 ,  H01L2224/83855 ,  H01L2225/06568 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/14 ,  H01L2924/30105 ,  H01L2924/3025

摘要： The invention relates to microelectronic semiconductor chip assemblies having vertically stacked layers. In a disclosed example of a preferred embodiment, a vertically stacked semiconductor chip assembly includes a first semiconductor chip affixed to the surface of a substrate. A laminated interposing layer therebetween includes a first adhesive material and a second adhesive material, at least one of the adhesive materials adapted to capturing debris. Methods are disclosed for making a vertically stacked semiconductor chip assemblies by joining first and second adhesive materials to form a laminated interposing layer between a first chip and second chip or substrate. In preferred embodiments of the invention, the interposing layer includes polyimide film and one adhesive material of relatively low elasticity, and another adhesive material having relatively high elasticity.

摘要翻译： 本发明涉及具有垂直堆叠层的微电子半导体芯片组件。 在优选实施例的公开示例中，垂直堆叠的半导体芯片组件包括固定到基板表面的第一半导体芯片。 其间的层叠中介层包括第一粘合材料和第二粘合材料，至少一种粘合剂材料适于捕获碎片。 公开了通过接合第一和第二粘合剂材料来形成垂直堆叠的半导体芯片组件以在第一芯片和第二芯片或衬底之间形成层叠的中介层的方法。 在本发明的优选实施例中，插入层包括聚酰亚胺膜和一种弹性相对较低的粘合材料，另一种粘合材料具有较高的弹性。

公开(公告)号：US20120199285A1

公开(公告)日：2012-08-09

申请号：US13020311

申请日：2011-02-03

申请人： Frank Yu ,  Eric Hsieh ,  Kevin Jin

发明人： Frank Yu ,  Eric Hsieh ,  Kevin Jin

IPC分类号： B32B7/12 ,  B29C47/36

CPC分类号： B05C11/10 ,  B29C47/0009 ,  B29C47/026

摘要： A method for die bonding includes positioning a dispenser in a die bonding apparatus, wherein the dispenser includes a reservoir having bonding adhesive therein including particles and a liquid carrier. The dispenser is moved to provide mechanical agitation to the dispenser for mixing the bonding adhesive into a homogeneous mixture of particles and the liquid carrier, wherein the bonding adhesive is not dispensed during moving. After the moving, the bonding adhesive is dispensed onto a bonding location on the workpiece without removing the dispenser from the die attach apparatus. An integrated circuit (IC) die is attached onto the bonding adhesive over the bonding location. The method can also include determining an amount of time elapsed after the last mixing of the bonding adhesive or the positioning of the dispenser in the die bonding apparatus, and automatically initiating movement for mixing only if the elapsed time exceeds a predetermined time.

摘要翻译： 一种用于芯片接合的方法包括将分配器定位在芯片接合装置中，其中分配器包括其中具有粘合剂的储存器，其中包括颗粒和液体载体。 移动分配器以向分配器提供机械搅拌，用于将粘合粘合剂混合成粒子和液体载体的均匀混合物，其中粘合粘合剂在移动期间不分配。 在移动之后，将粘合粘合剂分配到工件上的粘合位置上，而不从管芯附接装置移除分配器。 集成电路（IC）管芯在接合位置附着在粘结粘合剂上。 该方法还可以包括确定在粘合粘合剂的最后混合之后经过的时间量或分散器在芯片粘合装置中的定位，以及仅在经过时间超过预定时间时才自动启动混合运动。

公开(公告)号：US20120040477A1

公开(公告)日：2012-02-16

申请号：US12856180

申请日：2010-08-13

申请人： Frank Yu ,  Eric Hsieh ,  Ares Twu ,  W. L. Hsu

发明人： Frank Yu ,  Eric Hsieh ,  Ares Twu ,  W. L. Hsu

IPC分类号： H01L21/66 ,  B05C5/00

CPC分类号： H01L22/20 ,  H01L22/12 ,  H01L24/743 ,  H01L2224/83192

摘要： A method and apparatus for dispensing a volume of die attach adhesive onto a surface can include an optical system which images the dispensed volume of die attach adhesive. A two-dimensional area covered by the die attach adhesive and a die attach dispense pressure can be used as a comparison with a reference value to determine whether the volume of die attach adhesive dispensed is sufficient. The reference value can take into account viscosity changes of the die attach adhesive, so that the volume of die attach adhesive dispensed during production can be determined. The volume dispensed can be automatically adjusted in situ during production using a computer system.

摘要翻译： 用于将体积的管芯附着粘合剂分配到表面上的方法和设备可以包括对分配的管芯附着粘合剂体积进行成像的光学系统。 可以使用由芯片附着粘合剂覆盖的二维区域和管芯附着分配压力作为与参考值的比较，以确定分配的管芯附着粘合剂的体积是否足够。 参考值可以考虑管芯附着粘合剂的粘度变化，从而可以确定在生产期间分配的管芯附着粘合剂的体积。 在使用计算机系统的生产期间，分配的体积可以在现场自动调整。

公开(公告)号：US08668794B2

公开(公告)日：2014-03-11

申请号：US13020311

申请日：2011-02-03

申请人： Frank Yu ,  Eric Hsieh ,  Kevin Jin

发明人： Frank Yu ,  Eric Hsieh ,  Kevin Jin

IPC分类号： B32B41/00

CPC分类号： B05C11/10 ,  B29C47/0009 ,  B29C47/026

摘要： A method for die bonding includes positioning a dispenser in a die bonding apparatus, wherein the dispenser includes a reservoir having bonding adhesive therein including particles and a liquid carrier. The dispenser is moved to provide mechanical agitation to the dispenser for mixing the bonding adhesive into a homogeneous mixture of particles and the liquid carrier, wherein the bonding adhesive is not dispensed during moving. After the moving, the bonding adhesive is dispensed onto a bonding location on the workpiece without removing the dispenser from the die attach apparatus. An integrated circuit (IC) die is attached onto the bonding adhesive over the bonding location. The method can also include determining an amount of time elapsed after the last mixing of the bonding adhesive or the positioning of the dispenser in the die bonding apparatus, and automatically initiating movement for mixing only if the elapsed time exceeds a predetermined time.

摘要翻译： 一种用于芯片接合的方法包括将分配器定位在芯片接合装置中，其中分配器包括其中具有粘合剂的储存器，其中包括颗粒和液体载体。 移动分配器以向分配器提供机械搅拌，用于将粘合粘合剂混合成粒子和液体载体的均匀混合物，其中粘合粘合剂在移动期间不分配。 在移动之后，将粘合粘合剂分配到工件上的粘合位置上，而不从管芯附接装置移除分配器。 集成电路（IC）管芯在接合位置附着在粘结粘合剂上。 该方法还可以包括确定在粘合粘合剂的最后混合之后经过的时间量或分散器在芯片粘合装置中的定位，以及仅在经过时间超过预定时间时才自动启动混合运动。

公开(公告)号：US08452912B2

公开(公告)日：2013-05-28

申请号：US12576216

申请日：2009-10-08

申请人： Charles C. Lee ,  Frank Yu ,  Abraham C. Ma

发明人： Charles C. Lee ,  Frank Yu ,  Abraham C. Ma

IPC分类号： G06F12/00

CPC分类号： G06F12/0246 ,  G06F12/0866 ,  G06F2212/1036 ,  G06F2212/214 ,  G06F2212/7203 ,  G06F2212/7207 ,  G11C13/0004 ,  G11C16/102 ,  G11C19/0808 ,  G11C2211/5641 ,  G11C2216/30

摘要： A flash memory solid-state-drive (SSD) has a smart storage switch that reduces write acceleration that occurs when more data is written to flash memory than is received from the host. Page mapping rather than block mapping reduces write acceleration. Host commands are loaded into a Logical-Block-Address (LBA) range FIFO. Entries are sub-divided and portions invalidated when a new command overlaps an older command in the FIFO. Host data is aligned to page boundaries with pre- and post-fetched data filling in to the boundaries. Repeated data patterns are detected and encoded by compressed meta-data codes that are stored in meta-pattern entries in a meta-pattern cache of a meta-pattern flash block. The sector data is not written to flash. The meta-pattern entries are located using a meta-data mapping table. Storing host CRC's for comparison to incoming host data can detect identical data writes that can be skipped, avoiding a write to flash.

摘要翻译： 闪存固态驱动器（SSD）具有智能存储交换机，可以减少写入快速写入的速度，而写入速度会比从主机接收到的更多的数据写入闪存。 页面映射而不是块映射减少写入加速。 主机命令加载到逻辑块地址（LBA）范围FIFO中。 当新命令与FIFO中的旧命令重叠时，条目被分割，部分无效。 主机数据与页边界对齐，前后获取的数据填充到边界。 通过存储在元模式闪存块的元模式高速缓存中的元模式条目中的压缩元数据代码来检测和编码重复的数据模式。 扇区数据未写入闪存。 使用元数据映射表定位元模式条目。 存储主机CRC用于与传入主机数据进行比较可以检测可跳过的相同数据写入，避免写入闪存。

公开(公告)号：US08176238B2

公开(公告)日：2012-05-08

申请号：US13104257

申请日：2011-05-10

申请人： Frank Yu ,  Charles C. Lee ,  Abraham C. Ma

发明人： Frank Yu ,  Charles C. Lee ,  Abraham C. Ma

IPC分类号： G06F12/00 ,  G06F13/00 ,  G06F13/28

CPC分类号： G06F12/0246 ,  G06F3/061 ,  G06F3/0659 ,  G06F3/0688 ,  G06F12/0607 ,  G06F2212/7208 ,  G11C13/0004

摘要： A flash module has raw-NAND flash memory chips accessed over a physical-block address (PBA) bus by a NVM controller. The NVM controller is on the flash module or on a system board for a solid-state disk (SSD). The NVM controller converts logical block addresses (LBA) to physical block addresses (PBA). Data striping and interleaving among multiple channels of the flash modules is controlled at a high level by a smart storage transaction manager, while further interleaving and remapping within a channel may be performed by the NVM controllers. A SDRAM buffer is used by a smart storage switch to cache host data before writing to flash memory. A Q-R pointer table stores quotients and remainders of division of the host address. The remainder points to a location of the host data in the SDRAM. A command queue stores Q, R for host commands.

摘要翻译： 闪存模块具有通过NVM控制器通过物理块地址（PBA）总线访问的原始NAND闪存芯片。 NVM控制器位于闪存模块或固态硬盘（SSD）的系统板上。 NVM控制器将逻辑块地址（LBA）转换为物理块地址（PBA）。 闪存模块的多个通道之间的数据条带化和交织由智能存储事务管理器控制在高电平，而在信道内的进一步的交织和重新映射可由NVM控制器执行。 智能存储交换机使用SDRAM缓冲区，在写入闪存之前缓存主机数据。 Q-R指针表存储主机地址的商和余数。 剩余部分指向SDRAM中主机数据的位置。 命令队列存储主机命令的Q，R。

公开(公告)号：US07707354B2

公开(公告)日：2010-04-27

申请号：US11876251

申请日：2007-10-22

申请人： Charles C. Lee ,  David Q. Chow ,  Abraham C. Ma ,  Frank Yu ,  Ming-Shiang Shen

发明人： Charles C. Lee ,  David Q. Chow ,  Abraham C. Ma ,  Frank Yu ,  Ming-Shiang Shen

IPC分类号： G06F12/00

CPC分类号： G06F12/0866 ,  G06F2212/2022 ,  G06F2212/2515

摘要： A flash microcontroller has a Static Random-Access-Memory (SRAM) buffer that stores several blocks of boot code read from a flash memory. The SRAM buffer also operates as a cache of flash data after booting is complete. Cache read and write hits use the SRAM cache rather than flash memory, while old cache lines and read misses access the flash memory. Both the external host and the microcontroller are booted from boot code buffered in the SRAM buffer. A boot-loader state machine reads the flash ID and programs flash parameter registers with timing parameters for the flash memory. The flash microcontroller uses a differential interface to the external host, with a differential transceiver and a differential serial interface. Frame, packet, and encoded clock processing is also performed by the serial interface.

摘要翻译： 闪存微控制器具有静态随机存取存储器（SRAM）缓冲器，其存储从闪存读取的几个引导代码块。 引导完成后，SRAM缓冲区还可以作为闪存数据缓存。 缓存读取和写入命中使用SRAM缓存而不是闪存，而旧的缓存行和读取未命中访问闪存。 外部主机和微控制器均由缓冲在SRAM缓冲区中的引导代码引导。 引导加载器状态机读取闪存ID，并使用Flash存储器的时序参数对闪存参数寄存器进行编程。 闪存单片机使用与外部主机的差分接口，具有差分收发器和差分串行接口。 帧，分组和编码时钟处理也由串行接口执行。

公开(公告)号：US20100027329A1

公开(公告)日：2010-02-04

申请号：US12579695

申请日：2009-10-15

申请人： Charles C. Lee ,  Frank Yu ,  David Q. Chow

发明人： Charles C. Lee ,  Frank Yu ,  David Q. Chow

IPC分类号： G11C11/00 ,  G11C7/10 ,  G11C7/00

CPC分类号： G11C8/08 ,  G11C8/06 ,  G11C8/12 ,  G11C11/5678 ,  G11C13/0004 ,  G11C13/0023 ,  G11C13/0028 ,  G11C13/0061 ,  G11C13/0069 ,  G11C2013/0071 ,  G11C2013/0085 ,  G11C2213/79

摘要： Phase-change memory (PCM) cells store data using alloy resistors in high-resistance amorphous and low-resistance crystalline states. The time of the memory cell's set-current pulse can be 100 ns, much longer than read or reset times. The write time thus depends on the write data and is relatively long. A page-mode caching PCM device has a lookup table (LUT) that caches write data that is later written to an array of PCM banks. Host data is latched into a line FIFO and written into the LUT, reducing write delays to the relatively slow PCM. Host read data can be supplied by the LUT or fetched from the PCM banks. A multi-line page buffer between the PCM banks and LUT allows for larger block transfers using the LUT. Error-correction code (ECC) checking and generation is performed for data in the LUT, hiding ECC delays for data writes into the PCM banks.

摘要翻译： 相变存储器（PCM）单元使用高电阻非晶和低电阻晶体状态的合金电阻存储数据。 存储单元的设定电流脉冲的时间可以是100 ns，比读取或复位时间长得多。 因此，写入时间取决于写入数据并且相对较长。 页面模式缓存PCM设备具有高速缓存写入数据的查找表（LUT），该数据稍后被写入PCM存储体阵列。 主机数据被锁存到行FIFO中并写入LUT中，从而将写入延迟减少到相对较慢的PCM。 主机读取数据可由LUT提供或从PCM存储区中提取。 PCM组和LUT之间的多行页面缓冲区允许使用LUT进行更大的块传输。 对LUT中的数据执行纠错码（ECC）检查和生成，将ECC数据写入PCM存储体中隐藏ECC延迟。

公开(公告)号：US20080320214A1

公开(公告)日：2008-12-25

申请号：US12186471

申请日：2008-08-05

申请人： Abraham C. Ma ,  David Q. Chow ,  Charles C. Lee ,  Frank Yu

发明人： Abraham C. Ma ,  David Q. Chow ,  Charles C. Lee ,  Frank Yu

IPC分类号： G06F12/02

CPC分类号： G06F12/0246 ,  G06F3/0613 ,  G06F3/0616 ,  G06F3/064 ,  G06F3/0658 ,  G06F3/0664 ,  G06F3/0688 ,  G06F2212/7201 ,  G06F2212/7208 ,  G06F2212/7211 ,  G11C13/0004

摘要： A solid-state disk (SSD) has a smart storage switch with a smart storage transaction manager that re-orders host commands for accessing downstream single-chip flash-memory devices. Each single-chip flash-memory device has a lower-level controller that converts logical block addresses (LBA) to physical block addresses (PBA) that access flash memory blocks in the single-chip flash-memory device. Wear-leveling and bad block remapping are preformed by each single-chip flash-memory device, and at a higher level by a virtual storage processor in the smart storage switch. Virtual storage bridges between the smart storage transaction manager and the single-chip flash-memory devices bridge LBA transactions over LBA buses to the single-chip flash-memory devices. Data striping and interleaving among multiple channels of the single-chip flash-memory device is controlled at a high level by the smart storage transaction manager, while further interleaving and remapping may be performed within each single-chip flash-memory device.

摘要翻译： 固态磁盘（SSD）具有智能存储交换机，智能存储交易管理器重新命令用于访问下游单芯片闪存设备的主机命令。 每个单芯片闪存设备具有将逻辑块地址（LBA）转换为访问单芯片闪存设备中的闪存块的物理块地址（PBA）的较低级别的控制器。 磨损均衡和坏块重映射由每个单芯片闪存设备执行，并且在智能存储交换机中的虚拟存储处理器处于更高级别。 智能存储事务管理器和单芯片闪存设备之间的虚拟存储网桥将LBA总线上的LBA交易桥接到单芯片闪存设备。 单芯片闪速存储器件的多个通道之间的数据条带化和交错由智能存储事务管理器控制在高电平，而可以在每个单芯片闪速存储器件内执行进一步的交错和重新映射。