公开(公告)号：US07304343B2

公开(公告)日：2007-12-04

申请号：US11084648

申请日：2005-03-16

申请人： Fujio Masuoka ,  Shinji Horii ,  Takuji Tanigami ,  Takashi Yokoyama

发明人： Fujio Masuoka ,  Shinji Horii ,  Takuji Tanigami ,  Takashi Yokoyama

IPC分类号： H01L29/76

CPC分类号： H01L29/66825 ,  H01L27/115 ,  H01L27/11556 ,  H01L29/7887 ,  H01L29/7923

摘要： The present invention provides a semiconductor memory device including: a semiconductor substrate of a first conductivity type; and a memory cell including: (i) a columnar semiconductor portion formed on the substrate, (ii) at least two charge-storage layers formed around a periphery of the columnar semiconductor portion and divided in a direction vertical to the semiconductor substrate, and (iii) a control gate that covers at least a portion of charge-storage layers, wherein the memory cell is capable of holding two-bit or more data.

摘要翻译： 本发明提供一种半导体存储器件，包括：第一导电类型的半导体衬底; 以及存储单元，包括：（i）形成在所述基板上的柱状半导体部，（ii）形成在所述柱状半导体部的周围的并且沿与所述半导体基板垂直的方向分割的至少两个电荷存储层，和 iii）覆盖电荷存储层的至少一部分的控制栅极，其中所述存储器单元能够保持两位或更多数据。

公开(公告)号：US20050035399A1

公开(公告)日：2005-02-17

申请号：US10912751

申请日：2004-08-04

申请人： Fujio Masuoka ,  Shinji Horii ,  Takuji Tanigami ,  Takashi Yokoyama ,  Noboru Takeuchi

发明人： Fujio Masuoka ,  Shinji Horii ,  Takuji Tanigami ,  Takashi Yokoyama ,  Noboru Takeuchi

IPC分类号： H01L27/108 ,  H01L21/265 ,  H01L21/28 ,  H01L21/336 ,  H01L21/8247 ,  H01L27/115 ,  H01L29/06 ,  H01L29/423 ,  H01L29/78 ,  H01L29/786 ,  H01L29/788 ,  H01L29/792

CPC分类号： H01L21/26586 ,  H01L27/115 ,  H01L27/11556 ,  H01L29/0623 ,  H01L29/0646 ,  H01L29/0649 ,  H01L29/0657 ,  H01L29/40114 ,  H01L29/40117 ,  H01L29/42384 ,  H01L29/42392 ,  H01L29/66484 ,  H01L29/66666 ,  H01L29/66742 ,  H01L29/66825 ,  H01L29/66833 ,  H01L29/7828 ,  H01L29/78642 ,  H01L29/78648 ,  H01L29/78696

摘要： A semiconductor device comprising a memory cell which includes: a pillar-shaped semiconductor layer of a first conductive type formed on a semiconductor substrate; source and drain diffusion layers of a second conductive type formed in upper and lower portions of the pillar-shaped semiconductor layer; a semiconductor layer of the second conductive type or a cavity formed inside the pillar-shaped semiconductor layer; and a gate electrode formed on a side face of the pillar-shaped semiconductor layer via a gate insulating film, or a control gate electrode formed on the side face of the pillar-shaped semiconductor layer via a charge accumulation layer.

摘要翻译： 一种半导体器件，包括存储单元，其包括：形成在半导体衬底上的第一导电类型的柱状半导体层; 在柱状半导体层的上部和下部形成的第二导电类型的源极和漏极扩散层; 第二导电类型的半导体层或形成在柱状半导体层内部的空腔; 以及经由栅极绝缘膜形成在柱状半导体层的侧面上的栅电极，或者经由电荷累积层形成在柱状半导体层的侧面上的控制栅电极。

公开(公告)号：US20050037621A1

公开(公告)日：2005-02-17

申请号：US10917043

申请日：2004-08-11

申请人： Fujio Masuoka ,  Shinji Horii ,  Takuji Tanigami ,  Takashi Yokoyama

发明人： Fujio Masuoka ,  Shinji Horii ,  Takuji Tanigami ,  Takashi Yokoyama

IPC分类号： H01J37/32 ,  H01L21/302 ,  H01L21/3065 ,  H01L21/311 ,  H01L21/3213 ,  H01L21/425

CPC分类号： H01L21/32136 ,  H01L21/3065 ,  H01L21/31116 ,  H01L21/32137

摘要： An etching method for a semiconductor device comprising the steps of: generating an etching species atmosphere above the semiconductor device having a step composed of a main surface and a sidewall; and applying an electric field to accelerate the etching species in one direction and a magnetic field along a plane that crosses the one direction at a specific angle so that the sidewall is etched.

摘要翻译： 一种用于半导体器件的蚀刻方法，包括以下步骤：在具有由主表面和侧壁构成的台阶的半导体器件之上产生蚀刻物质气氛; 以及施加电场以沿一个方向加速蚀刻物质和沿着与特定角度穿过所述一个方向的平面的磁场，使得侧壁被蚀刻。

公开(公告)号：US20070278625A1

公开(公告)日：2007-12-06

申请号：US10592034

申请日：2005-03-07

申请人： Fujio Masuoka ,  Takashi Yokoyama ,  Takuji Tanigami ,  Shinji Horii

发明人： Fujio Masuoka ,  Takashi Yokoyama ,  Takuji Tanigami ,  Shinji Horii

IPC分类号： H01L23/48 ,  H01L21/20

CPC分类号： H01L21/28273 ,  H01L21/823487 ,  H01L27/115 ,  H01L27/11521 ,  H01L27/11524 ,  H01L27/11568 ,  H01L29/66825 ,  H01L29/7881 ,  H01L29/792 ,  H01L29/7926

摘要： A semiconductor device, which is characterized by that two or more island-shaped semiconductor layers including first and second island-shaped semiconductor layers are formed on the same substrate, at least the first island-shaped semiconductor layer has steps in its side wall so that sectional area of a cross section parallel to the surface of the substrate varies stepwise with respect to height in the vertical direction, the second island-shaped semiconductor layer is different from the first island-shaped semiconductor layer with respect to the presence/absence of a step in the side wall or the number of steps, and each of the first and second island-shaped semiconductor layers provides an element on a stair part of the side wall divided by the steps or on the side wall having no steps.

摘要翻译： 一种半导体器件，其特征在于，在同一衬底上形成包括第一和第二岛状半导体层的两个或多个岛状半导体层，至少第一岛状半导体层在其侧壁上具有台阶，使得 与基板的表面平行的截面的截面积相对于垂直方向的高度逐步变化，第二岛状半导体层相对于第一岛状半导体层的存在/不存在而不同 第一和第二岛状半导体层中的每一个在侧壁分隔的侧壁的台阶部分或不具有台阶的侧壁上提供元件。

公开(公告)号：US20050037600A1

公开(公告)日：2005-02-17

申请号：US10918515

申请日：2004-08-12

申请人： Fujio Masuoka ,  Shinji Horii ,  Takuji Tanigami ,  Takashi Yokoyama

发明人： Fujio Masuoka ,  Shinji Horii ,  Takuji Tanigami ,  Takashi Yokoyama

IPC分类号： H01L21/265 ,  H01L21/8247 ,  H01L27/115 ,  H01L29/788 ,  H01L29/792 ,  H01L21/00 ,  H01L21/425

CPC分类号： H01L21/26586

摘要： An ion implantation method for implanting ions into a side wall of a protruded semiconductor layer from a semiconductor substrate, the method includes applying an electric field to accelerate the ions in one direction and applying a magnetic field parallel to a plane extending at a predetermined angle with respect to the one direction, thereby controlling a direction of the ion implantation to the side wall.

摘要翻译： 一种用于从半导体衬底将离子注入到突出的半导体层的侧壁中的离子注入方法，所述方法包括：施加电场以加速沿一个方向的离子，并施加平行于以预定角度延伸的平面的磁场与 相对于该一个方向，从而控制离子注入到侧壁的方向。

公开(公告)号：US07388245B2

公开(公告)日：2008-06-17

申请号：US10592034

申请日：2005-03-07

申请人： Fujio Masuoka ,  Takashi Yokoyama ,  Takuji Tanigami ,  Shinji Horii

发明人： Fujio Masuoka ,  Takashi Yokoyama ,  Takuji Tanigami ,  Shinji Horii

IPC分类号： H01L29/423

CPC分类号： H01L21/28273 ,  H01L21/823487 ,  H01L27/115 ,  H01L27/11521 ,  H01L27/11524 ,  H01L27/11568 ,  H01L29/66825 ,  H01L29/7881 ,  H01L29/792 ,  H01L29/7926

摘要： A semiconductor device, which is characterized by that two or more island-shaped semiconductor layers including first and second island-shaped semiconductor layers are formed on the same substrate, at least the first island-shaped semiconductor layer has steps in its side wall so that sectional area of a cross section parallel to the surface of the substrate varies stepwise with respect to height in the vertical direction, the second island-shaped semiconductor layer is different from the first island-shaped semiconductor layer with respect to the presence/absence of a step in the side wall or the number of steps, and each of the first and second island-shaped semiconductor layers provides an element on a stair part of the side wall divided by the steps or on the side wall having no steps.

摘要翻译： 一种半导体器件，其特征在于，在同一衬底上形成包括第一和第二岛状半导体层的两个或多个岛状半导体层，至少第一岛状半导体层在其侧壁上具有台阶，使得 与基板的表面平行的截面的截面积相对于垂直方向的高度逐步变化，第二岛状半导体层相对于第一岛状半导体层的存在/不存在而不同 第一和第二岛状半导体层中的每一个在侧壁分隔的侧壁的台阶部分或不具有台阶的侧壁上提供元件。

公开(公告)号：US07061038B2

公开(公告)日：2006-06-13

申请号：US10727266

申请日：2003-12-04

申请人： Tetsuo Endoh ,  Fujio Masuoka ,  Takuji Tanigami ,  Takashi Yokoyama ,  Shinji Horii

发明人： Tetsuo Endoh ,  Fujio Masuoka ,  Takuji Tanigami ,  Takashi Yokoyama ,  Shinji Horii

IPC分类号： H01L29/76

CPC分类号： H01L27/0207 ,  G11C16/0483 ,  H01L21/28273 ,  H01L21/28282 ,  H01L21/84 ,  H01L27/115 ,  H01L27/11519 ,  H01L27/11553 ,  H01L27/11556 ,  H01L27/11568 ,  H01L27/1203 ,  H01L29/0692 ,  H01L29/66825 ,  H01L29/66833 ,  H01L29/7881 ,  H01L29/792 ,  H01L29/7926

摘要： The present invention provides a semiconductor memory device comprising: a first conductivity type semiconductor substrate; and a plurality of memory cells constituted of an island-like semiconductor layer which is formed on the semiconductor substrate, and a charge storage layer and a control gate which are formed entirely or partially around a sidewall of the island-like semiconductor layer, wherein the plurality of memory cells are disposed in series, the island-like semiconductor layer which constitutes the memory cells has cross-sectional areas varying in stages in a horizontal direction of the semiconductor substrate, and an insulating film capable of passing charges is provided at least in a part of a plane of the island-like semiconductor layer horizontal to the semiconductor substrate.

摘要翻译： 本发明提供一种半导体存储器件，包括：第一导电型半导体衬底; 以及由在半导体衬底上形成的岛状半导体层和电荷存储层和控制栅极构成的多个存储单元，其形成在岛状半导体层的侧壁的整个或部分周围，其中， 多个存储单元被串联设置，构成存储单元的岛状半导体层具有在半导体衬底的水平方向上分级变化的横截面区域，并且能够至少在 岛状半导体层的与半导体衬底水平的平面的一部分。

公开(公告)号：US07060598B2

公开(公告)日：2006-06-13

申请号：US10918515

申请日：2004-08-12

申请人： Fujio Masuoka ,  Shinji Horii ,  Takuji Tanigami ,  Takashi Yokoyama

发明人： Fujio Masuoka ,  Shinji Horii ,  Takuji Tanigami ,  Takashi Yokoyama

IPC分类号： H01L21/425

CPC分类号： H01L21/26586

摘要： An ion implantation method for implanting ions into a side wall of a protruded semiconductor layer from a semiconductor substrate, the method includes applying an electric field to accelerate the ions in one direction and applying a magnetic field parallel to a plane extending at a predetermined angle with respect to the one direction, thereby controlling a direction of the ion implantation to the side wall.

摘要翻译： 一种用于从半导体衬底将离子注入到突出的半导体层的侧壁中的离子注入方法，所述方法包括：施加电场以加速沿一个方向的离子，并施加平行于以预定角度延伸的平面的磁场与 相对于该一个方向，从而控制离子注入到侧壁的方向。

公开(公告)号：US20050224847A1

公开(公告)日：2005-10-13

申请号：US11084648

申请日：2005-03-16

申请人： Fujio Masuoka ,  Shinji Horii ,  Takuji Tanigami ,  Takashi Yokoyama

发明人： Fujio Masuoka ,  Shinji Horii ,  Takuji Tanigami ,  Takashi Yokoyama

IPC分类号： H01L21/336 ,  H01L21/8247 ,  H01L27/115 ,  H01L29/76 ,  H01L29/788 ,  H01L29/792 ,  H01L29/94 ,  H01L31/062 ,  H01L31/113 ,  H01L31/119

CPC分类号： H01L29/66825 ,  H01L27/115 ,  H01L27/11556 ,  H01L29/7887 ,  H01L29/7923

摘要： The present invention provides a semiconductor memory device including: a semiconductor substrate of a first conductivity type; and a memory cell including: (i) a columnar semiconductor portion formed on the substrate, (ii) at least two charge-storage layers formed around a periphery of the columnar semiconductor portion and divided in a direction vertical to the semiconductor substrate, and (iii) a control gate that covers at least a portion of charge-storage layers, wherein the memory cell is capable of holding two-bit or more data.

摘要翻译： 本发明提供一种半导体存储器件，包括：第一导电类型的半导体衬底; 以及存储单元，包括：（i）形成在所述基板上的柱状半导体部，（ii）形成在所述柱状半导体部的周围的并且沿与所述半导体基板垂直的方向分割的至少两个电荷存储层，和 iii）覆盖电荷存储层的至少一部分的控制栅极，其中所述存储器单元能够保持两位或更多数据。

公开(公告)号：US20050101087A1

公开(公告)日：2005-05-12

申请号：US10727266

申请日：2003-12-04

申请人： Tetsuo Endoh ,  Fujio Masuoka ,  Takuji Tanigami ,  Takashi Yokoyama ,  Shinji Horii

发明人： Tetsuo Endoh ,  Fujio Masuoka ,  Takuji Tanigami ,  Takashi Yokoyama ,  Shinji Horii

IPC分类号： H01L21/8247 ,  G11C16/04 ,  H01L21/28 ,  H01L21/336 ,  H01L21/8246 ,  H01L21/84 ,  H01L27/02 ,  H01L27/115 ,  H01L27/12 ,  H01L29/06 ,  H01L29/788 ,  H01L29/792

CPC分类号： H01L27/0207 ,  G11C16/0483 ,  H01L21/28273 ,  H01L21/28282 ,  H01L21/84 ,  H01L27/115 ,  H01L27/11519 ,  H01L27/11553 ,  H01L27/11556 ,  H01L27/11568 ,  H01L27/1203 ,  H01L29/0692 ,  H01L29/66825 ,  H01L29/66833 ,  H01L29/7881 ,  H01L29/792 ,  H01L29/7926

摘要： The present invention provides a semiconductor memory device comprising: a first conductivity type semiconductor substrate; and a plurality of memory cells constituted of an island-like semiconductor layer which is formed on the semiconductor substrate, and a charge storage layer and a control gate which are formed entirely or partially around a sidewall of the island-like semiconductor layer, wherein the plurality of memory cells are disposed in series, the island-like semiconductor layer which constitutes the memory cells has cross-sectional areas varying in stages in a horizontal direction of the semiconductor substrate, and an insulating film capable of passing charges is provided at least in a part of a plane of the island-like semiconductor layer horizontal to the semiconductor substrate.

摘要翻译： 本发明提供一种半导体存储器件，包括：第一导电型半导体衬底; 以及由在半导体衬底上形成的岛状半导体层和电荷存储层和控制栅极构成的多个存储单元，其形成在岛状半导体层的侧壁的整个或部分周围，其中， 多个存储单元被串联设置，构成存储单元的岛状半导体层具有在半导体衬底的水平方向上分级变化的横截面区域，并且能够至少在 岛状半导体层的与半导体衬底水平的平面的一部分。