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    Fabrication of high-density trench DMOS using sidewall spacers
    1.
    发明授权
    Fabrication of high-density trench DMOS using sidewall spacers 失效
    使用侧壁间隔件制造高密度沟槽DMOS

    公开(公告)号：US5904525A

    公开(公告)日：1999-05-18

    申请号：US646593

    申请日：1996-05-08

    申请人： Fwu-Iuan Hshieh ,  Yueh-Se Ho ,  Bosco Lan ,  Jowei Dun

    发明人： Fwu-Iuan Hshieh ,  Yueh-Se Ho ,  Bosco Lan ,  Jowei Dun

    IPC分类号： H01L21/26 ,  H01L21/336 ,  H01L29/06 ,  H01L29/10 ,  H01L29/40 ,  H01L29/78 ,  H01L21/3205 ,  H01L21/4763

    CPC分类号： H01L29/7813 ,  H01L29/1095 ,  H01L29/404 ,  H01L29/0696 ,  Y10S148/126

    摘要： A method for forming a trenched DMOS transistor with deep body regions that occupy minimal area on an epitaxial layer formed on a semiconductor substrate. A first oxide layer is formed over the epitaxial layer and patterned to define deep-body areas beneath which the deep body regions are to be formed. Next, diffusion-inhibiting regions of the first conductivity type are formed in each of the deep-body areas before forming a second oxide layer covering the deep-body areas and the remaining portion of the first oxide layer. Portions of the second oxide layer are then removed to expose the centers of the diffusion inhibiting regions, leaving the first oxide layer and oxide sidewall spacers from the second oxide layer to cover the peripheries of the diffusion-inhibiting regions. A deep-body diffusion of a second conductivity type is then performed, resulting in the formation of deep body regions in the epitaxial layer between the sidewall spacers. The peripheries of the diffusion-inhibiting regions covered by the remaining portions of the first and second oxide layers inhibit lateral diffusion of the deep body diffusions without significantly inhibiting diffusion depth.

    摘要翻译： 一种用于形成具有在半导体衬底上形成的外延层上占据最小面积的深体区的沟槽DMOS晶体管的方法。 第一氧化物层形成在外延层上并且被图案化以限定将在其下形成深体区域的深体区域。 接下来，在形成覆盖深体区域的第二氧化物层和第一氧化物层的剩余部分之前，在每个深体区域中形成第一导电类型的扩散抑制区域。 然后去除第二氧化物层的部分以暴露扩散抑制区域的中心，从第二氧化物层留下第一氧化物层和氧化物侧壁间隔物以覆盖扩散抑制区域的周边。 然后执行第二导电类型的深体扩散，导致在侧壁间隔件之间的外延层中形成深体区。 由第一和第二氧化物层的剩余部分覆盖的扩散抑制区域的周边阻止深体扩散的横向扩散，而不显着抑制扩散深度。

    Electroplating and electroless plating of conductive materials into openings, and structures obtained thereby
    3.
    发明授权
    Electroplating and electroless plating of conductive materials into openings, and structures obtained thereby 有权
    导电材料的电镀和化学镀电镀到开口中，由此得到的结构

    公开(公告)号：US07521360B2

    公开(公告)日：2009-04-21

    申请号：US11548053

    申请日：2006-10-10

    申请人： Patrick A. Halahan ,  Sam Kao ,  Bosco Lan ,  Sergey Savastiouk ,  Oleg Siniaguine

    发明人： Patrick A. Halahan ,  Sam Kao ,  Bosco Lan ,  Sergey Savastiouk ,  Oleg Siniaguine

    IPC分类号： H01L21/44

    CPC分类号： H01L21/76843 ,  H01L21/76844 ,  H01L21/76846 ,  H01L21/76855 ,  H01L21/76873 ,  H01L21/76874 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/53238 ,  H01L2924/0002 ,  Y10S438/977 ,  H01L2924/00012 ,  H01L2924/00

    摘要： A through hole (114) is formed in a wafer (104) comprising a semiconductor substrate (110). A seed layer (610) is sputtered on the bottom surface of the wafer. The seed is not deposited over the through hole's sidewalls adjacent the top surface of the wafer. A conductor (810) is electroplated into the through hole. In another embodiment, a seed is deposited into an opening in a wafer through a dry film resist mask (1110). The dry film resist overhangs the edges of the opening, so the seed is not deposited over the opening's sidewalls adjacent the top surface of the wafer. In another embodiment, a dielectric (120) is formed in an opening in a semiconductor substrate (110) by a non-conformal physical vapor deposition (PVD) process that deposits the dielectric on the sidewalls but not the bottom of the opening. A seed (610) is formed on the bottom by electroless plating. A conductor (810) is electroplated on the seed. In another embodiment, a dielectric (2910) is formed in the opening to cover the entire surface of the opening. A non-conformal layer (120) is deposited by PVD over the sidewalls but not the bottom of the opening. The dielectric (2910) is etched off the bottom with the non-conformal layer (120) as a mask. A seed (610) is formed on the bottom by electroless plating. The non-conformal layer can be formed by electroplating. It can be tantalum deposited by electroplating, then anodized. Other embodiments are also provided.

    摘要翻译： 在包括半导体衬底（110）的晶片（104）中形成通孔（114）。 种子层（610）溅射在晶片的底表面上。 种子不会沉积在邻近晶片顶表面的通孔的侧壁上。 导体（810）电镀到通孔中。 在另一个实施例中，通过干膜抗蚀剂掩模（1110）将种子沉积在晶片的开口中。 干膜抗蚀剂突出于开口的边缘，因此种子不会沉积在邻近晶片顶表面的开口的侧壁上。 在另一个实施例中，电介质（120）通过非接触式物理气相沉积（PVD）工艺在半导体衬底（110）的开口中形成，该方法将电介质沉积在侧壁上而不是开口的底部。 通过化学镀在底部形成种子（610）。 导体（810）电镀在种子上。 在另一个实施例中，电介质（2910）形成在开口中以覆盖开口的整个表面。 非共形层（120）通过PVD沉积在侧壁上而不是开口的底部。 用非保形层（120）作为掩模将电介质（2910）从底部蚀刻掉。 通过化学镀在底部形成种子（610）。 非保形层可以通过电镀形成。 可以通过电镀沉积钽，然后阳极氧化。 还提供了其他实施例。

    ELECTROPLATING AND ELECTROLESS PLATING OF CONDUCTIVE MATERIALS INTO OPENINGS, AND STRUCTURES OBTAINED THEREBY
    5.
    发明申请
    ELECTROPLATING AND ELECTROLESS PLATING OF CONDUCTIVE MATERIALS INTO OPENINGS, AND STRUCTURES OBTAINED THEREBY 有权
    导电材料的电镀和电镀镀层开放，并获得结构

    公开(公告)号：US20070128868A1

    公开(公告)日：2007-06-07

    申请号：US11548053

    申请日：2006-10-10

    申请人： Patrick Halahan ,  Sam Kao ,  Bosco Lan ,  Sergey Savastiouk ,  Oleg Siniaguine

    发明人： Patrick Halahan ,  Sam Kao ,  Bosco Lan ,  Sergey Savastiouk ,  Oleg Siniaguine

    IPC分类号： H01L21/44

    CPC分类号： H01L21/76843 ,  H01L21/76844 ,  H01L21/76846 ,  H01L21/76855 ,  H01L21/76873 ,  H01L21/76874 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/53238 ,  H01L2924/0002 ,  Y10S438/977 ,  H01L2924/00012 ,  H01L2924/00

    摘要： A through hole (114) is formed in a wafer (104) comprising a semiconductor substrate (110). A seed layer (610) is sputtered on the bottom surface of the wafer. The seed is not deposited over the through hole's sidewalls adjacent the top surface of the wafer. A conductor (810) is electroplated into the through hole. In another embodiment, a seed is deposited into an opening in a wafer through a dry film resist mask (1110). The dry film resist overhangs the edges of the opening, so the seed is not deposited over the opening's sidewalls adjacent the top surface of the wafer. In another embodiment, a dielectric (120) is formed in an opening in a semiconductor substrate (110) by a non-conformal physical vapor deposition (PVD) process that deposits the dielectric on the sidewalls but not the bottom of the opening. A seed (610) is formed on the bottom by electroless plating. A conductor (810) is electroplated on the seed. In another embodiment, a dielectric (2910) is formed in the opening to cover the entire surface of the opening. A non-conformal layer (120) is deposited by PVD over the sidewalls but not the bottom of the opening. The dielectric (2910) is etched off the bottom with the non-conformal layer (120) as a mask. A seed (610) is formed on the bottom by electroless plating. The non-conformal layer can be formed by electroplating. It can be tantalum deposited by electroplating, then anodized. Other embodiments are also provided.

    摘要翻译： 在包括半导体衬底（110）的晶片（104）中形成通孔（114）。 种子层（610）溅射在晶片的底表面上。 种子不会沉积在邻近晶片顶表面的通孔的侧壁上。 导体（810）电镀到通孔中。 在另一个实施例中，通过干膜抗蚀剂掩模（1110）将种子沉积在晶片的开口中。 干膜抗蚀剂突出于开口的边缘，因此种子不会沉积在邻近晶片顶表面的开口的侧壁上。 在另一个实施例中，电介质（120）通过非接触式物理气相沉积（PVD）工艺在半导体衬底（110）的开口中形成，该方法将电介质沉积在侧壁上而不是开口的底部。 通过化学镀在底部形成种子（610）。 导体（810）电镀在种子上。 在另一个实施例中，电介质（2910）形成在开口中以覆盖开口的整个表面。 非共形层（120）通过PVD沉积在侧壁上而不是开口的底部。 用非保形层（120）作为掩模将电介质（2910）从底部蚀刻掉。 通过化学镀在底部形成种子（610）。 非保形层可以通过电镀形成。 可以通过电镀沉积钽，然后阳极氧化。 还提供了其他实施例。

    Electroplating and electroless plating of conductive materials into openings, and structures obtained thereby
    6.
    发明授权
    Electroplating and electroless plating of conductive materials into openings, and structures obtained thereby 有权
    导电材料的电镀和化学镀电镀到开口中，由此得到的结构

    公开(公告)号：US06897148B2

    公开(公告)日：2005-05-24

    申请号：US10410929

    申请日：2003-04-09

    申请人： Patrick A. Halahan ,  Sam Kao ,  Bosco Lan ,  Sergey Savastiouk ,  Oleg Siniaguine

    发明人： Patrick A. Halahan ,  Sam Kao ,  Bosco Lan ,  Sergey Savastiouk ,  Oleg Siniaguine

    IPC分类号： H01L21/768 ,  H01L23/48 ,  H01L23/532 ,  H01L21/44

    CPC分类号： H01L21/76843 ,  H01L21/76844 ,  H01L21/76846 ,  H01L21/76855 ,  H01L21/76873 ,  H01L21/76874 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/53238 ,  H01L2924/0002 ,  Y10S438/977 ,  H01L2924/00012 ,  H01L2924/00

    摘要： A through hole (114) is formed in a wafer (104) comprising a semiconductor substrate (110). A seed layer (610) is sputtered on the bottom surface of the wafer. The seed is not deposited over the through hole's sidewalls adjacent the top surface of the wafer. A conductor (810) is electroplated into the through hole. In another embodiment, a seed is deposited into an opening in a wafer through a dry film resist mask (1110). The dry film resist overhangs the edges of the opening, so the seed is not deposited over the opening's sidewalls adjacent the top surface of the wafer. In another embodiment, a dielectric (120) is formed in an opening in a semiconductor substrate (110) by a non-conformal physical vapor deposition (PVD) process that deposits the dielectric on the sidewalls but not the bottom of the opening. A seed (610) is formed on the bottom by electroless plating. A conductor (810) is electroplated on the seed. In another embodiment, a dielectric (2910) is formed in the opening to cover the entire surface of the opening. A non-conformal layer (120) is deposited by PVD over the sidewalls but not the bottom of the opening. The dielectric (2910) is etched off the bottom with the non-conformal layer (120) as a mask. A seed (610) is formed on the bottom by electroless plating. The non-conformal layer can be formed by electroplating. It can be tantalum deposited by electroplating, then anodized. Other embodiments are also provided.

    摘要翻译： 在包括半导体衬底（110）的晶片（104）中形成通孔（114）。 种子层（610）溅射在晶片的底表面上。 种子不会沉积在邻近晶片顶表面的通孔的侧壁上。 导体（810）电镀到通孔中。 在另一个实施例中，通过干膜抗蚀剂掩模（1110）将种子沉积在晶片的开口中。 干膜抗蚀剂突出于开口的边缘，因此种子不会沉积在邻近晶片顶表面的开口的侧壁上。 在另一个实施例中，电介质（120）通过非接触式物理气相沉积（PVD）工艺在半导体衬底（110）的开口中形成，该方法将电介质沉积在侧壁上而不是开口的底部。 通过化学镀在底部形成种子（610）。 导体（810）电镀在种子上。 在另一个实施例中，电介质（2910）形成在开口中以覆盖开口的整个表面。 非共形层（120）通过PVD沉积在侧壁上而不是开口的底部。 用非保形层（120）作为掩模将电介质（2910）从底部蚀刻掉。 通过化学镀在底部形成种子（610）。 非保形层可以通过电镀形成。 可以通过电镀沉积钽，然后阳极氧化。 还提供了其他实施例。