公开(公告)号：US08871651B1

公开(公告)日：2014-10-28

申请号：US13940535

申请日：2013-07-12

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Dae Han Choi ,  Zhuangfei Chen ,  Fangyu Wu

IPC: H01L21/302

CPC classification number: H01L21/3086 ,  H01L29/66795

Abstract: A mask for use in fabricating one or more semiconductor devices is fabricated by: providing sacrificial spacing structures disposed over a substrate structure, and including protective hard masks at upper surfaces of the spacing structures; disposing a sidewall spacer layer conformally over the sacrificial spacing structures; selectively removing the sidewall spacer layer from above the sacrificial spacing structures to expose the protective hard masks of the spacing structures, the selectively removing including leaving sidewall spacers along sidewalls of the sacrificial spacing structures; providing a protective material over the substrate structure; and removing the exposed protective hard masks from the sacrificial spacing structures, and thereafter, removing remaining sacrificial spacing structures and the protective material, leaving the sidewall spacers over the substrate structure as a mask.

Abstract translation: 通过以下方式制造用于制造一个或多个半导体器件的掩模：提供设置在衬底结构上的牺牲间隔结构，并且在间隔结构的上表面处包括保护性硬掩模; 将侧壁间隔层保形地设置在牺牲间隔结构上; 从所述牺牲间隔结构的上方选择性地去除所述侧壁间隔层，以露出所述间隔结构的保护性硬掩模，所述选择性地移除包括沿着所述牺牲间隔结构的侧壁留下侧壁间隔物; 在衬底结构上提供保护材料; 并且从牺牲间隔结构中去除暴露的保护性硬掩模，然后去除剩余的牺牲间隔结构和保护材料，将侧壁间隔物留在衬底结构上作为掩模。

公开(公告)号：US20150123211A1

公开(公告)日：2015-05-07

申请号：US14070607

申请日：2013-11-04

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Qi Zhang ,  Hongliang Shen ,  Zhenyu Hu ,  Andy Wei ,  Zhuangfei Chen ,  Nicholas V. LiCausi

IPC: H01L27/088 ,  H01L21/02 ,  H01L21/324 ,  H01L21/311 ,  H01L21/762 ,  H01L21/8234 ,  H01L21/306

CPC classification number: H01L27/0886 ,  H01L21/76205 ,  H01L21/76224 ,  H01L21/823431 ,  H01L21/845 ,  H01L27/1211

Abstract: Approaches for providing a narrow diffusion break in a fin field effect transistor (FinFET) device are disclosed. Specifically, the FinFET device is provided with a set of fins formed from a substrate, and an opening formed through the set of fins, the opening oriented substantially perpendicular to an orientation of the set of fins. This provides a FinFET device capable of achieving cross-the-fins insulation with an opening size that is adjustable from approximately 20-30 nm.

Abstract translation: 公开了在鳍式场效应晶体管（FinFET）器件中提供窄扩散断裂的方法。 具体地，FinFET器件设置有由基板形成的一组翅片，以及通过该组翅片形成的开口，该开口基本上垂直于该组翅片的取向定向。 这提供了一种FinFET器件，其能够实现跨鳍片绝缘，其开口尺寸可从大约20-30nm调节。

公开(公告)号：US20150200111A1

公开(公告)日：2015-07-16

申请号：US14153120

申请日：2014-01-13

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Sruthi Muralidharan ,  Zhenyu Hu ,  Qi Zhang ,  Ja-Hyung Han ,  Dinesh Koli ,  Zhuangfei Chen

IPC: H01L21/321 ,  H01L21/02 ,  H01L21/265

CPC classification number: H01L21/32115 ,  H01L21/28035 ,  H01L21/28123 ,  H01L21/32137 ,  H01L29/66545 ,  H01L29/66795

Abstract: Embodiments of the present invention provide improved methods for fabrication of finFETs. During finFET fabrication, a film, such as amorphous silicon, is deposited on a semiconductor substrate which has regions with fins and regions without fins. A fill layer is deposited on the film and planarized to form a flush surface. A recess or etch process is used to form a planar surface with all portions of the fill layer removed. A finishing process such as a gas cluster ion beam process may be used to further smooth the substrate surface. This results in a film having a very uniform thickness across the structure (e.g. a semiconductor wafer), resulting in improved within-wafer (WiW) uniformity and improved within-chip (WiC) uniformity.

Abstract translation: 本发明的实施例提供了用于制造finFET的改进方法。 在finFET制造期间，诸如非晶硅的膜沉积在半导体衬底上，该半导体衬底具有鳍片和不具有鳍片的区域。 填充层沉积在膜上并且被平坦化以形成齐平表面。 使用凹陷或蚀刻工艺来形成平坦表面，其中填充层的所有部分被去除。 可以使用诸如气体簇离子束工艺的精加工工艺来进一步平滑衬底表面。 这导致在结构（例如半导体晶片）上具有非常均匀的厚度的膜，导致晶片内（WiW）的均匀性提高和芯片内（WiC）均匀性提高。