公开(公告)号：US09287130B1

公开(公告)日：2016-03-15

申请号：US14676345

申请日：2015-04-01

申请人： GLOBALFOUNDRIES Inc. ,  International Business Machines Corporation ,  STMicroelectronics, Inc.

发明人： Xiuyu Cai ,  Ajey Poovannummoottil Jacob ,  Ruilong Xie ,  Bruce Doris ,  Kangguo Cheng ,  Jason R. Cantone ,  Sylvie Mignot ,  David Moreau ,  Muthumanickam Sankarapandian ,  Pierre Morin ,  Su Chen Fan ,  Kisik Choi ,  Murat K. Akarvardar

IPC分类号： H01L21/00 ,  H01L21/308 ,  H01L21/8234 ,  H01L21/265 ,  H01L21/266

CPC分类号： H01L21/823431 ,  H01L21/30604 ,  H01L21/845 ,  H01L29/66795

摘要： A method includes forming a plurality of fin elements above a substrate. A mask is formed above the substrate. The mask has an opening defined above at least one selected fin element of the plurality of fin elements. An ion species is implanted into the at least one selected fin element through the opening to increase its etch characteristics relative to the other fin elements. The at least one selected fin element is removed selectively relative to the other fin elements.

摘要翻译： 一种方法包括在基底上形成多个翅片元件。 在基板上形成掩模。 掩模具有限定在多个翅片元件中的至少一个选定翅片元件上方的开口。 通过开口将离子物质注入到至少一个选定的翅片元件中，以相对于其它翅片元件增加其蚀刻特性。 选择性地将至少一个选定的翅片元件相对于其它翅片元件移除。

公开(公告)号：US09953978B2

公开(公告)日：2018-04-24

申请号：US14981574

申请日：2015-12-28

申请人： GLOBALFOUNDRIES Inc. ,  International Business Machines Corporation

发明人： Ruilong Xie ,  Kisik Choi ,  Su Chen Fan ,  Shom Ponoth

IPC分类号： H01L27/092 ,  H01L29/66 ,  H01L21/28 ,  H01L21/8238 ,  H01L29/40 ,  H01L29/49 ,  H01L29/423 ,  H01L29/51 ,  H01L29/78

CPC分类号： H01L27/0922 ,  H01L21/28114 ,  H01L21/823842 ,  H01L21/823864 ,  H01L27/092 ,  H01L29/401 ,  H01L29/42376 ,  H01L29/4958 ,  H01L29/4966 ,  H01L29/4983 ,  H01L29/517 ,  H01L29/66545 ,  H01L29/6656 ,  H01L29/78

摘要： A transistor device includes a gate structure positioned above a semiconductor substrate, and spaced-apart sidewall spacers positioned above the substrate and adjacent sidewalls of the gate structure. An internal sidewall surface of each of the spaced-apart sidewall spacers includes an upper sidewall surface portion and a lower sidewall surface portion positioned between the upper sidewall surface portion and a surface of the substrate, wherein a first lateral width between first upper ends of the upper sidewall surface portions is greater than a second lateral width between second upper ends of the lower sidewall surface portions.

公开(公告)号：US09484438B2

公开(公告)日：2016-11-01

申请号：US14699427

申请日：2015-04-29

申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION ,  GLOBALFOUNDRIES Inc.

发明人： Takashi Ando ,  Eduard A. Cartier ,  Kisik Choi ,  Vijay Narayanan

IPC分类号： H01L21/3205 ,  H01L29/66 ,  H01L21/324 ,  H01L21/28 ,  H01L21/02

CPC分类号： H01L29/66545 ,  H01L21/02532 ,  H01L21/02592 ,  H01L21/02595 ,  H01L21/28017 ,  H01L21/28088 ,  H01L21/32055 ,  H01L21/321 ,  H01L21/324 ,  H01L29/4232 ,  H01L29/66 ,  H01L29/66795 ,  H01L29/6681

摘要： A method of fabricating a replacement gate stack for a semiconductor device includes the following steps after removal of a dummy gate: growing a high-k dielectric layer over the area vacated by the dummy gate; depositing a thin metal layer over the high-k dielectric layer; depositing a sacrificial layer over the thin metal layer; performing a first rapid thermal anneal; removing the sacrificial layer; and depositing a metal layer of low resistivity metal for gap fill.

公开(公告)号：US09391164B2

公开(公告)日：2016-07-12

申请号：US14699843

申请日：2015-04-29

申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION ,  GLOBALFOUNDRIES INC.

发明人： Takashi Ando ,  Eduard A. Cartier ,  Kisik Choi ,  Vijay Narayanan

IPC分类号： H01L21/00 ,  H01L29/66 ,  H01L21/28 ,  H01L21/324 ,  H01L29/423 ,  H01L21/321

CPC分类号： H01L29/66545 ,  H01L21/02532 ,  H01L21/02592 ,  H01L21/02595 ,  H01L21/28017 ,  H01L21/28088 ,  H01L21/32055 ,  H01L21/321 ,  H01L21/324 ,  H01L29/4232 ,  H01L29/66 ,  H01L29/66795 ,  H01L29/6681

摘要： A method of fabricating a replacement gate stack for a semiconductor device includes the following steps after removal of a dummy gate: growing a high-k dielectric layer over the area vacated by the dummy gate; depositing a thin metal layer over the high-k dielectric layer; depositing a sacrificial layer over the thin metal layer; performing a first rapid thermal anneal; removing the sacrificial layer; and depositing a metal layer of low resistivity metal for gap fill.

公开(公告)号：US20160118385A1

公开(公告)日：2016-04-28

申请号：US14981574

申请日：2015-12-28

申请人： GLOBALFOUNDRIES Inc. ,  International Business Machines Corporation

发明人： Ruilong Xie ,  Kisik Choi ,  Su Chen Fan ,  Shom Ponoth

IPC分类号： H01L27/092 ,  H01L29/49 ,  H01L29/423 ,  H01L29/51

CPC分类号： H01L27/0922 ,  H01L21/28114 ,  H01L21/823842 ,  H01L21/823864 ,  H01L27/092 ,  H01L29/401 ,  H01L29/42376 ,  H01L29/4958 ,  H01L29/4966 ,  H01L29/4983 ,  H01L29/517 ,  H01L29/66545 ,  H01L29/6656 ,  H01L29/78

摘要： A transistor device includes a gate structure positioned above a semiconductor substrate and spaced-apart sidewall spacers positioned above the substrate and adjacent sidewalls of the gate structure, wherein an internal sidewall surface of each of the spaced-apart sidewall spacers has a stepped cross-sectional configuration

摘要翻译： 晶体管器件包括位于半导体衬底上方的栅极结构和位于衬底上方的间隔开的侧壁隔离物和栅极结构的相邻侧壁，其中每个间隔开的侧壁间隔件的内侧壁表面具有阶梯状横截面 组态

公开(公告)号：US20150249015A1

公开(公告)日：2015-09-03

申请号：US14707822

申请日：2015-05-08

申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION ,  GLOBALFOUNDRIES, INC.

发明人： Takashi Ando ,  Eduard A. Cartier ,  Kisik Choi ,  Wing L. Lai ,  Vijay Narayanan ,  Ravikumar Ramachandran

IPC分类号： H01L21/28

CPC分类号： H01L21/28229 ,  H01L21/28185 ,  H01L21/823821 ,  H01L21/823842 ,  H01L27/092 ,  H01L27/0924 ,  H01L29/0649 ,  H01L29/42364 ,  H01L29/495 ,  H01L29/51 ,  H01L29/513 ,  H01L29/517 ,  H01L29/518 ,  H01L29/66545 ,  H01L29/7851

摘要： A method for semiconductor fabrication includes forming at least one of a diffusion barrier layer and a metal containing layer over a dielectric layer in a gate cavity. A first anneal is performed to diffuse elements from the at least one of the diffusion barrier layer and the metal containing layer into the dielectric layer. The metal containing layer and the diffusion barrier layer are removed. A second anneal is performed to adjust diffusion of the elements in the dielectric layer to provide a gate dielectric region.

公开(公告)号：US20150228749A1

公开(公告)日：2015-08-13

申请号：US14696015

申请日：2015-04-24

申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION ,  GLOBALFOUNDRIES, INC.

发明人： Takashi Ando ,  Eduard A. Cartier ,  Kisik Choi ,  Wing L. Lai ,  Vijay Narayanan ,  Ravikumar Ramachandran

IPC分类号： H01L29/51 ,  H01L29/49 ,  H01L29/06 ,  H01L29/78 ,  H01L27/092 ,  H01L29/423

CPC分类号： H01L21/28229 ,  H01L21/28185 ,  H01L21/823821 ,  H01L21/823842 ,  H01L27/092 ,  H01L27/0924 ,  H01L29/0649 ,  H01L29/42364 ,  H01L29/495 ,  H01L29/51 ,  H01L29/513 ,  H01L29/517 ,  H01L29/518 ,  H01L29/66545 ,  H01L29/7851

摘要： A method for semiconductor fabrication includes forming at least one of a diffusion barrier layer and a metal containing layer over a dielectric layer in a gate cavity. A first anneal is performed to diffuse elements from the at least one of the diffusion barrier layer and the metal containing layer into the dielectric layer. The metal containing layer and the diffusion barrier layer are removed. A second anneal is performed to adjust diffusion of the elements in the dielectric layer to provide a gate dielectric region.

公开(公告)号：US20150035073A1

公开(公告)日：2015-02-05

申请号：US13959375

申请日：2013-08-05

申请人： GLOBALFOUNDRIES Inc. ,  INTERNATIONAL BUSINESS MACHINES CORPORATION

发明人： Takashi Ando ,  Eduard A. Cartier ,  Kisik Choi ,  Wing L. Lai ,  Vijay Narayanan ,  Ravikumar Ramachandran

IPC分类号： H01L21/28 ,  H01L27/092

CPC分类号： H01L21/28229 ,  H01L21/28185 ,  H01L21/823821 ,  H01L21/823842 ,  H01L27/092 ,  H01L27/0924 ,  H01L29/0649 ,  H01L29/42364 ,  H01L29/495 ,  H01L29/51 ,  H01L29/513 ,  H01L29/517 ,  H01L29/518 ,  H01L29/66545 ,  H01L29/7851

摘要： A method for semiconductor fabrication includes forming at least one of a diffusion barrier layer and a metal containing layer over a dielectric layer in a gate cavity. A first anneal is performed to diffuse elements from the at least one of the diffusion barrier layer and the metal containing layer into the dielectric layer. The metal containing layer and the diffusion barrier layer are removed. A second anneal is performed to adjust diffusion of the elements in the dielectric layer to provide a gate dielectric region.

摘要翻译： 一种用于半导体制造的方法包括在栅腔中的介电层上形成扩散阻挡层和含金属层中的至少一个。 执行第一退火以将元件从扩散阻挡层和含金属层中的至少一个扩散到电介质层中。 去除含金属层和扩散阻挡层。 执行第二次退火以调节介电层中的元件的扩散以提供栅极电介质区域。

公开(公告)号：US20160380076A1

公开(公告)日：2016-12-29

申请号：US15258597

申请日：2016-09-07

申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION ,  GLOBALFOUNDRIES Inc.

发明人： Takashi Ando ,  Eduard A. Cartier ,  Kisik Choi ,  Vijay Narayanan

IPC分类号： H01L29/66 ,  H01L21/28 ,  H01L21/321

CPC分类号： H01L29/66545 ,  H01L21/02532 ,  H01L21/02592 ,  H01L21/02595 ,  H01L21/28017 ,  H01L21/28088 ,  H01L21/32055 ,  H01L21/321 ,  H01L21/324 ,  H01L29/4232 ,  H01L29/66 ,  H01L29/66795 ,  H01L29/6681

摘要： A method of fabricating a replacement gate stack for a semiconductor device includes the following steps after removal of a dummy gate: growing a high-k dielectric layer over the area vacated by the dummy gate; depositing a thin metal layer over the high-k dielectric layer; depositing a sacrificial layer over the thin metal layer; performing a first rapid thermal anneal; removing the sacrificial layer; and depositing a metal layer of low resistivity metal for gap fill.

公开(公告)号：US09472643B2

公开(公告)日：2016-10-18

申请号：US14595756

申请日：2015-01-13

申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION ,  GLOBALFOUNDRIES Inc.

发明人： Takashi Ando ,  Eduard A. Cartier ,  Kisik Choi ,  Vijay Narayanan

IPC分类号： H01L21/3205 ,  H01L29/66 ,  H01L21/28 ,  H01L21/324 ,  H01L29/423 ,  H01L21/321

CPC分类号： H01L29/66545 ,  H01L21/02532 ,  H01L21/02592 ,  H01L21/02595 ,  H01L21/28017 ,  H01L21/28088 ,  H01L21/32055 ,  H01L21/321 ,  H01L21/324 ,  H01L29/4232 ,  H01L29/66 ,  H01L29/66795 ,  H01L29/6681

摘要： A method of fabricating a replacement gate stack for a semiconductor device includes the following steps after removal of a dummy gate: growing a high-k dielectric layer over the area vacated by the dummy gate; depositing a thin metal layer over the high-k dielectric layer; depositing a sacrificial layer over the thin metal layer; performing a first rapid thermal anneal; removing the sacrificial layer; and depositing a metal layer of low resistivity metal for gap fill.