公开(公告)号：US20210234034A1

公开(公告)日：2021-07-29

申请号：US16751779

申请日：2020-01-24

Applicant: GLOBALFOUNDRIES U.S. INC.

Inventor： Yanping SHEN ,  Haiting WANG ,  Hong YU

IPC: H01L29/78 ,  H01L29/423 ,  H01L29/16

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a scheme of active and dummy fin structures and methods of manufacture. The structure includes: an active fin structure; at least one dummy fin structure running along at least one side of the active fin structure along its length; a fin cut separating the at least one dummy fin structure along its longitudinal axes; and a gate structure extending over the active fin structure and the fin cut.

公开(公告)号：US20210098591A1

公开(公告)日：2021-04-01

申请号：US16585671

申请日：2019-09-27

Applicant: GLOBALFOUNDRIES U.S. INC.

Inventor： Julien FROUGIER ,  Ali RAZAVIEH ,  Haiting WANG

IPC: H01L29/49 ,  H01L21/306 ,  H01L29/66 ,  H01L29/08 ,  H01L21/768

Abstract: The present disclosure generally relates to semiconductor structures and, more particularly, to air spacer structures and methods of manufacture. The structure includes: a plurality of gate structures comprising active regions; contacts extending to the active regions; a plurality of anchor structures between the active regions; and air spacer structures adjacent to the contacts.

公开(公告)号：US20230395715A1

公开(公告)日：2023-12-07

申请号：US17830678

申请日：2022-06-02

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Haiting WANG ,  Hong YU ,  Zhenyu HU

IPC: H01L29/78 ,  H01L29/08 ,  H01L29/66

CPC classification number: H01L29/7838 ,  H01L29/0847 ,  H01L29/785 ,  H01L29/66795

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a multi-channel replacement metal gate device and methods of manufacture. The structure includes: a fully depleted semiconductor on insulator substrate; a plurality of fin structures over the fully depleted semiconductor on insulator substrate; and a metal gate structure spanning over the plurality of fin structures and the fully depleted semiconductor on insulator substrate.

公开(公告)号：US20230299181A1

公开(公告)日：2023-09-21

申请号：US18324489

申请日：2023-05-26

Applicant: GlobalFoundries U.S. Inc.

Inventor： Haiting WANG ,  Hong YU ,  Zhenyu HU

IPC: H01L29/66 ,  H01L29/78 ,  H01L29/06 ,  H01L21/762 ,  H01L29/45 ,  H01L21/285 ,  H01L29/417

CPC classification number: H01L29/6681 ,  H01L29/7851 ,  H01L29/0653 ,  H01L21/76224 ,  H01L29/45 ,  H01L21/28518 ,  H01L29/41791

Abstract: The present disclosure generally relates to semiconductor structures and, more particularly, to single fin structures and methods of manufacture. The structure includes: an active single fin structure; a plurality of dummy fin structures on opposing sides of the active single fin structure; source and drain regions formed on the active single fin structure and the dummy fin structures; recessed shallow trench isolation (STI) regions between the dummy fin structures and the active single fin structure and below a surface of the dummy fin structures; and contacts formed on the source and drain regions of the active single fin structure with a spacing of at least two dummy fin structures on opposing sides of the contacts.

公开(公告)号：US20240395932A1

公开(公告)日：2024-11-28

申请号：US18322212

申请日：2023-05-23

Applicant: GlobalFoundries U.S. Inc.

Inventor： John L. LEMON ,  Hong YU ,  Haiting WANG ,  Hui ZHAN

IPC: H01L29/78 ,  H01L21/84 ,  H01L27/12 ,  H01L29/66

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a wraparound gate structure and methods of manufacture. The structure includes: a channel region comprising semiconductor material; an isolation structure surrounding the channel region; a divot within the isolation structure; and a gate structure comprising gate material within the divot and surrounding the channel region.

公开(公告)号：US20230215917A1

公开(公告)日：2023-07-06

申请号：US17569897

申请日：2022-01-06

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Ali RAZAVIEH ,  Haiting WANG

IPC: H01L29/06 ,  H01L29/78 ,  H01L29/786 ,  H01L29/66

CPC classification number: H01L29/0673 ,  H01L29/7827 ,  H01L29/78642 ,  H01L29/66666

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a device with a vertical nanowire channel region and methods of manufacture. The structure includes: a bottom source/drain region; a top source/drain region; a gate structure extending between the bottom source/drain region and the top source/drain region; and a vertical nanowire in a channel region of the gate structure.

公开(公告)号：US20210376106A1

公开(公告)日：2021-12-02

申请号：US17404499

申请日：2021-08-17

Applicant: GLOBALFOUNDRIES U.S. INC.

Inventor： Jiehui SHU ,  Sipeng GU ,  Haiting WANG

IPC: H01L29/49 ,  H01L29/66 ,  H01L27/088 ,  H01L29/78 ,  H01L29/40

Abstract: The present disclosure generally relates to semiconductor structures and, more particularly, to gate structures and methods of manufacture. The method includes: forming a first gate structure and a second gate structure with gate materials; etching the gate materials within the second gate structure to form a trench; and depositing a conductive material within the trench so that the second gate structure has a metal composition different than the first gate structure.

公开(公告)号：US20210151581A1

公开(公告)日：2021-05-20

申请号：US16688267

申请日：2019-11-19

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Haiting WANG ,  Hong YU ,  Zhenyu HU

IPC: H01L29/66 ,  H01L29/78 ,  H01L29/06 ,  H01L29/417 ,  H01L29/45 ,  H01L21/285 ,  H01L21/762

Abstract: The present disclosure generally relates to semiconductor structures and, more particularly, to single fin structures and methods of manufacture. The structure includes: an active single fin structure; a plurality of dummy fin structures on opposing sides of the active single fin structure; source and drain regions formed on the active single fin structure and the dummy fin structures; recessed shallow trench isolation (STI) regions between the dummy fin structures and the active single fin structure and below a surface of the dummy fin structures; and contacts formed on the source and drain regions of the active single fin structure with a spacing of at least two dummy fin structures on opposing sides of the contacts.

公开(公告)号：US20250022915A1

公开(公告)日：2025-01-16

申请号：US18899522

申请日：2024-09-27

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Ali RAZAVIEH ,  Haiting WANG

IPC: H01L29/06 ,  H01L29/66 ,  H01L29/78 ,  H01L29/786

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a device with a vertical nanowire channel region and methods of manufacture. The structure includes: a bottom source/drain region; a top source/drain region; a gate structure extending between the bottom source/drain region and the top source/drain region; and a vertical nanowire in a channel region of the gate structure.

公开(公告)号：US20210242317A1

公开(公告)日：2021-08-05

申请号：US16777531

申请日：2020-01-30

Applicant: GLOBALFOUNDRIES U.S. INC.

Inventor： Sipeng GU ,  Jiehui SHU ,  Haiting WANG ,  Yanping SHEN

IPC: H01L29/417 ,  H01L29/78

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to self-aligned contacts and methods of manufacture. The structure includes: adjacent diffusion regions located within a substrate material; sidewall structures above an upper surface of the substrate material, aligned on sides of the adjacent diffusion regions; and a contact between the sidewall structures and extending to within the substrate material between and in electrical contact with the adjacent diffusion regions.