公开(公告)号：US07808434B2

公开(公告)日：2010-10-05

申请号：US11836670

申请日：2007-08-09

申请人： George E. White ,  Sidharth Dalmia

发明人： George E. White ,  Sidharth Dalmia

IPC分类号： H01Q1/38

CPC分类号： H01Q1/20 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/181 ,  H01L2924/19105 ,  H01Q1/2283 ,  H01Q1/243 ,  H01Q1/38 ,  H01L2924/00012 ,  H01L2924/00014

摘要： Embodiments of the invention may provide for a variety of antennae structures, including the following: a) antennae structures printed directly on the sides of the radio frequency (RF) module or integrated passive device (IPD), b) printed antennae structures fabricated on preformed dielectric lids or overmolds, c) antennae structures fabricated as part of the dielectric wiring that constitutes the wireless module, d) antennae structures that are printed directly on the top of the finished RF module, and e) antennae structures printed directly on the dielectric layers adjacent to thin film wiring and embedded passive elements such as filters, diplexers and couplers.

摘要翻译： 本发明的实施例可以提供各种天线结构，包括以下内容：a）直接印刷在射频（RF）模块或集成无源器件（IPD）侧面上的天线结构，b）在预成型件上制造的印刷天线结构 电介质盖或包覆成型体，c）作为构成无线模块的电介质布线的一部分制造的天线结构，d）直接印刷在完成的RF模块顶部的天线结构，以及e）直接印刷在介电层上的天线结构 邻近薄膜布线和嵌入式无源元件，如滤波器，双工器和耦合器。

公开(公告)号：US06900708B2

公开(公告)日：2005-05-31

申请号：US10402313

申请日：2003-03-28

申请人： George E. White ,  Madhavan Swaminathan ,  Venkatesh Sundaram ,  Sidharth Dalmia

发明人： George E. White ,  Madhavan Swaminathan ,  Venkatesh Sundaram ,  Sidharth Dalmia

IPC分类号： H01F17/00 ,  H01F41/04 ,  H01L21/48 ,  H01L25/065 ,  H01L27/08 ,  H01P1/203 ,  H03H7/38 ,  H03F7/00

CPC分类号： H01P1/20381 ,  H01F17/0033 ,  H01F41/041 ,  H01L21/4857 ,  H01L25/0652 ,  H01L27/08 ,  H01L2924/0002 ,  H01L2924/09701 ,  H01L2924/3011 ,  H03H7/38 ,  H01L2924/00

摘要： The present invention includes an organic device that can be integrated in a multilayer board made of organic material. The passive devices can be integrally fabricated on a circuit board in either surface mount device (SMD) or ball grid array (BGA) form. Alternatively, the passive device can be constructed in a stand alone SMD or BGA/chip scale package (CSP) form to make it mountable on a multilayer board, ceramic carrier or silicon platform in the form of an integrated passive device. The passive device includes side shielding on two sides in the SMD form and four sides in the BGA/CSP form. The side shielding can be external or in-built.

摘要翻译： 本发明包括可以集成在由有机材料制成的多层板中的有机器件。 无源器件可以在表面贴装器件（SMD）或球栅阵列（BGA）形式的电路板上整体制造。 或者，无源器件可以以独立的SMD或BGA /芯片级封装（CSP）形式构造，使得其可以以集成的无源器件的形式安装在多层板，陶瓷载体或硅平台上。 无源器件包括SMD形式两侧的侧屏蔽和BGA / CSP形式的四面。 侧面屏蔽可以是外部的或内置的。

公开(公告)号：US07989895B2

公开(公告)日：2011-08-02

申请号：US11940952

申请日：2007-11-15

申请人： George E. White ,  Sidharth Dalmia

发明人： George E. White ,  Sidharth Dalmia

IPC分类号： H01L21/02

CPC分类号： H01L23/66 ,  H01L24/48 ,  H01L24/73 ,  H01L25/16 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01012 ,  H01L2924/01019 ,  H01L2924/01068 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/0401 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： Example embodiments of the invention may provide for a multi-package system. The multi-package system may include a first package having a plurality of first organic dielectric layers, where the first package includes at least one first conductive layer positioned between two of the plurality of first organic dielectric layers, and where the at least one first conductive layer is circuitized to form at least one first passive device. The multi-package system may also include a second package having a plurality of second organic dielectric layers, where the second package includes at least one second conductive layer positioned between two of the plurality of second organic dielectric layers, and where the at least one second conductive layer is circuitized to form at least one second passive device. An electrical connector may be provided between a bottom surface of the first package and a top surface of the second package to electrically connect the first package and the second package.

摘要翻译： 本发明的示例实施例可以提供多封装系统。 所述多封装系统可以包括具有多个第一有机电介质层的第一封装，其中所述第一封装包括位于所述多个第一有机电介质层中的两个之间的至少一个第一导电层，并且其中所述至少一个第一导电 电路化以形成至少一个第一无源器件。 所述多封装系统还可以包括具有多个第二有机电介质层的第二封装，其中所述第二封装包括位于所述多个第二有机介电层中的两个之间的至少一个第二导电层，并且其中所述至少一个第二 导电层被电路化以形成至少一个第二无源器件。 电连接器可以设置在第一封装的底表面和第二封装的顶表面之间，以电连接第一封装和第二封装。

公开(公告)号：US20080036668A1

公开(公告)日：2008-02-14

申请号：US11836670

申请日：2007-08-09

申请人： George E. White ,  Sidharth Dalmia

发明人： George E. White ,  Sidharth Dalmia

IPC分类号： H01Q1/38 ,  H01Q1/40 ,  H01Q9/00

CPC分类号： H01Q1/20 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/181 ,  H01L2924/19105 ,  H01Q1/2283 ,  H01Q1/243 ,  H01Q1/38 ,  H01L2924/00012 ,  H01L2924/00014

摘要： Embodiments of the invention may provide for a variety of antennae structures, including the following: a) antennae structures printed directly on the sides of the radio frequency (RF) module or integrated passive device (IPD), b) printed antennae structures fabricated on preformed dielectric lids or overmolds, c) antennae structures fabricated as part of the dielectric wiring that constitutes the wireless module, d) antennae structures that are printed directly on the top of the finished RF module, and e) antennae structures printed directly on the dielectric layers adjacent to thin film wiring and embedded passive elements such as filters, diplexers and couplers.

摘要翻译： 本发明的实施例可以提供各种天线结构，包括以下内容：a）直接印刷在射频（RF）模块或集成无源器件（IPD）侧面上的天线结构，b）在预成型件上制造的印刷天线结构 电介质盖或包覆成型体，c）作为构成无线模块的电介质布线的一部分制造的天线结构，d）直接印刷在完成的RF模块顶部的天线结构，以及e）直接印刷在介电层上的天线结构 邻近薄膜布线和嵌入式无源元件，如滤波器，双工器和耦合器。

公开(公告)号：US07260890B2

公开(公告)日：2007-08-28

申请号：US10402315

申请日：2003-03-28

申请人： George E. White ,  Madhavan Swaminathan ,  Venkatesh Sundaram ,  Sidharth Dalmia

发明人： George E. White ,  Madhavan Swaminathan ,  Venkatesh Sundaram ,  Sidharth Dalmia

IPC分类号： H05K3/36

CPC分类号： B32B37/00 ,  H01F17/0033 ,  H01F41/041 ,  H01L21/4857 ,  H01L25/0652 ,  H01L27/08 ,  H01L2224/16 ,  H01L2224/16235 ,  H01L2224/48235 ,  H01L2924/00014 ,  H01L2924/01012 ,  H01L2924/01019 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15311 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/3011 ,  H01L2924/3025 ,  H05K1/00 ,  H05K1/162 ,  H05K1/167 ,  H05K3/4617 ,  H05K3/4632 ,  H05K3/4688 ,  H05K2201/0129 ,  H05K2201/0141 ,  H05K2201/0209 ,  Y10T29/49126 ,  Y10T29/49149 ,  Y10T29/49158 ,  H01L2224/0401

摘要： The present invention includes methods for making liquid crystalline polymer (LCP) interconnect structures using a high temperature and low temperature single sided liquid crystalline polymer LCP where both the high and low temperature LCP are drilled to form a z-axis connection. The single sided conductive layer is a bus layer to form z axis conductive stud within the high and low temperature LCP, followed by a metallic capping layer of the stud that serves as the bonding metal between the conductive interconnects to form the z-axis connection. High and low temperature LCP layers are etched or built up to form circuit patterns and subsequently bonded together to form final multilayer circuit pattern where the low temperature LCP melts to form both dielectric to dielectric bond to high temperature LCP circuit layer, and dielectric to conductive bond, whereas metal to metal bonding occurs with high temperature metal capping layer bonding to conductive metal layer.

摘要翻译： 本发明包括使用高温低温单面液晶聚合物LCP制备液晶聚合物（LCP）互连结构的方法，其中钻出高低温LCP以形成z轴连接。 单面导电层是在高低温LCP内形成z轴导电柱的总线层，随后是螺柱的金属覆盖层，其用作导电互连之间的结合金属以形成z轴连接。 高温和低温LCP层被蚀刻或构建以形成电路图案并且随后结合在一起以形成最终的多层电路图案，其中低温LCP熔融以形成与高温LCP电路层的电介质至电介质结合，以及电介质至导电键 而金属与金属之间的接合发生在与导电金属层结合的高温金属覆盖层上。

公开(公告)号：US07805834B2

公开(公告)日：2010-10-05

申请号：US11833626

申请日：2007-08-03

申请人： George E. White ,  Madhavan Swaminathan ,  Venkatesh Sundaram ,  Sidharth Dalmia

发明人： George E. White ,  Madhavan Swaminathan ,  Venkatesh Sundaram ,  Sidharth Dalmia

IPC分类号： H05K3/36 ,  H01R12/04

CPC分类号： B32B37/00 ,  H01F17/0033 ,  H01F41/041 ,  H01L21/4857 ,  H01L25/0652 ,  H01L27/08 ,  H01L2224/16 ,  H01L2224/16235 ,  H01L2224/48235 ,  H01L2924/00014 ,  H01L2924/01012 ,  H01L2924/01019 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15311 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/3011 ,  H01L2924/3025 ,  H05K1/00 ,  H05K1/162 ,  H05K1/167 ,  H05K3/4617 ,  H05K3/4632 ,  H05K3/4688 ,  H05K2201/0129 ,  H05K2201/0141 ,  H05K2201/0209 ,  Y10T29/49126 ,  Y10T29/49149 ,  Y10T29/49158 ,  H01L2224/0401

摘要： The present invention includes methods for making liquid crystalline polymer (LCP) interconnect structures using a high temperature and low temperature single sided LCP, where both the high and low temperature LCP are provided with a z-axis connection. The single sided conductive layer is a bus layer to form z-axis conductive stud within the high and low temperature LCP. High and low temperature LCP layers are etched or built up to form circuit patterns and subsequently bonded together to form final multilayer circuit pattern where the low temperature LCP melts to form both dielectric to dielectric bond to high temperature LCP circuit layer, and dielectric to conductive bond.

摘要翻译： 本发明包括使用高温低温单面LCP制造液晶聚合物（LCP）互连结构的方法，其中高低温LCP都具有z轴连接。 单面导电层是在高低温LCP下形成z轴导电螺柱的总线层。 高温和低温LCP层被蚀刻或构建以形成电路图案并且随后结合在一起以形成最终的多层电路图案，其中低温LCP熔融以形成与高温LCP电路层的电介质至电介质结合，以及电介质至导电键 。

公开(公告)号：US07068124B2

公开(公告)日：2006-06-27

申请号：US11140630

申请日：2005-05-27

申请人： George E. White ,  Madhavan Swaminathan ,  Venkatesh Sundaram ,  Sidharth Dalmia

发明人： George E. White ,  Madhavan Swaminathan ,  Venkatesh Sundaram ,  Sidharth Dalmia

IPC分类号： H03H7/00

CPC分类号： H01P1/20381 ,  H01F17/0033 ,  H01F41/041 ,  H01L21/4857 ,  H01L25/0652 ,  H01L27/08 ,  H01L2924/0002 ,  H01L2924/09701 ,  H01L2924/3011 ,  H03H7/38 ,  H01L2924/00

摘要： The present invention includes an organic device that can be integrated in a multilayer board made of organic material. The passive devices can be integrally fabricated on a circuit board in either surface mount device (SMD) or ball grid array (BGA) form. Alternatively, the passive device can be constructed in a stand alone SMD or BGA/chip scale package (CSP) form to make it mountable on a multilayer board, ceramic carrier or silicon platform in the form of an integrated passive device. The passive device includes side shielding on two sides in the SMD form and four sides in the BGA/CSP form. The side shielding can be external or in-built.

摘要翻译： 本发明包括可以集成在由有机材料制成的多层板中的有机器件。 无源器件可以在表面贴装器件（SMD）或球栅阵列（BGA）形式的电路板上整体制造。 或者，无源器件可以以独立的SMD或BGA /芯片级封装（CSP）形式构造，使得其可以以集成的无源器件的形式安装在多层板，陶瓷载体或硅平台上。 无源器件包括SMD形式两侧的侧屏蔽和BGA / CSP形式的四面。 侧面屏蔽可以是外部的或内置的。

公开(公告)号：US20080111226A1

公开(公告)日：2008-05-15

申请号：US11940952

申请日：2007-11-15

申请人： George E. White ,  Sidharth Dalmia

发明人： George E. White ,  Sidharth Dalmia

IPC分类号： H01L23/02

CPC分类号： H01L23/66 ,  H01L24/48 ,  H01L24/73 ,  H01L25/16 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01012 ,  H01L2924/01019 ,  H01L2924/01068 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/0401 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： Example embodiments of the invention may provide for a multi-package system. The multi-package system may include a first package having a plurality of first organic dielectric layers, where the first package includes at least one first conductive layer positioned between two of the plurality of first organic dielectric layers, and where the at least one first conductive layer is circuitized to form at least one first passive device. The multi-package system may also include a second package having a plurality of second organic dielectric layers, where the second package includes at least one second conductive layer positioned between two of the plurality of second organic dielectric layers, and where the at least one second conductive layer is circuitized to form at least one second passive device. An electrical connector may be provided between a bottom surface of the first package and a top surface of the second package to electrically connect the first package and the second package.

摘要翻译： 本发明的示例实施例可以提供多封装系统。 所述多封装系统可以包括具有多个第一有机电介质层的第一封装，其中所述第一封装包括位于所述多个第一有机电介质层中的两个之间的至少一个第一导电层，并且其中所述至少一个第一导电 电路化以形成至少一个第一无源器件。 所述多封装系统还可以包括具有多个第二有机电介质层的第二封装，其中所述第二封装包括位于所述多个第二有机介电层中的两个之间的至少一个第二导电层，并且其中所述至少一个第二 导电层被电路化以形成至少一个第二无源器件。 电连接器可以设置在第一封装的底表面和第二封装的顶表面之间，以电连接第一封装和第二封装。

公开(公告)号：US06987307B2

公开(公告)日：2006-01-17

申请号：US10405024

申请日：2003-03-28

申请人： George E. White ,  Madhavan Swaminathan ,  Venkatesh Sundaram ,  Sidharth Dalmia

发明人： George E. White ,  Madhavan Swaminathan ,  Venkatesh Sundaram ,  Sidharth Dalmia

IPC分类号： H01L23/12 ,  H01L23/053 ,  H01L23/552 ,  H01L29/00

CPC分类号： H01L21/4857 ,  H01F17/0006 ,  H01F17/0033 ,  H01F41/041 ,  H01L25/0652 ,  H01L27/08 ,  H01L2924/0002 ,  H01L2924/09701 ,  H01L2924/3011 ,  H01L2924/00

摘要： The present invention provides for low cost discrete inductor devices in an all organic platform. The inductor devices can utilize virtually any organic material that provides the desired properties, such as liquid crystalline polymer (LCP) or polyphenyl ether (PPE), in a multilayer structure, wherein the organic materials have low moisture uptake and good temperature stability. Each layer may be metalized and selectively interconnected by vias formed in respective layers so as to form winding or coiled inductors. The inductor devices may advantageously include external shielding formed by metalizing the side walls and top surface of the inductor devices on in-built shielding achieved by the utilization of the hybrid co-planar waveguide topologies. The inductor devices can be configured for either ball grid array (BGA)/chip scale package (CSP) or surface mount device (SMD) mounting to circuit boards.

摘要翻译： 本发明提供了在所有有机平台中的低成本分立电感器件。 电感器件可以实际上利用多层结构中提供所需性能的任何有机材料，例如液晶聚合物（LCP）或聚苯醚（PPE）），其中有机材料具有低吸湿性和良好的温度稳定性。 每个层可以被金属化并且通过形成在各个层中的通孔选择性地互连，从而形成绕组或线圈电感器。 电感器件可以有利地包括通过利用混合共面波导拓扑实现的内置屏蔽，使电感器件的侧壁和顶表面金属化形成的外部屏蔽。 电感器件可以配置为安装到电路板的球栅阵列（BGA）/芯片级封装（CSP）或表面贴装器件（SMD）。

公开(公告)号：US08345433B2

公开(公告)日：2013-01-01

申请号：US11177508

申请日：2005-07-08

申请人： George E. White ,  Sidharth Dalmia ,  Venkatesh Sundaram ,  Madhavan Swaminathan

发明人： George E. White ,  Sidharth Dalmia ,  Venkatesh Sundaram ,  Madhavan Swaminathan

IPC分类号： H05K1/18

CPC分类号： H05K1/186 ,  H01L21/4857 ,  H01L23/055 ,  H01L23/13 ,  H01L23/49827 ,  H01L23/49833 ,  H01L23/5383 ,  H01L23/5389 ,  H01L24/48 ,  H01L2224/16225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/1517 ,  H01L2924/15311 ,  H01L2924/16152 ,  H01L2924/16195 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/3025 ,  H05K1/183 ,  H05K2201/09509 ,  H05K2201/09536 ,  H05K2203/061 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/0401 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： Organic laminate stack ups are disclosed for a variety of applications, including high frequency RF applications. One or more inner core layers may be disposed between outer layers along with bondply or prepreg layers as needed. Discrete devices, including surface mount components and flip chips, may be embedded within the organic laminate stack up structures. The embedding of the discrete devices, which may be active or passive devices, may be in the form of a layer of bondply or prepreg encapsulating the discrete devices. In addition or in the alternative, cavities may be formed in at least the outer layers for housing discrete devices, which include surface mount components, flip chips, and wire bonded integrated circuits. A variety of caps may be utilized to seal the cavities. Further, shielding may be provided for the organic laminate stack up structure, including through a wall of vias or a plated trench cut along at least one side of the stack up structure. Each stack up structure may be packaged in a variety of ways, including as a surface mount component, ball grid array, or land grid array.

摘要翻译： 公开了有机层压叠层用于各种应用，包括高频RF应用。 根据需要，一个或多个内芯层可以与键合层或预浸料层一起设置在外层之间。 分立器件，包括表面贴装元件和倒装芯片，可嵌入有机叠层堆叠结构内。 可以是有源或无源器件的分立器件的嵌入可以是封装分立器件的键合层或预浸料的形式。 另外或在替代方案中，空腔可以形成在至少外层中，用于容纳包括表面安装部件，倒装芯片和引线键合集成电路的分立器件。 可以使用各种盖来密封空腔。 此外，可以提供用于有机层叠叠层结构的屏蔽，包括穿过通孔壁或沿堆叠结构的至少一侧切割的电镀沟槽。 每个堆叠结构可以以各种方式包装，包括作为表面安装部件，球栅阵列或平台网格阵列。