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    Method for forming self-aligned dielectric cap above floating gate
    4.
    发明授权
    Method for forming self-aligned dielectric cap above floating gate 有权
    在浮动栅上形成自对准电介质盖的方法

    公开(公告)号：US08207036B2

    公开(公告)日：2012-06-26

    申请号：US12242857

    申请日：2008-09-30

    申请人： Vinod Robert Purayath ,  George Matamis ,  Takashi Orimoto ,  Henry Chien ,  James K. Kai

    发明人： Vinod Robert Purayath ,  George Matamis ,  Takashi Orimoto ,  Henry Chien ,  James K. Kai

    IPC分类号： H01L21/336 ,  H01L21/8238 ,  H01L21/3205 ,  H01L21/4763 ,  H01L29/788

    CPC分类号： H01L21/28273 ,  H01L27/11519 ,  H01L27/11521 ,  H01L29/513 ,  H01L29/7881

    摘要： A method for fabricating a non-volatile storage element. The method comprises forming a layer of polysilicon floating gate material over a substrate and forming a layer of nitride at the surface of the polysilicon floating gate material. Floating gates are formed from the polysilicon floating gate material. Individual dielectric caps are formed from the nitride such that each individual nitride dielectric cap is self-aligned with one of the plurality of floating gates. An inter-gate dielectric layer is formed over the surface of the dielectric caps and the sides of the floating gates. Control gates are then formed with the inter-gate dielectric layer separating the control gates from the floating gates. The layer of nitride may be formed using SPA (slot plane antenna) nitridation. The layer of nitride may be formed prior to or after etching of the polysilicon floating gate material to form floating gates.

    摘要翻译： 一种用于制造非易失性存储元件的方法。 该方法包括在衬底上形成多晶硅浮栅材料层，并在多晶硅浮栅材料的表面形成一层氮化物。 浮栅由多晶硅浮栅材料形成。 各个绝缘盖由氮化物形成，使得每个单独的氮化物介电帽与多个浮动栅之一自对准。 在电介质盖的表面和浮动栅极的侧面上形成栅极间介电层。 然后，栅极介电层与控制栅极与浮动栅极分离形成控制栅极。 可以使用SPA（槽平面天线）氮化形成氮化物层。 可以在蚀刻多晶硅浮栅材料之前或之后形成氮化物层以形成浮栅。

    METHOD FOR FORMING SELF-ALIGNED DIELECTRIC CAP ABOVE FLOATING GATE
    6.
    发明申请
    METHOD FOR FORMING SELF-ALIGNED DIELECTRIC CAP ABOVE FLOATING GATE 有权
    在浮动门上形成自对准电介质盖的方法

    公开(公告)号：US20100081267A1

    公开(公告)日：2010-04-01

    申请号：US12242857

    申请日：2008-09-30

    申请人： Vinod Robert Purayath ,  George Matamis ,  Takashi Orimoto ,  Henry Chien ,  James K. Kai

    发明人： Vinod Robert Purayath ,  George Matamis ,  Takashi Orimoto ,  Henry Chien ,  James K. Kai

    IPC分类号： H01L21/3205

    CPC分类号： H01L21/28273 ,  H01L27/11519 ,  H01L27/11521 ,  H01L29/513 ,  H01L29/7881

    摘要： A method for fabricating a non-volatile storage element. The method comprises forming a layer of polysilicon floating gate material over a substrate and forming a layer of nitride at the surface of the polysilicon floating gate material. Floating gates are formed from the polysilicon floating gate material. Individual dielectric caps are formed from the nitride such that each individual nitride dielectric cap is self-aligned with one of the plurality of floating gates. An inter-gate dielectric layer is formed over the surface of the dielectric caps and the sides of the floating gates. Control gates are then formed with the inter-gate dielectric layer separating the control gates from the floating gates. The layer of nitride may be formed using SPA (slot plane antenna) nitridation. The layer of nitride may be formed prior to or after etching of the polysilicon floating gate material to form floating gates.

    摘要翻译： 一种用于制造非易失性存储元件的方法。 该方法包括在衬底上形成多晶硅浮栅材料层，并在多晶硅浮栅材料的表面形成一层氮化物。 浮栅由多晶硅浮栅材料形成。 各个绝缘盖由氮化物形成，使得每个单独的氮化物介电帽与多个浮动栅之一自对准。 在电介质盖的表面和浮动栅极的侧面上形成栅极间介电层。 然后，栅极介电层与控制栅极与浮动栅极分离形成控制栅极。 可以使用SPA（槽平面天线）氮化形成氮化物层。 可以在蚀刻多晶硅浮栅材料之前或之后形成氮化物层以形成浮栅。

    Dielectric layer above floating gate for reducing leakage current
    9.
    发明授权
    Dielectric layer above floating gate for reducing leakage current 有权
    介质层上方浮栅为了减少漏电流

    公开(公告)号：US07919809B2

    公开(公告)日：2011-04-05

    申请号：US12170327

    申请日：2008-07-09

    申请人： Dana Lee ,  Henry Chin ,  James K. Kai ,  Takashi Whitney Orimoto ,  Vinod R. Purayath ,  George Matamis

    发明人： Dana Lee ,  Henry Chin ,  James K. Kai ,  Takashi Whitney Orimoto ,  Vinod R. Purayath ,  George Matamis

    IPC分类号： H01L29/788

    CPC分类号： H01L27/11521 ,  G11C16/0483 ,  H01L21/84 ,  H01L27/1203

    摘要： A memory system is disclosed that includes a set of non-volatile storage elements. A given memory cell has a dielectric cap above the floating gate. In one embodiment, the dielectric cap resides between the floating gate and a conformal IPD layer. The dielectric cap reduces the leakage current between the floating gate and a control gate. The dielectric cap achieves this reduction by reducing the strength of the electric field at the top of the floating gate, which is where the electric field would be strongest without the dielectric cap for a floating gate having a narrow stem.

    摘要翻译： 公开了一种包括一组非易失性存储元件的存储器系统。 给定的存储单元在浮动栅极上方具有电介质盖。 在一个实施例中，电介质帽位于浮动栅极和共形IPD层之间。 电介质盖减少了浮动栅极和控制栅极之间的漏电流。 电介质盖通过降低浮动栅极顶部的电场的强度来实现这种减小，这是电场将是最强的，而没有用于具有窄的杆的浮动栅极的电介质盖。