-
公开(公告)号：US07483681B2
公开(公告)日：2009-01-27
申请号：US12021958
申请日：2008-01-29
申请人： Giuseppe Grillo , Pepijn Willebrord Justinus Van De Ven , Pieter Gerrit Blanken , Dominicus Martinus Wilhelmus Leenaerts , Franciscus Adrianus Cornelis Maria Schoofs
发明人： Giuseppe Grillo , Pepijn Willebrord Justinus Van De Ven , Pieter Gerrit Blanken , Dominicus Martinus Wilhelmus Leenaerts , Franciscus Adrianus Cornelis Maria Schoofs
IPC分类号： H01Q11/12
CPC分类号： H04W52/52 , H03G1/0088 , H03G3/004 , H04W52/08
摘要： A transmitter comprises a power amplifier which has an amplifier power-supply input and an output to supply a transmission signal with an output power. A power supply has power supply outputs to supply a first power supply voltage and a second power supply voltage. A switching circuit is arranged between the power supply outputs and the amplifier power-supply input. A controller has an input to receive a power change command to control: first the switching circuit to supply the first power supply voltage to the amplifier power-supply input, and the power supply to vary a level of the second power supply voltage, the level of the second power supply voltage being lower or higher than a level of the first power supply voltage if the power change command indicates that the output power has to decrease or increase, respectively, and secondly the switching circuit to supply the second power supply voltage to the amplifier power-supply input.
摘要翻译： 发射机包括功率放大器，其具有放大器电源输入和用于向发射信号提供输出功率的输出。 电源具有电源输出以提供第一电源电压和第二电源电压。 开关电路设置在电源输出和放大器电源输入之间。 控制器具有用于接收功率改变命令的输入，用于控制：首先，开关电路将第一电源电压提供给放大器电源输入，并且电源改变第二电源电压的电平，电平 所述第二电源电压分别低于或高于所述第一电源电压的电平，如果所述电力变化指示分别指示所述输出功率必须减小或增加，其次所述开关电路将所述第二电源电压提供给 放大器电源输入。
-
公开(公告)号：US20080139129A1
公开(公告)日：2008-06-12
申请号：US12021958
申请日：2008-01-29
申请人： Giuseppe Grillo , Pepijn Willebrord Justinus Van De Ven , Pieter Gerrit Blanken , Dominicus Martinus Wilhelmus Leenaerts , Franciscus Adrianus Cornelis Maria Schoofs
发明人： Giuseppe Grillo , Pepijn Willebrord Justinus Van De Ven , Pieter Gerrit Blanken , Dominicus Martinus Wilhelmus Leenaerts , Franciscus Adrianus Cornelis Maria Schoofs
CPC分类号： H04W52/52 , H03G1/0088 , H03G3/004 , H04W52/08
摘要： A transmitter comprises a power amplifier which has an amplifier power-supply input and an output to supply a transmission signal with an output power. A power supply has power supply outputs to supply a first power supply voltage and a second power supply voltage. A switching circuit is arranged between the power supply outputs and the amplifier power-supply input. A controller has an input to receive a power change command to control: first the switching circuit to supply the first power supply voltage to the amplifier power-supply input, and the power supply to vary a level of the second power supply voltage, the level of the second power supply voltage being lower or higher than a level of the first power supply voltage if the power change command indicates that the output power has to decrease or increase, respectively, and secondly the switching circuit to supply the second power supply voltage to the amplifier power-supply input.
摘要翻译： 发射机包括功率放大器，其具有放大器电源输入和用于向发射信号提供输出功率的输出。 电源具有电源输出以提供第一电源电压和第二电源电压。 开关电路设置在电源输出和放大器电源输入之间。 控制器具有用于接收功率改变命令的输入，用于控制：首先，开关电路将第一电源电压提供给放大器电源输入，并且电源改变第二电源电压的电平，电平 所述第二电源电压分别低于或高于所述第一电源电压的电平，如果所述电力变化指示分别指示所述输出功率必须减小或增加，其次所述开关电路将所述第二电源电压提供给 放大器电源输入。
-
公开(公告)号：US07392023B2
公开(公告)日：2008-06-24
申请号：US10550340
申请日：2004-03-22
申请人： Giuseppe Grillo , Pepijn Van De Ven , Pieter Blanken , Dominicus Martinus Wilhelmus Leenaerts , Franciscus Adrianus Cornelis Maria Schoofs
发明人： Giuseppe Grillo , Pepijn Van De Ven , Pieter Blanken , Dominicus Martinus Wilhelmus Leenaerts , Franciscus Adrianus Cornelis Maria Schoofs
IPC分类号： H01Q11/12
CPC分类号： H04W52/52 , H03G1/0088 , H03G3/004 , H04W52/08
摘要： A transmitter comprises a power amplifier (PA) which has an amplifier powersupply input (PI) and an output (PAO) to supply a transmission signal (Vo) with an output power (Po). A power supply (PS) has power supply outputs (PSO1, PSO2) to supply a first power supply voltage (PV1) and a second power supply voltage (PV2). A switching circuit(SC) is arranged between the power supply outputs (PSO 1, PSO2) and the amplifier powersupply input (PI). A controller (CO) has an input to receive a power change command (PC) to control: first (i) the switching circuit (SC) to supply the first power supply voltage (PV1) to the amplifier power-supply input (PI), and the power supply (PS) to vary a level of the second power supply voltage (PV2), the level of the second power supply voltage (PV2) being lower or higher than a level of the first power supply voltage(PV1) if the power change command (PC) indicates that the output power has to decrease or increase, respectively, and secondly (ii) the switching circuit (SC) to supply the second power supply voltage (PV2) to the amplifier power-supply input (PI).
摘要翻译： 发射机包括具有放大器供电输入（PI）的功率放大器（PA）和用于向输出功率（Po）提供发送信号（Vo）的输出（PAO）。 电源（PS）具有电源输出（PSO 1，PSO 2）以提供第一电源电压（PV 1）和第二电源电压（PV 2）。 开关电路（SC）布置在电源输出（PSO 1，PSO 2）和放大器电源输入（PI）之间。 控制器（CO）具有用于接收功率改变命令（PC）的输入端，用于控制：首先（i）开关电路（SC）将第一电源电压（PV 1）提供给放大器电源输入端 ）和电源（PS），以改变第二电源电压（PV 2）的电平，第二电源电压（PV 2）的电平低于或高于第一电源电压的电平（ PV 1）如果功率变化指令（PC）分别表示输出功率必须减小或增加，其次（ii）开关电路（SC）将第二电源电压（PV 2）提供给放大器功率 - 供应输入（PI）。
-
公开(公告)号：US09240772B2
公开(公告)日：2016-01-19
申请号：US13262626
申请日：2010-03-30
申请人： Salvatore Drago , Fabio Sebastiano , Dominicus Martinus Wilhelmus Leenaerts , Lucien Johannes Breems , Bram Nauta
发明人： Salvatore Drago , Fabio Sebastiano , Dominicus Martinus Wilhelmus Leenaerts , Lucien Johannes Breems , Bram Nauta
CPC分类号： H03K3/0322 , H03K3/012 , H03L7/0802 , H03L7/087 , H03L7/0995 , H03L7/10 , H03L7/18 , H03L2207/06 , H03L2207/50
摘要： A low power frequency synthesizer circuit for a radio transceiver, the synthesizer circuit comprising: a digital controlled oscillator configured to generate an output signal (Fo) having a frequency controlled by an input digital control word (DCW); a feedback loop connected between an output and an input of the digital controlled oscillator, the feedback loop configured to provide the digital control word to the input of the digital controlled oscillator from an error derived from an input frequency control word (FCW) and the output signal; and a duty cycle module connected to the digital controlled oscillator and the feedback loop, the duty cycle module configured to generate a plurality of control signals to periodically enable and disable the digital controlled oscillator for a set fraction of clock cycles of an input reference clock signal (RefClock).
摘要翻译： 一种用于无线电收发器的低功率频率合成器电路，所述合成器电路包括：数字控制振荡器，被配置为产生具有由输入数字控制字（DCW）控制的频率的输出信号（Fo）; 连接在数字控制振荡器的输出和输入端之间的反馈回路，反馈回路被配置为从数字控制振荡器的输入端向从输入频率控制字（FCW）和输出 信号; 以及连接到数字控制振荡器和反馈回路的占空比模块，所述占空比模块被配置为产生多个控制信号，以周期地启用和禁用数字控制振荡器用于输入参考时钟信号的时钟周期的一小部分 （RefClock）。
-
公开(公告)号：US07579883B2
公开(公告)日：2009-08-25
申请号：US11573349
申请日：2005-07-27
IPC分类号： H03B19/00
CPC分类号： H03K23/505 , H03K23/662
摘要： A frequency divider providing an odd integer division factor comprising a binary counter (10) providing an even integer division factor, which is the first even number smaller than the odd division factor, the binary counter having a clock input for receiving a periodical clock signal (Ck) having a frequency. The circuit further comprises an end of count circuit (20) coupled to the binary counter and generating an End Of Count signal (EOC) for a clock (Ck) period after every even integer number periods of the clock signal (Ck), the end of count signal (EOC) being inputted to an input (IN) of the counter (10). The circuit further includes an output generator (30) coupled to the binary counter and to the clock signal (Ck), the output generator (30) generating an output signal (OUT) having a frequency which is substantially equal with the frequency of the frequency signal (Ck) divided by the odd division factor.
摘要翻译： 一种提供奇整数除法系数的分频器，包括二进制计数器（10），该二进制计数器提供偶数整数除数因子，其是比奇分系数小的第一偶数，二进制计数器具有用于接收周期性时钟信号的时钟输入（ Ck）具有频率。 电路还包括耦合到二进制计数器的计数电路（20）的末端，并且在时钟信号（Ck）的每个偶数整数周期之后产生用于时钟（Ck）周期的计数结束信号（EOC），结束 的计数信号（EOC）输入到计数器（10）的输入（IN）。 电路还包括耦合到二进制计数器和时钟信号（Ck）的输出发生器（30），输出发生器（30）产生具有与频率频率基本相等的频率的输出信号（OUT） 信号（Ck）除以奇分系数。
-
公开(公告)号：US07567131B2
公开(公告)日：2009-07-28
申请号：US11574916
申请日：2005-09-05
申请人： Remco Cornelis Herman Van De Beek , Dominicus Martinus Wilhelmus Leenaerts , Gerard Van Der Weide , Jozef Reinerus Maria Bergervoet
发明人： Remco Cornelis Herman Van De Beek , Dominicus Martinus Wilhelmus Leenaerts , Gerard Van Der Weide , Jozef Reinerus Maria Bergervoet
IPC分类号： H03L7/00
CPC分类号： H03D3/009
摘要： Devices (1) for exchanging ultra wide band signals comprise frequency translating stages (20,30) for frequency translating signals and oscillating stages (40) for supplying main inphase/quadrature oscillation signals to the frequency translating stages (20,30). By providing the oscillating stages (40) with polyphase filters (43,44) for reducing harmonics in oscillation signals, the main oscillation signals will be sufficiently clean. The oscillating stages (40) comprise mixers (46) for converting first inphase/quadrature oscillation signals and second inphase/quadrature oscillation signals into the main oscillation signals. The polyphase filters (43,44) may be located before and after the mixers (46). Frequency selectors (45) replace prior art multiplexers located after the mixers (46). Such frequency selectors (45) comprise multiplexers (126,127) for supplying the second inphase/quadrature oscillation signals, with a combination of these second oscillation signals corresponding with a positive frequency, a negative frequency or a zero frequency, and comprise coders (125) for controlling the multiplexers (126,127).
摘要翻译： 用于交换超宽带信号的装置（1）包括用于频率转换信号的频率转换级（20,30）和用于将主相位/正交振荡信号提供给频率转换级（20,30）的振荡级（40）。 通过为振荡级（40）提供多相滤波器（43,44）以减少振荡信号中的谐波，主振荡信号将足够清洁。 振荡级（40）包括用于将第一同相/正交振荡信号和第二同相/正交振荡信号转换成主振荡信号的混频器（46）。 多相过滤器（43,44）可以位于混合器（46）之前和之后。 频率选择器（45）代替位于混频器（46）之后的现有技术的多路复用器。 这种频率选择器（45）包括用于提供第二同相/正交振荡信号的多路复用器（126,127）以及与正频率，负频率或零频率对应的这些第二振荡信号的组合，并且包括编码器（125），用于 控制多路复用器（126,127）。
-
7.发明申请公开(公告)号：US20100240336A1
公开(公告)日：2010-09-23
申请号：US12800960
申请日：2010-05-26
IPC分类号： H04B1/16
CPC分类号： H03F3/45188 , H03F3/19 , H03F3/393 , H03F3/45242 , H03F2200/294 , H03F2200/331 , H03F2200/336 , H03F2200/372
摘要： A front end and a high frequency receiver (1) provided therewith are described, which front end comprises a quadrature low noise amplifier (2-1, 2-2) as a low noise amplifier. A high isolation between local oscillators (6-1, 6-2) and quadrature mixers (3-1, 3-2) is achieved thereby, reducing a DC offset at mixer outputs (7, 8). The quadrature low noise amplifier may be implemented as a differential class AB cascade arrangement of MOST or FET semiconductors (15). A low distortion receiver (1) having a high linearity is the result.
摘要翻译： 描述了提供有前端和高频接收器（1）的前端包括作为低噪声放大器的正交低噪声放大器（2-1,2-2）。 因此实现了本地振荡器（6-1,6-2）和正交混频器（3-1,3-2）之间的高隔离度，从而减小了混频器输出端的直流偏移（7,8）。 正交低噪声放大器可以被实现为MOST或FET半导体的差分级AB级联布置（15）。 结果是具有高线性度的低失真接收机（1）。
-
公开(公告)号：US07755444B2
公开(公告)日：2010-07-13
申请号：US12090727
申请日：2006-10-18
CPC分类号： H03C3/0941 , H03C3/095 , H03C3/0975 , H03C5/00 , H04L27/361
摘要： The present invention relates to a polar modulation apparatus and method, in which an in-phase and a quadrature-phase signal are processed in the analog domain to generate an analog signal corresponding to a derivative of a phase component of said polar-modulated signal. The analog signal is then input to a control input of a controlled oscillator (40). As an example, the processing may be based on a differentiate-and-multiply algorithm in the analog domain. Thereby, phase and envelope signals are generated in the analog domain and bandwidth enlargement due to the processing of the polar signals and corresponding aliasing can be prevented to obtain a highly accurate polar-modulated output signal.
摘要翻译： 本发明涉及一种极坐标调制装置和方法，其中在模拟域中处理同相和正交相位信号以产生对应于所述极坐标调制信号的相位分量的微分的模拟信号。 然后将模拟信号输入到受控振荡器（40）的控制输入端。 作为示例，处理可以基于模拟域中的差分和乘法算法。 因此，在模拟域中产生相位和包络信号，并且由于极坐标信号的处理而导致带宽放大，可以防止相应的混叠，从而获得高精度的极调制输出信号。
-
公开(公告)号：US07671641B1
公开(公告)日：2010-03-02
申请号：US10591969
申请日：2005-03-04
IPC分类号： H03B19/00
CPC分类号： H03K23/44 , H03K3/356121
摘要： A frequency divider includes a first latch and a second latch. The first latch is configured to receive a clock signal. The first latch is cross-coupled to the second latch. The second latch includes a circuit configured as a low-pass filter. The second latch further includes a differential pair of transistors. Each of the transistors include a drain, a source and a gate. The gates of the at least two transistors configured to receive a signal generated by the first latch. Additionally, the gates of the at least two other transistors are coupled to a control signal for determining a low-pass characteristic of the second latch.
摘要翻译： 分频器包括第一锁存器和第二锁存器。 第一个锁存器被配置为接收时钟信号。 第一锁存器与第二锁存器交叉耦合。 第二锁存器包括被配置为低通滤波器的电路。 第二锁存器还包括差分对晶体管。 每个晶体管包括漏极，源极和栅极。 所述至少两个晶体管的栅极被配置为接收由第一锁存器产生的信号。 另外，至少两个其它晶体管的栅极耦合到用于确定第二锁存器的低通特性的控制信号。
-
10.发明授权公开(公告)号：US06838938B2
公开(公告)日：2005-01-04
申请号：US10481984
申请日：2003-07-03
CPC分类号： H03F3/45085 , H03F1/0261 , H03F3/45183 , H03F2203/45596
摘要： A communication system comprising a power amplifier coupled to a detector and further coupled to a Bias generator. The detector comprises a controlled amplifier means for generating an output signal (Th_S), the said signal Th_S being indicative for the power of an input signal and having a controllable bias level. The Bias Generator comprises a Level Sensitive Current Generator (LSCG) for generating a current (Cc) controlled by the output signal Th_S. Said LSCG has a threshold level (TL) such that when the output Th_S signal is lower than the TL the current Cc is substantially zero. Otherwise the current Cc is linearly controlled by the signal Th_S. The Bias Generator further comprises an adapter coupled to the LSCG comprising a current controlled adapting means for generating a control signal (C_S) for controlling a property of the amplifier, the control signal C_S having a controllable linear dependency on the current Cc.
-
-
-
-
-
-
-
-
-
搜索结果
29 条记录 (耗时 0.041 秒)
