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    Minimally-patterned semiconductor devices for display applications
    4.
    发明授权
    Minimally-patterned semiconductor devices for display applications 失效
    用于显示应用的最小图案化半导体器件

    公开(公告)号：US07030412B1

    公开(公告)日：2006-04-18

    申请号：US09565413

    申请日：2000-05-05

    申请人： Paul S. Drzaic ,  Karl R. Amundson ,  Gregg M. Duthaler ,  Peter T. Kazlas ,  Yu Chen

    发明人： Paul S. Drzaic ,  Karl R. Amundson ,  Gregg M. Duthaler ,  Peter T. Kazlas ,  Yu Chen

    IPC分类号： H01L29/04

    CPC分类号： H01L29/0603 ,  H01L27/1255

    摘要： A thin-film transistor array comprises at least first and second transistors. Each transistor comprises a source electrode, a drain electrode a semiconductor electrode, a gate electrode, and a semiconductor layer. The semiconductor layer is continuous between the first and second transistors. The semiconductor layer is preferably unpatterned. In various display applications, the geometry of the transistors is selected to provide acceptable leakage currents. In a preferred embodiment, the transistor array is employed in an encapsulated electrophoretic display.

    摘要翻译： 薄膜晶体管阵列至少包括第一和第二晶体管。 每个晶体管包括源电极，漏电极，半导体电极，栅电极和半导体层。 半导体层在第一和第二晶体管之间是连续的。 半导体层优选为未图案化。 在各种显示应用中，选择晶体管的几何形状以提供可接受的泄漏电流。 在优选实施例中，晶体管阵列用于封装的电泳显示器。

    PROCESSES FOR FORMING BACKPLANES FOR ELECTRO-OPTIC DISPLAYS
    8.
    发明申请
    PROCESSES FOR FORMING BACKPLANES FOR ELECTRO-OPTIC DISPLAYS 有权
    用于形成电光显示器的背板的方法

    公开(公告)号：US20100265239A1

    公开(公告)日：2010-10-21

    申请号：US12825991

    申请日：2010-06-29

    申请人： Karl R. Amundson ,  Guy M. Danner ,  Gregg M. Duthaler ,  Peter T. Kazlas ,  Yu Chen ,  Kevin L. Denis ,  Nathan R. Kane ,  Andrew P. Ritenour

    发明人： Karl R. Amundson ,  Guy M. Danner ,  Gregg M. Duthaler ,  Peter T. Kazlas ,  Yu Chen ,  Kevin L. Denis ,  Nathan R. Kane ,  Andrew P. Ritenour

    IPC分类号： G06F3/038 ,  H01J9/24 ,  H01L21/20

    CPC分类号： H01L27/1266 ,  B60C23/04 ,  G02F1/133305 ,  G02F1/1362 ,  G02F1/167 ,  G02F2001/13613 ,  H01L27/1214 ,  H01L27/1288 ,  H01L29/66765 ,  H01L29/78603

    摘要： A non-linear element is formed on a flexible substrate by securing the substrate to a rigid carrier, forming the non-linear element, and then separating the flexible substrate from the carrier. The process allows flexible substrates to be processed in a conventional fab intended to process rigid substrates. In a second method, a transistor is formed on a insulating substrate by forming gate electrodes, depositing a dielectric layer, a semiconductor layer and a conductive layer, patterning the conductive layer to form source, drain and pixel electrodes, covering the channel region of the resultant transistor with an etch-resistant material and etching using the etch-resistant material and the conductive layer as a mask, the etching extending substantially through the semiconductor layer between adjacent transistors. The invention also provides a process for forming a diode on a substrate by depositing on the substrate a first conductive layer, and a second patterned conductive layer and a patterned dielectric layer over parts of the first conductive layer, and etching the first conductive layer using the second conductive layer and dielectric layer as an etch mask. Finally, the invention provides a process for driving an impulse-sensitive electro-optic display.

    摘要翻译： 通过将基板固定到刚性载体上，形成非线性元件，然后将柔性基板与载体分离，在柔性基板上形成非线性元件。 该方法允许柔性基底在旨在处理刚性基底的常规晶圆中进行加工。 在第二种方法中，通过形成栅电极，沉积介电层，半导体层和导电层，在绝缘基板上形成晶体管，图案化导电层以形成源极，漏极和像素电极，覆盖该沟道区 具有耐蚀刻材料的合成晶体管和使用耐蚀刻材料和导电层作为掩模的蚀刻，蚀刻基本上延伸通过相邻晶体管之间的半导体层。 本发明还提供了一种通过在衬底上沉积第一导电层以及第二图案化导电层和在第一导电层的部分上的图案化电介质层在衬底上形成二极管的工艺，并且使用 第二导电层和介电层作为蚀刻掩模。 最后，本发明提供一种驱动脉冲敏感电光显示器的方法。

    Processes for forming backplanes for electro-optic displays
    10.
    发明授权
    Processes for forming backplanes for electro-optic displays 有权
    用于形成电光显示器背板的工艺

    公开(公告)号：US08389381B2

    公开(公告)日：2013-03-05

    申请号：US12825991

    申请日：2010-06-29

    申请人： Karl R. Amundson ,  Guy M. Danner ,  Gregg M. Duthaler ,  Peter T. Kazlas ,  Yu Chen ,  Kevin L. Denis ,  Nathan R. Kane ,  Andrew P. Ritenour

    发明人： Karl R. Amundson ,  Guy M. Danner ,  Gregg M. Duthaler ,  Peter T. Kazlas ,  Yu Chen ,  Kevin L. Denis ,  Nathan R. Kane ,  Andrew P. Ritenour

    IPC分类号： H01L21/30

    CPC分类号： H01L27/1266 ,  B60C23/04 ,  G02F1/133305 ,  G02F1/1362 ,  G02F1/167 ,  G02F2001/13613 ,  H01L27/1214 ,  H01L27/1288 ,  H01L29/66765 ,  H01L29/78603

    摘要： A non-linear element is formed on a flexible substrate by securing the substrate to a rigid carrier, forming the non-linear element, and then separating the flexible substrate from the carrier. The process allows flexible substrates to be processed in a conventional fab intended to process rigid substrates. In a second method, a transistor is formed on a insulating substrate by forming gate electrodes, depositing a dielectric layer, a semiconductor layer and a conductive layer, patterning the conductive layer to form source, drain and pixel electrodes, covering the channel region of the resultant transistor with an etch-resistant material and etching using the etch-resistant material and the conductive layer as a mask, the etching extending substantially through the semiconductor layer between adjacent transistors. The invention also provides a process for forming a diode on a substrate by depositing on the substrate a first conductive layer, and a second patterned conductive layer and a patterned dielectric layer over parts of the first conductive layer, and etching the first conductive layer using the second conductive layer and dielectric layer as an etch mask. Finally, the invention provides a process for driving an impulse-sensitive electro-optic display.

    摘要翻译： 通过将基板固定到刚性载体上，形成非线性元件，然后将柔性基板与载体分离，在柔性基板上形成非线性元件。 该方法允许柔性基底在旨在处理刚性基底的常规晶圆中进行加工。 在第二种方法中，通过形成栅电极，沉积介电层，半导体层和导电层，在绝缘基板上形成晶体管，图案化导电层以形成源极，漏极和像素电极，覆盖该沟道区 具有耐蚀刻材料的合成晶体管和使用耐蚀刻材料和导电层作为掩模的蚀刻，蚀刻基本上延伸通过相邻晶体管之间的半导体层。 本发明还提供了一种通过在衬底上沉积第一导电层以及第二图案化导电层和在第一导电层的部分上的图案化电介质层在衬底上形成二极管的工艺，并且使用 第二导电层和介电层作为蚀刻掩模。 最后，本发明提供一种驱动脉冲敏感电光显示器的方法。