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    Delayed clock signal generator
    1.
    发明授权
    Delayed clock signal generator 有权
    延时时钟信号发生器

    公开(公告)号：US07106117B2

    公开(公告)日：2006-09-12

    申请号：US10910644

    申请日：2004-08-04

    申请人： Gun-Ok Jung ,  Jin-Han Kim ,  Sung-Bae Park ,  Chul-Woo Kim ,  Seok-Soo Yoon ,  Seok-Ryoung Yoon

    发明人： Gun-Ok Jung ,  Jin-Han Kim ,  Sung-Bae Park ,  Chul-Woo Kim ,  Seok-Soo Yoon ,  Seok-Ryoung Yoon

    IPC分类号： H03H11/26

    CPC分类号： H03K5/133 ,  H03K5/135 ,  H03K2005/00156 ,  H03K2005/00286

    摘要： A device which may be configured to generate delayed clock signals by a specified phase difference, which may include a clock generator circuit for generating at least one clock signal, a delayed clock signal generator for delaying the at least one clock signal, a phase detect circuit for generating a selecting signal based on the amount of phase delay detected according to a half-cycle (π), and in comparison with the clock signal, a phase interpolation circuit for controlling the delay time of the delayed clock signals and interpolating the delayed clock signals, and a selecting circuit which outputs the delayed clock signal delayed by a specified phase difference.

    摘要翻译： 一种可被配置为通过指定的相位差产生延迟的时钟信号的装置，其可以包括用于产生至少一个时钟信号的时钟发生器电路，用于延迟所述至少一个时钟信号的延迟时钟信号发生器，相位检测电路 用于基于根据半周期（pi）检测到的相位延迟量来生成选择信号，并且与时钟信号相比，相位插值电路用于控制延迟的时钟信号的延迟时间并内插延迟的时钟 信号，以及输出延迟了指定相位差的延迟时钟信号的选择电路。

    Delayed clock signal generator
    2.
    发明申请
    Delayed clock signal generator 有权
    延时时钟信号发生器

    公开(公告)号：US20050052211A1

    公开(公告)日：2005-03-10

    申请号：US10910644

    申请日：2004-08-04

    申请人： Gun-Ok Jung ,  Jin-Han Kim ,  Sung-Bae Park ,  Chul-Woo Kim ,  Seok-Soo Yoon ,  Seok-Ryoung Yoon

    发明人： Gun-Ok Jung ,  Jin-Han Kim ,  Sung-Bae Park ,  Chul-Woo Kim ,  Seok-Soo Yoon ,  Seok-Ryoung Yoon

    IPC分类号： G06F1/06 ,  H03H11/26 ,  H03K5/00 ,  H03K5/05 ,  H03K5/13 ,  H03K5/135 ,  H03K5/15 ,  H03K5/26 ,  H03L7/081 ,  H04L7/02

    CPC分类号： H03K5/133 ,  H03K5/135 ,  H03K2005/00156 ,  H03K2005/00286

    摘要： A device which may be configured to generate delayed clock signals by a specified phase difference, which may include a clock generator circuit for generating at least one clock signal, a delayed clock signal generator for delaying the at least one clock signal, a phase detect circuit for generating a selecting signal based on the amount of phase delay detected according to a half-cycle (π), and in comparison with the clock signal, a phase interpolation circuit for controlling the delay time of the delayed clock signals and interpolating the delayed clock signals, and a selecting circuit which outputs the delayed clock signal delayed by a specified phase difference.

    摘要翻译： 一种可以被配置为通过指定的相位差产生延迟的时钟信号的装置，其可以包括用于产生至少一个时钟信号的时钟发生器电路，用于延迟所述至少一个时钟信号的延迟时钟信号发生器，相位检测电路 用于基于根据半周期（pi）检测到的相位延迟量来生成选择信号，并且与时钟信号相比，相位插值电路用于控制延迟的时钟信号的延迟时间并内插延迟的时钟 信号，以及输出延迟了指定相位差的延迟时钟信号的选择电路。

    Frequency multiplier
    3.
    发明授权
    Frequency multiplier 有权
    倍频器

    公开(公告)号：US07830184B2

    公开(公告)日：2010-11-09

    申请号：US11659023

    申请日：2005-07-27

    申请人： Chul-Woo Kim ,  Jin-Han Kim ,  Seok-Ryung Yoon ,  Young-Ho Kwak ,  Seok-Soo Yoon

    发明人： Chul-Woo Kim ,  Jin-Han Kim ,  Seok-Ryung Yoon ,  Young-Ho Kwak ,  Seok-Soo Yoon

    IPC分类号： H03B19/00

    CPC分类号： G06F7/68

    摘要： A frequency multiplier is disclosed. A plurality of voltage regulators each regulate levels of voltages at first and second common nodes in response to a corresponding one of input signals from a voltage-controlled delay line. An input buffer charges the first node or discharges the second node in response to a feedback signal. An output buffer regulates a level of a voltage at an output node and outputs a frequency-multiplied clock signal and the feedback signal corresponding to the voltage level of the output node. A discharge circuit discharges the first node before a rising edge of each of the input signals from the voltage-controlled delay line is inputted. A charge circuit charges the second node before the rising edge of each of the input signals from the voltage-controlled delay line is inputted.

    摘要翻译： 公开了一种倍频器。 多个电压调节器响应于来自电压控制延迟线的输入信号中的相应一个，调节第一和第二公共节点处的电压电平。 输入缓冲器对第一节点进行充电或响应于反馈信号对第二节点进行放电。 输出缓冲器调节输出节点处的电压电平，并输出倍频时钟信号和对应于输出节点电压电平的反馈信号。 在输入来自压控延迟线的每个输入信号的上升沿之前，放电电路对第一节点放电。 在输入来自压控延迟线的每个输入信号的上升沿之前，充电电路对第二节点充电。

    Frequency Multiplier
    4.
    发明申请
    Frequency Multiplier 有权
    频率乘数

    公开(公告)号：US20090189652A1

    公开(公告)日：2009-07-30

    申请号：US11659023

    申请日：2005-07-27

    申请人： Chul-Woo Kim ,  Jin-Han Kim ,  Seok-Ryung Yoon ,  Young-Ho Kwak ,  Seok-Soo Yoon

    发明人： Chul-Woo Kim ,  Jin-Han Kim ,  Seok-Ryung Yoon ,  Young-Ho Kwak ,  Seok-Soo Yoon

    IPC分类号： H03B19/00

    CPC分类号： G06F7/68

    摘要： A frequency multiplier is disclosed. A plurality of voltage regulators each regulate levels of voltages at first and second common nodes in response to a corresponding one of input signals from a voltage-controlled delay line. An input buffer charges the first node or discharges the second node in response to a feedback signal. An output buffer regulates a level of a voltage at an output node and outputs a frequency-multiplied clock signal and the feedback signal corresponding to the voltage level of the output node. A discharge circuit discharges the first node before a rising edge of each of the input signals from the voltage-controlled delay line is inputted. A charge circuit charges the second node before the rising edge of each of the input signals from the voltage-controlled delay line is inputted.

    摘要翻译： 公开了一种倍频器。 多个电压调节器响应于来自电压控制延迟线的输入信号中的相应一个，调节第一和第二公共节点处的电压电平。 输入缓冲器对第一节点进行充电或响应于反馈信号对第二节点进行放电。 输出缓冲器调节输出节点处的电压电平，并输出倍频时钟信号和对应于输出节点电压电平的反馈信号。 在输入来自压控延迟线的每个输入信号的上升沿之前，放电电路对第一节点放电。 在输入来自压控延迟线的每个输入信号的上升沿之前，充电电路对第二节点充电。

    Open-loop slew-rate controlled output driver
    6.
    发明授权
    Open-loop slew-rate controlled output driver 有权
    开环压摆率控制输出驱动器

    公开(公告)号：US07449936B2

    公开(公告)日：2008-11-11

    申请号：US11482684

    申请日：2006-07-06

    申请人： Dong-Suk Shin ,  In-Hwa Jung ,  Jin-Han Kim ,  Chulwoo Kim ,  Hyung-Dong Lee

    发明人： Dong-Suk Shin ,  In-Hwa Jung ,  Jin-Han Kim ,  Chulwoo Kim ,  Hyung-Dong Lee

    IPC分类号： H03K17/14

    CPC分类号： H03K19/00384 ,  H03K17/163 ,  H03K17/6872 ,  H03K2005/00123 ,  H03K2005/0013 ,  H03K2005/00143

    摘要： A slew-rate controlled output driver for use in a semiconductor device includes a PVT variation detection unit having a delay line for receiving a reference clock in order to detect a delay amount variation of the delay line determined according to process, voltage and temperature (PVT) variation; a selection signal generation unit for generating a driving selection signal which corresponds to a detection signal generated by the PVT variation detection unit; and an output driving unit having a plurality of driver units controlled by an output data and the driving selection signal for driving an output terminal with a driving strength which corresponds to the PVT variation.

    摘要翻译： 用于半导体器件的转换速率控制输出驱动器包括具有用于接收参考时钟的延迟线的PVT变化检测单元，以便检测根据处理，电压和温度（PVT）确定的延迟线的延迟量变化 ）变异 选择信号生成单元，用于产生对应于由PVT变化检测单元生成的检测信号的驱动选择信号; 以及输出驱动单元，其具有由输出数据控制的多个驱动器单元和用于以对应于PVT变化的驱动强度来驱动输出端子的驱动选择信号。

    Method and apparatus for heating porous preform
    7.
    发明申请
    Method and apparatus for heating porous preform 审中-公开
    多孔预成型件的加热方法和装置

    公开(公告)号：US20060112732A1

    公开(公告)日：2006-06-01

    申请号：US11222120

    申请日：2005-09-08

    申请人： Jae-Hoon Jin ,  Jin-Han Kim ,  Yeong-Seop Lee

    发明人： Jae-Hoon Jin ,  Jin-Han Kim ,  Yeong-Seop Lee

    IPC分类号： C03B37/012

    CPC分类号： C03B37/0146 ,  C03B37/01486

    摘要： A method for heating a porous preform according to the present invention comprises the steps of accommodating the porous preform in a muffle tube, forming a high temperature zone on a portion of a moving path of the muffle tube, using a heater and moving the muffle tube along the moving path to pass through the high temperature zone.

    摘要翻译： 根据本发明的加热多孔预成型件的方法包括以下步骤：将多孔预成型件容纳在马弗管中，使用加热器在马弗管的移动路径的一部分上形成高温区，并移动马弗管 沿着移动路径通过高温区。

    Terminal adapter device capable of performing IEEE1394-to-Ethernet conversion
    8.
    发明申请
    Terminal adapter device capable of performing IEEE1394-to-Ethernet conversion 审中-公开
    能够执行IEEE1394以太网转换的终端适配器设备

    公开(公告)号：US20060062229A1

    公开(公告)日：2006-03-23

    申请号：US11202504

    申请日：2005-08-12

    申请人： Myung-Sop Lee ,  Gu-Young Kang ,  Jin-Han Kim ,  Yeong-Seop Lee

    发明人： Myung-Sop Lee ,  Gu-Young Kang ,  Jin-Han Kim ,  Yeong-Seop Lee

    IPC分类号： H04L12/28

    CPC分类号： F16L9/18 ,  F16L49/06

    摘要： Disclosed is a terminal adapter device to enable an IEEE1394-to-Ethernet conversion for processing by hardware data of an Ethernet standard that is inputted/outputted in a home network system based on an IEEE 1394. The terminal adapter device includes a 1394 unit to perform an IEEE 1394 connection with a home gateway unit, connected to a network such as a Wide Area Network (WAN), to process data of the network system, and with an external IEEE 1394 client, an Ethernet unit to perform an Ethernet connection with an external Ethernet client, an Ethernet/1394 conversion unit, connected to the 1394 unit and the Ethernet unit, to perform a protocol conversion, and a control unit to control the protocol conversion.

    摘要翻译： 公开了一种终端适配器装置，用于使IEEE1394至以太网转换能够通过基于IEEE 1394在家庭网络系统中输入/输出的以太网标准的硬件数据进行处理。终端适配器装置包括执行的1394单元 与家庭网关单元的IEEE 1394连接，连接到诸如广域网（WAN）的网络，以处理网络系统的数据，以及与外部IEEE 1394客户端的以太网单元，以执行与 外部以太网客户端，连接到1394单元和以太网单元的以太网/ 1394转换单元，执行协议转换，控制单元控制协议转换。

    Apparatus and method for measuring residual stress and photoelastic effect of optical fiber
    10.
    发明授权
    Apparatus and method for measuring residual stress and photoelastic effect of optical fiber 有权
    用于测量光纤的残余应力和光弹效应的装置和方法

    公开(公告)号：US06678433B2

    公开(公告)日：2004-01-13

    申请号：US09939877

    申请日：2001-08-27

    申请人： Jin-Han Kim ,  Sung-Koog Oh ,  Yong-Woo Park ,  Un-Chul Paek ,  Dug-Young Kim

    发明人： Jin-Han Kim ,  Sung-Koog Oh ,  Yong-Woo Park ,  Un-Chul Paek ,  Dug-Young Kim

    IPC分类号： G02B626

    CPC分类号： G01M11/088 ,  G01L1/242

    摘要： An apparatus and method for measuring residual stress and photoelastic effect of an optical fiber is disclosed. The apparatus includes a rotating light diffuser for providing temporally averaged uniform image by restraining spatial coherence of light emitted from a light source to be completely scattered, a collecting lens for aligning the light passed through the rotating light diffuser in an optical fiber, a linear birefringence device for linearly controlling the polarization state of the aligned light input from the collecting lens, a condenser for condensing the light passed through the linear birefringence device on a place where the optical fiber is located, a fixed polarizer for transforming the polarization state of the light passed through the optical fiber to the intensity distribution by allowing the light emitted from the linear birefringence device to transmit the optical fiber, an objective lens for obtaining a magnified optical fiber image having the intensity distribution of the light transmitted the optical fiber, and a unit for measuring transmittance variation given to the optical fiber depending on locations.

    摘要翻译： 公开了一种用于测量光纤的残余应力和光弹性效应的装置和方法。 该装置包括旋转光漫射器，用于通过抑制从光源发射的光完全散射的空间相干性来提供时间上均匀的图像，用于将通过旋转光扩散器的光对准在光纤中的聚光透镜，线性双折射 用于线性控制从收集透镜输入的对准光的偏振状态的装置，用于将通过线性双折射装置的光聚光在光纤所处的位置的聚光器，用于变换光的偏振状态的固定偏振器 通过允许从线性双折射装置发射的光透射光纤而使光纤通过光强分布，用于获得具有透射光纤的光的强度分布的放大光纤图像的物镜和单元 用于测量给予操作的透射率变化 取决于位置。