Method and apparatus for block-based image denoising
    1.
    发明授权
    Method and apparatus for block-based image denoising 有权
    基于块的图像去噪的方法和装置

    公开(公告)号:US08818126B2

    公开(公告)日:2014-08-26

    申请号:US12913909

    申请日:2010-10-28

    IPC分类号: G06K9/40 G06K9/36

    CPC分类号: G06T5/002 G06T2207/20021

    摘要: A block-based image denoising method includes determining similarities between a current block and reference blocks within a search range around the current block, from among certain-sized blocks divided from an input image; determining weights of the reference blocks with respect to the current block based on the similarities; and generating resultant blocks by denoising the current block with respect to every block of the input image based on the weights of the reference blocks.

    摘要翻译: 基于块的图像去噪方法包括:从当前块与当前块周围的搜索范围内的参考块之间确定与从输入图像分开的特定大小的块中的相似度; 基于相似度确定参考块相对于当前块的权重; 以及基于所述参考块的权重,通过对所述输入图像的每个块去除当前块来生成合成块。

    Method of etching semiconductor device and method of fabricating semiconductor device using the same
    5.
    发明申请
    Method of etching semiconductor device and method of fabricating semiconductor device using the same 审中-公开
    半导体器件的蚀刻方法及使用其制造半导体器件的方法

    公开(公告)号:US20080070417A1

    公开(公告)日:2008-03-20

    申请号:US11827450

    申请日:2007-07-12

    IPC分类号: H01L21/3065

    摘要: A method of fabricating a semiconductor device which prevents a pitting phenomenon from occurring on a gate insulating layer is provided. The method of fabricating of a semiconductor device according to the present invention comprises: depositing a first gate material including at least a gate insulating layer and a first metal layer in a first region on a semiconductor substrate; depositing a second gate material layer including at least a gate insulating layer and a polysilicon layer in a second region on the semiconductor substrate; forming a hard mask pattern on the first gate material layer and on the second gate material layer; and forming a first gate pattern and a second gate pattern by etching the first gate material layer and the second gate material layer, using the hard mask pattern as a mask, wherein the step of forming the first gate pattern and the second gate pattern comprises dry etching the first metal layer and the polysilicon layer simultaneously using a first etching gas composition including both CF4 and CH4, such that when the first metal layer is completely etched, a polysilicon layer of at least a predetermined minimum protective thickness remains covering the underlying gate insulating layer. The etch rate of the first metal layer to the etch rate of polysilicon can be relatively increased by the method of this invention, and, as a result, a gate pattern with high density can be effectively formed.

    摘要翻译: 提供一种制造半导体器件的方法,该方法防止在栅极绝缘层上发生点蚀现象。 根据本发明的制造半导体器件的方法包括:在半导体衬底上的第一区域中沉积包括至少栅极绝缘层和第一金属层的第一栅极材料; 在所述半导体衬底上的第二区域中沉积包括至少栅极绝缘层和多晶硅层的第二栅极材料层; 在第一栅极材料层和第二栅极材料层上形成硬掩模图案; 以及通过使用所述硬掩模图案作为掩模蚀刻所述第一栅极材料层和所述第二栅极材料层来形成第一栅极图案和第二栅极图案,其中形成所述第一栅极图案和所述第二栅极图案的步骤包括干燥 使用包括CF 4和CH 4 4的第一蚀刻气体组合物同时蚀刻第一金属层和多晶硅层,使得当第一金属层被完全蚀刻时, 至少预定的最小保护厚度的多晶硅层保持覆盖下面的栅极绝缘层。 通过本发明的方法,可以相对增加第一金属层对多晶硅的蚀刻速率的蚀刻速率,结果可以有效地形成高密度的栅极图案。

    Shower head of a wafer treatment apparatus having a gap controller
    6.
    发明申请
    Shower head of a wafer treatment apparatus having a gap controller 审中-公开
    具有间隙控制器的晶片处理装置的花洒头

    公开(公告)号:US20050145338A1

    公开(公告)日:2005-07-07

    申请号:US11057752

    申请日:2005-02-15

    摘要: A shower head for adjusting distribution of a reactant gas in a process region of a semiconductor manufacturing reaction chamber, wherein a top plate has a gas port for introducing the reactant gas into the reaction chamber; a face plate, having through holes, disposed opposite the process region; a first baffle plate, having through holes, disposed between the top plate and the face plate and capable of moving up or down, wherein the first baffle plate has a top surface that defines a first gap for forming a first lateral flow passage; a second baffle plate, having through holes, disposed between the first baffle plate and the face plate and capable of moving up or down, wherein the second baffle plate has a top surface that defines a second gap for forming a second lateral flow passage; and a gap controller for determining widths of the first and second gaps.

    摘要翻译: 一种用于调整半导体制造反应室的处理区域中的反应气体的分布的喷头,其中顶板具有用于将反应气体引入反应室的气体口; 具有与所述处理区域相对设置的通孔的面板; 第一挡板,具有设置在所述顶板和所述面板之间并且能够上下移动的通孔,其中所述第一挡板具有限定用于形成第一侧流通道的第一间隙的顶表面; 第二挡板,具有设置在第一挡板和面板之间并且能够上下移动的通孔,其中第二挡板具有限定用于形成第二侧流通道的第二间隙的顶表面; 以及用于确定第一和第二间隙的宽度的间隙控制器。

    SEMICONDUCTOR DEVICE AND METHOD OF DOUBLE PHOTOLITHOGRAPHY PROCESS FOR FORMING PATTERNS OF THE SEMICONDUCTOR DEVICE
    7.
    发明申请
    SEMICONDUCTOR DEVICE AND METHOD OF DOUBLE PHOTOLITHOGRAPHY PROCESS FOR FORMING PATTERNS OF THE SEMICONDUCTOR DEVICE 有权
    用于形成半导体器件的图案的双光刻机工艺的半导体器件和方法

    公开(公告)号:US20120049377A1

    公开(公告)日:2012-03-01

    申请号:US12983478

    申请日:2011-01-03

    摘要: A semiconductor device and a method of forming patterns on a semiconductor device are disclosed. The semiconductor device may include high-density patterns with a minimum size that may be less the resolution limit of a photolithography process, and may have a substrate including a memory cell region and an adjacent connection region, a plurality of first conductive lines extending from the memory cell region to the connection region in a first direction, a plurality of second conductive lines connected from respective first conductive lines to a plurality of pads having a width equal to twice the width of each of the first conductive lines. The method may include two levels of spacer formation to provide sub resolution line widths and spaces as well as selected multiples of the minimum line widths and spaces.

    摘要翻译: 公开了一种在半导体器件上形成图案的半导体器件和方法。 半导体器件可以包括具有最小尺寸的高密度图案,其可以小于光刻工艺的分辨率极限,并且可以具有包括存储单元区域和相邻连接区域的基板,从第一导电线延伸的多个第一导电线 存储单元区域连接到第一方向上的连接区域;多个第二导线,其从相应的第一导线连接到宽度等于每个第一导电线宽度的两倍的多个焊盘。 该方法可以包括两个级别的间隔物形成以提供子分辨率线宽度和空间以及最小线宽和空间的选定倍数。

    Module-type fuel cell system
    9.
    发明授权
    Module-type fuel cell system 有权
    模块式燃料电池系统

    公开(公告)号:US07846609B2

    公开(公告)日:2010-12-07

    申请号:US11946491

    申请日:2007-11-28

    IPC分类号: H01M8/02 H01M8/04

    摘要: A module-type fuel cell system including a power module includes a generator installed inside and a power housing having a plurality of connection holes formed sideward, wherein the generator generates electricity through an oxidation-reduction reaction of an oxidizing agent with a hydrogen-containing fuel; a fuel supply module including a fuel supply unit installed inside and a power housing having a plurality of connection holes formed sideward, wherein the fuel supply unit supplies a hydrogen-containing fuel to the generator; an oxidizing agent supply module including an oxidizing agent supply unit installed inside and an oxidizing agent supply housing having connection holes formed sideward, wherein the oxidizing agent supply unit supplies an oxidizing agent to the generator; and a recovery module including a storage space formed therein and a recovery housing having a plurality of connection holes formed sideward, wherein the storage space recovers an unreacted fuel generated in the generator, wherein the power module is closely attached and assembled in one side of the recovery module in a surface-to-surface contact manner, and the fuel supply module and the oxidizing agent supply module are closely attached and assembled in the other side of the recovery module in a surface-to-surface contact manner.

    摘要翻译: 包括功率模块的模块型燃料电池系统包括安装在内部的发电机和具有侧面形成的多个连接孔的动力壳体,其中发电机通过氧化剂与含氢燃料的氧化还原反应发电 ; 燃料供给模块,其包括安装在内部的燃料供给单元和具有侧面形成的多个连接孔的动力壳体,其中,所述燃料供给单元向所述发电机供给含氢燃料; 包括安装在内部的氧化剂供给单元和具有侧面形成有连接孔的氧化剂供给壳体的氧化剂供给模块,其中,所述氧化剂供给单元向所述发电机供给氧化剂; 以及回收模块,其包括形成在其中的存储空间和具有多个侧面形成的连接孔的回收壳体,其中所述存储空间回收在所述发电机中产生的未反应燃料,其中所述功率模块紧密地附接和组装在所述发电机的一侧 回收模块以面对面接触方式,并且燃料供给模块和氧化剂供应模块以面对面的接触方式紧密地附接和组装在恢复模块的另一侧。

    Semiconductor device having integral structure of contact pad and conductive line
    10.
    发明申请
    Semiconductor device having integral structure of contact pad and conductive line 有权
    具有接触焊盘和导线整体结构的半导体器件

    公开(公告)号:US20100244269A1

    公开(公告)日:2010-09-30

    申请号:US12590802

    申请日:2009-11-13

    申请人: Dong-hyun Kim

    发明人: Dong-hyun Kim

    IPC分类号: H01L23/485

    摘要: Provided are a semiconductor device and a method of forming a semiconductor device in which a plurality of patterns are simultaneously formed to have different widths and the pattern densities of some regions are increased using a double patterning. The semiconductor device includes a plurality of conductive lines each including a first line portion and a second line portion, where the first line portion extends on a substrate in a first direction, the second line portion extends from one end of the first line portion in a second direction different from the first direction; a plurality of contact pads each of which is connected with a respective conductive line of the plurality of conductive lines and a respective second line portion of a respective conductive line of the plurality of conductive lines; and a plurality of dummy conductive lines each including a first dummy portion extending from a respective contact pad of the plurality of contact pads, in parallel with the corresponding second line portion in the second direction.

    摘要翻译: 提供半导体器件和形成半导体器件的方法,其中多个图案同时形成为具有不同的宽度,并且使用双重图案化来增加一些区域的图案密度。 半导体器件包括多个导线,每条导线包括第一线部分和第二线部分,其中第一线部分在第一方向上在衬底上延伸,第二线部分从第一线部分的一端延伸到 第二方向与第一方向不同; 多个接触焊盘,其各自与所述多根导电线中的相应导电线连接,并且所述多条导线的相应导电线的相应的第二线部分; 以及多个虚设导电线,每个虚设导电线包括从所述多个接触焊盘的相应的接触焊盘延伸的第一虚设部分,与所述第二方向上的对应的第二线部分平行。