公开(公告)号：US20100277882A1

公开(公告)日：2010-11-04

申请号：US12503680

申请日：2009-07-15

申请人： CHIA-NAN PAI ,  HAN-LONG CHEN ,  NING LI ,  SHOU-KUO HSU

发明人： CHIA-NAN PAI ,  HAN-LONG CHEN ,  NING LI ,  SHOU-KUO HSU

IPC分类号： H05K1/18 ,  H05K3/30

CPC分类号： H05K1/0239 ,  H05K1/0245 ,  H05K1/0295 ,  H05K1/113 ,  H05K3/429 ,  H05K2201/044 ,  H05K2201/09254 ,  H05K2201/10015 ,  H05K2201/10545 ,  H05K2201/10636 ,  Y02P70/611 ,  Y10T29/4913

摘要： A motherboard layout method includes positioning two electronic elements on a top layer of a motherboard, and positioning another two electronic elements on a bottom layer of the motherboard, connecting one end of a first electronic element on the top layer to the same end of a first electronic element on the bottom layer with a first via hole, and connecting the same end of a second electronic element on the top layer to the same end of a second electronic element on the bottom layer with a second via hole. The method further includes connecting the other ends of the two electronic elements on the top layer to a first part, and connecting the other ends of the two electronic elements on the bottom layer to a second part.

摘要翻译： 主板布局方法包括将两个电子元件定位在主板的顶层上，并且将另外两个电子元件定位在母板的底层上，将顶层上的第一电子元件的一端连接到第一电子元件的同一端 电子元件在底层上具有第一通孔，并且通过第二通孔将顶层上的第二电子元件的同一端连接到底层上的第二电子元件的同一端。 该方法还包括将顶层上的两个电子元件的另一端连接到第一部分，并将底层上的两个电子元件的另一端连接到第二部分。

公开(公告)号：US20120017191A1

公开(公告)日：2012-01-19

申请号：US13085432

申请日：2011-04-12

申请人： HAN-LONG CHEN ,  SHI-PIAO LUO ,  CHENG-HSIEN LEE ,  CHIA-NAN PAI ,  SHOU-KUO HSU

发明人： HAN-LONG CHEN ,  SHI-PIAO LUO ,  CHENG-HSIEN LEE ,  CHIA-NAN PAI ,  SHOU-KUO HSU

IPC分类号： G06F17/50

CPC分类号： G06F17/5081

摘要： A computing device and a method involves selection of one or more transmission lines from a printed circuit board (PCB) layout file, reading a transmission line from the one or more selected transmission lines, and determining neighboring anti-pads of the read transmission line in the PCB layout file. The computing device and method further determine an actual distance between the read transmission line and a neighboring anti-pad. If the actual distance is less than a preset standard distance, the computing device and method determine that the read transmission line and the neighboring anti-pad do not satisfy design requirements, and highlight the read transmission line and the neighboring anti-pad, to prompt a user to amend design of the read transmission line and the neighboring anti-pad.

摘要翻译： 计算装置和方法包括从印刷电路板（PCB）布局文件中选择一条或多条传输线，从一条或多条所选传输线读取传输线，以及确定读传输线的相邻抗焊盘 PCB布局文件。 计算设备和方法进一步确定读取传输线与相邻反焊盘之间的实际距离。 如果实际距离小于预设的标准距离，则计算设备和方法确定读取传输线路和相邻的反焊盘不满足设计要求，并突出显示读取传输线路和相邻的反焊盘，以提示 用户修改读取传输线的设计和相邻的反焊盘。

公开(公告)号：US20110055796A1

公开(公告)日：2011-03-03

申请号：US12699839

申请日：2010-02-03

申请人： HAN-LONG CHEN ,  CHIA-NAN PAI ,  SHOU-KUO HSU

发明人： HAN-LONG CHEN ,  CHIA-NAN PAI ,  SHOU-KUO HSU

IPC分类号： G06F17/50

CPC分类号： G06F17/5068

摘要： A system and method for removing T-point elements with unused stubs from a printed circuit board (PCB) layout design obtains each signal line including one or more T-point elements in the PCB layout design, divides the obtained signal line into a plurality of lines according to the one or more T-point elements with unused stubs, and obtains properties of each of the plurality of lines. The system and method further deletes the original layout of the signal line and reconnects the plurality of lines according to the properties of each of the plurality of lines to generate a reconnected signal line, and outputs the reconnected signal line on a display device.

摘要翻译： 用于从印刷电路板（PCB）布局设计中去除具有未使用的短截线的T点元件的系统和方法获得在PCB布局设计中包括一个或多个T点元件的每条信号线，将获得的信号线分成多个 根据具有未使用短截线的一个或多个T点元素的线，并且获得多条线中的每一条的属性。 该系统和方法进一步删除信号线的原始布局，并根据多条线中的每条线路的属性重新连接多条线路，以产生重新连接的信号线，并将重新连接的信号线输出到显示设备上。

公开(公告)号：US20130254729A1

公开(公告)日：2013-09-26

申请号：US13585855

申请日：2012-08-15

申请人： YA-LING HUANG ,  CHIA-NAN PAI ,  SHOU-KUO HSU

发明人： YA-LING HUANG ,  CHIA-NAN PAI ,  SHOU-KUO HSU

IPC分类号： G06F17/50

CPC分类号： G06F17/5081 ,  G06F2217/82

摘要： A device and a method reads a circuit printed circuit (PCB) layout file, extracts arrangement information of all the interference source components and signal transmission lines of the PCB layout file, and selects a interference source component from the PCB layout file, then determines if there is any signal transmission line is laid under the selected interference source component.

摘要翻译： 一种设备和方法读取电路印刷电路（PCB）布局文件，提取PCB布局文件的所有干扰源组件和信号传输线的布置信息，并从PCB布局文件中选择干扰源组件，然后确定是否 在所选择的干扰源组件下面有任何信号传输线。

公开(公告)号：US20130158925A1

公开(公告)日：2013-06-20

申请号：US13585856

申请日：2012-08-15

申请人： YA-LING HUANG ,  CHIA-NAN PAI ,  SHOU-KUO HSU

发明人： YA-LING HUANG ,  CHIA-NAN PAI ,  SHOU-KUO HSU

IPC分类号： G06F19/00 ,  G01N37/00

CPC分类号： G06F17/5081

摘要： A computer-based method and a computing device for checking differential pairs of a printed circuit board layout are provided. The computing device determines the via pitch between switching vias of a differential pair according to the coordinates of the centers of the switching vias, determines the via gap between the switching vias of adjacent two differential pairs according to the radius and the coordinates of the centers of the switching vias, and determines that the switching vias does not satisfy design standards if the via pitch does not fall in an input via pitch range, or the via gap does not fall in an input via gap range.

摘要翻译： 提供了一种用于检查印刷电路板布局的差分对的基于计算机的方法和计算装置。 计算装置根据切换通孔的中心坐标来确定差分对的切换通孔之间的经过间距，根据半径的中心确定相邻两个差分对的切换通孔之间的通孔间隙 并且如果通孔间距没有通过间距范围落入输入，或者通孔间隙不通过间隙范围落入输入，则确定开关通孔不满足设计标准。

公开(公告)号：US20120273254A1

公开(公告)日：2012-11-01

申请号：US13217626

申请日：2011-08-25

申请人： HUA-LI ZHOU ,  CHIA-NAN PAI ,  SHOU-KUO HSU

发明人： HUA-LI ZHOU ,  CHIA-NAN PAI ,  SHOU-KUO HSU

IPC分类号： H01B5/00

CPC分类号： H05K1/111 ,  H05K1/0242 ,  H05K1/025 ,  H05K2201/09736 ,  Y02P70/611

摘要： A pad includes a first mating section and a second mating section. The first mating section includes a first horizontal plane and a first inclined plane. The second mating section includes a second horizontal plane and a second inclined plane. The first mating section is a copper foil capable of being connected to a wire. The second mating section is made of insulating material. The first inclined plane and the second inclined plane are bonded together.

摘要翻译： 垫包括第一配合部分和第二配合部分。 第一配合部分包括第一水平面和第一倾斜平面。 第二配合部分包括第二水平面和第二倾斜平面。 第一配合部分是能够连接到电线的铜箔。 第二配合部分由绝缘材料制成。 第一倾斜平面和第二倾斜平面结合在一起。

公开(公告)号：US20120268283A1

公开(公告)日：2012-10-25

申请号：US13167719

申请日：2011-06-24

申请人： SHOU-KUO HSU ,  YUNG-CHIEH CHEN ,  HSIEN-CHUAN LIANG ,  SHEN-CHUN LI ,  WEN-LAING TSENG ,  CHIA-NAN PAI

发明人： SHOU-KUO HSU ,  YUNG-CHIEH CHEN ,  HSIEN-CHUAN LIANG ,  SHEN-CHUN LI ,  WEN-LAING TSENG ,  CHIA-NAN PAI

IPC分类号： G08B21/00 ,  G01R17/02

CPC分类号： H05K1/0201 ,  G01R31/043 ,  H05K1/0263 ,  H05K1/029 ,  H05K2201/0979 ,  H05K2201/10212

摘要： A circuit board includes a current balancing unit that receives a number of current values from ammeters. A minimum current value between the current values is determined by the current balancing unit. Resistance of one or more variable resistors of the current balancing unit is adjusted by the current balancing unit to make the current value from one or more the ammeters serially connected to the one or more the variable resistors to be substantially equal to the minimum current value.

摘要翻译： 电路板包括从电流表接收多个电流值的电流平衡单元。 当前值之间的最小电流值由电流平衡单元确定。 通过电流平衡单元调整电流平衡单元的一个或多个可变电阻器的电阻，使来自一个或多个串联连接到一个或多个可变电阻器的电流器的电流值基本上等于最小电流值。

公开(公告)号：US20130048352A1

公开(公告)日：2013-02-28

申请号：US13335996

申请日：2011-12-23

申请人： HUA-LI ZHOU ,  CHIA-NAN PAI ,  SHOU-KUO HSU

发明人： HUA-LI ZHOU ,  CHIA-NAN PAI ,  SHOU-KUO HSU

IPC分类号： H05K1/09

CPC分类号： H05K1/0253

摘要： A printed circuit board includes a signal layer and a reference layer. The signal layer is covered with copper foil. A circuit topology for multiple loads is set on the signal layer. The circuit topology includes a driving terminal, a first signal receiving terminal, and a second signal receiving terminal. The driving terminal is connected to a node through a first transmission line. The node is connected to the first and second signal receiving terminals respectively through a second and a third transmission lines. A difference between lengths of the second and third transmission lines is greater than a product of a transmission speed and a rise time of signals from the driving terminal. The reference layer is covered with copper foil, and arranged under the signal layer. A region without copper foil is formed on the reference layer, under the second transmission line.

摘要翻译： 印刷电路板包括信号层和参考层。 信号层被铜箔覆盖。 在信号层上设置多个负载的电路拓扑。 电路拓扑包括驱动端子，第一信号接收端子和第二信号接收端子。 驱动端子通过第一传输线连接到节点。 节点分别通过第二和第三传输线连接到第一和第二信号接收终端。 第二和第三传输线的长度之差大于来自驱动终端的信号的传输速度和上升时间的乘积。 参考层用铜箔覆盖，并布置在信号层下面。 在第二传输线下方，在参考层上形成没有铜箔的区域。

公开(公告)号：US20120331434A1

公开(公告)日：2012-12-27

申请号：US13483059

申请日：2012-05-30

申请人： YA-LING HUANG ,  CHIA-NAN PAI ,  SHOU-KUO HSU

发明人： YA-LING HUANG ,  CHIA-NAN PAI ,  SHOU-KUO HSU

IPC分类号： G06F17/50

CPC分类号： G06F17/5081 ,  H05K1/0296 ,  H05K3/0005 ,  H05K2201/09236

摘要： A computing device and a method reads design standards of signal transmission lines in a printed circuit board (PCB) layout file, and determines a minimum reference length of line segments of the signal transmission lines from the design standards. The device and method then selects a signal transmission line from a circuit board, and computes an actual length of each line segment of the selected signal transmission line. If each actual length is more than or equal to the minimum reference length, the device and method determines length design of the selected signal transmission line satisfies the design standards. Otherwise, if any actual length is less than the minimum reference length, the device and method determines the length design of the signal transmission line does not satisfy the design standards.

摘要翻译： 计算装置和方法读取印刷电路板（PCB）布局文件中的信号传输线的设计标准，并从设计标准确定信号传输线的线段的最小参考长度。 然后，该装置和方法从电路板选择信号传输线，并计算所选信号传输线的每个线段的实际长度。 如果每个实际长度大于或等于最小参考长度，则设备和方法确定所选信号传输线的长度设计满足设计标准。 否则，如果实际长度小于最小参考长度，则设备和方法确定信号传输线的长度设计不符合设计标准。

公开(公告)号：US20120185819A1

公开(公告)日：2012-07-19

申请号：US13244625

申请日：2011-09-25

申请人： ZHENG SHAN ,  SHI-PIAO LUO ,  CHIA-NAN PAI ,  SHOU-KUO HSU

发明人： ZHENG SHAN ,  SHI-PIAO LUO ,  CHIA-NAN PAI ,  SHOU-KUO HSU

IPC分类号： G06F17/50

CPC分类号： G06F17/5077

摘要： In a method for verifying a printed circuit board (PCB) layout using a computing device, a PCB simulation file is obtained from a storage device of the computing device, and a PCB image is displayed on a display device according to the PCB simulation file. The PCB image includes multiple signal lines and switching voltage regulator nodes (SVRN). A SVRN to be checked is selected from the PCB image, and all signal lines around the SVRN are searched. The method calculates a layout distance between the selected SVRN and each of the searched signal lines, and generates a graphical window interface to position a signal line whose layout distance is equal to or less than the minimum distance. The method further modifies the layout of the positioned signal line to satisfy a layout design specification by increasing the layout distance to the minimum distance.

摘要翻译： 在使用计算装置验证印刷电路板（PCB）布局的方法中，从计算装置的存储装置获得PCB模拟文件，并且根据PCB仿真文件在显示装置上显示PCB图像。 PCB图像包括多个信号线和开关电压调节器节点（SVRN）。 从PCB图像中选择要检查的SVRN，并搜索SVRN周围的所有信号线。 该方法计算所选择的SVRN与所搜索的信号线之间的布局距离，并且生成图形窗口界面以定位其布局距离等于或小于最小距离的信号线。 该方法通过将布局距离增加到最小距离来进一步修改定位信号线的布局以满足布局设计规范。