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公开(公告)号:US11569375B2
公开(公告)日:2023-01-31
申请号:US16851378
申请日:2020-04-17
Applicant: HRL Laboratories, LLC
Inventor: Biqin Huang
IPC: H01L29/66 , H01L29/78 , H01L29/167 , H01L29/16
Abstract: A vertical field-effect transistor (FET), comprising a first doped region of a first material, said first doped region having a first doping and being formed on a surface of a substrate, a second doped region of said first material, said second doped region having a second doping and being formed on the first doped region, and a third doped region of said first material, said third doped region having a third doping and being formed on the second doped region, wherein the first doped region has a first width along a first direction parallel to said surface of the substrate, the second doped region has a second width along said first direction, the third doped region has a third width along said first direction, the second width being smaller than the first and third widths.
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公开(公告)号:US11978789B2
公开(公告)日:2024-05-07
申请号:US17061459
申请日:2020-10-01
Applicant: HRL Laboratories, LLC
Inventor: Biqin Huang
IPC: H01L21/761 , H01L29/06 , H01L29/08 , H01L29/10 , H01L29/16 , H01L29/165 , H01L29/167 , H01L29/66 , H01L29/772 , H01L29/812 , H01L29/78
CPC classification number: H01L29/7722 , H01L21/761 , H01L29/0646 , H01L29/0657 , H01L29/0843 , H01L29/1029 , H01L29/16 , H01L29/1602 , H01L29/1608 , H01L29/165 , H01L29/167 , H01L29/66045 , H01L29/66068 , H01L29/812 , H01L29/0673 , H01L29/785
Abstract: Presented is a lateral fin static induction transistor including a semi conductive substrate, source and drain regions extending from an optional buffer layer of same or varied thickness supported by the semi conductive substrate, a semi conductive channel electrically coupling the source region to the drain region of the transistor, a portion of the semi conductive channel being a fin and having a face covered by a gated structure, thereby defining a gated channel within the semi conductive channel, the semi conductive channel further including a drift region electrically coupling the gated channel to the drain region of the transistor.
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公开(公告)号:US20190235163A1
公开(公告)日:2019-08-01
申请号:US16185855
申请日:2018-11-09
Applicant: HRL LABORATORIES, LLC
Inventor: Pamela R. Patterson , Raymond Sarkissian , Biqin Huang , Keyvan R. Sayyah , Oleg M. Efimov
CPC classification number: G02B6/122 , G02B6/12004 , G02B6/1228 , G02B6/136 , G02B6/14 , G02B2006/12061 , G02F1/025
Abstract: A method of manufacturing an optical waveguide includes: aligning a silicon on insulator wafer and a target substrate, the target substrate including a benzocyclobutene layer; bonding a silicon layer of the silicon on insulator wafer with the benzocyclobutene layer of the target substrate by using heat and pressure; and removing the silicon on insulator wafer such that the silicon layer remains on the benzocyclobutene layer.
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公开(公告)号:US10367086B2
公开(公告)日:2019-07-30
申请号:US15896048
申请日:2018-02-13
Applicant: HRL Laboratories, LLC
Inventor: Biqin Huang
IPC: H01L29/772 , H01L29/16 , H01L29/66 , H01L29/10 , H01L29/167 , H01L29/06 , H01L21/761 , H01L29/165 , H01L29/08 , H01L29/812 , H01L29/78
Abstract: Presented is a lateral fin static induction transistor including a semi conductive substrate, source and drain regions extending from an optional buffer layer of same or varied thickness supported by the semi conductive substrate, a semi conductive channel electrically coupling the source region to the drain region of the transistor, a portion of the semi conductive channel being a fin and having a face covered by a gated structure, thereby defining a gated channel within the semi conductive channel, the semi conductive channel further including a drift region electrically coupling the gated channel to the drain region of the transistor.
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公开(公告)号:US11150313B1
公开(公告)日:2021-10-19
申请号:US16399651
申请日:2019-04-30
Applicant: HRL LABORATORIES, LLC
Inventor: Edward H. Chen , Matthew J. Pelliccione , David T. Chang , Raviv Perahia , Biqin Huang
IPC: G01R33/26
Abstract: A sensing array includes a plurality of pixels, one pixel of which includes: a sensor, the sensor including a first electrode, a second electrode, and an atomic defect site configured to be excited by light of a first frequency; a light source below the sensor and configured to emit light of the first frequency toward the defect site; and a radio frequency (RF) source below the sensor and configured to provide a first voltage to the first electrode, a second voltage to the second electrode, and an RF signal to the sensor, wherein the sensor is configured to sense a magnitude of a physical parameter by generating a photocurrent corresponding to a magnitude of a physical parameter and a differential between the first and second voltages, when excited by the light of the first frequency and affected by the RF signal.
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公开(公告)号:US10901054B1
公开(公告)日:2021-01-26
申请号:US16399649
申请日:2019-04-30
Applicant: HRL LABORATORIES, LLC
Inventor: Edward H. Chen , Matthew J. Pelliccione , David T. Chang , Raviv Perahia , Biqin Huang
IPC: G01R33/345 , G01R33/36 , G01R33/26
Abstract: An atomic defect sensor for measuring a magnitude of a physical parameter comprises an optical waveguide comprising an atomic defect site located within the optical waveguide, the optical waveguide being configured to guide an optical signal toward the atomic defect site, a first doped fin integrated with the optical waveguide at a first side of the optical waveguide, and a second doped fin integrated with the optical waveguide at a second side of the optical waveguide, wherein the atomic defect site is configured to be energetically stimulated by the optical signal in the presence of an RF signal, and to generate a photocurrent corresponding to the magnitude of the physical parameter and a voltage differential between the first and second doped fins.
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公开(公告)号:US09953796B2
公开(公告)日:2018-04-24
申请号:US15098108
申请日:2016-04-13
Applicant: HRL Laboratories, LLC
Inventor: Biqin Huang , Christopher S. Roper , Tahir Hussain
Abstract: A semiconductor power handling device, includes a cathode pillar, a gate surrounding the cathode pillar, and an anode spaced from the cathode by a nano-vacuum gap. An array of semiconductor power handling devices, each comprising a cathode pillar, a gate surrounding the cathode pillar, and an anode spaced from the cathode pillar by a nano-vacuum gap. The semiconductor power handling devices can be arranged as rows and columns and can be interconnected to meet the requirements of various applications. The array of power handling devices can be fabricated on a single substrate.
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公开(公告)号:US20240250160A1
公开(公告)日:2024-07-25
申请号:US18623766
申请日:2024-04-01
Applicant: HRL Laboratories, LLC
Inventor: Biqin Huang
IPC: H01L29/772 , H01L21/761 , H01L29/06 , H01L29/08 , H01L29/10 , H01L29/16 , H01L29/165 , H01L29/167 , H01L29/66 , H01L29/78 , H01L29/812
CPC classification number: H01L29/7722 , H01L21/761 , H01L29/0646 , H01L29/0657 , H01L29/0843 , H01L29/1029 , H01L29/16 , H01L29/1602 , H01L29/1608 , H01L29/165 , H01L29/167 , H01L29/66045 , H01L29/66068 , H01L29/812 , H01L29/0673 , H01L29/785
Abstract: Presented is a lateral fin static induction transistor including a semi conductive substrate, source and drain regions extending from an optional buffer layer of same or varied thickness supported by the semi conductive substrate, a semi conductive channel electrically coupling the source region to the drain region of the transistor, a portion of the semi conductive channel being a fin and having a face covered by a gated structure, thereby defining a gated channel within the semi conductive channel, the semi conductive channel further including a drift region electrically coupling the gated channel to the drain region of the transistor.
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公开(公告)号:US20210328052A1
公开(公告)日:2021-10-21
申请号:US16851378
申请日:2020-04-17
Applicant: HRL Laboratories, LLC
Inventor: Biqin Huang
IPC: H01L29/78 , H01L29/66 , H01L29/16 , H01L29/167
Abstract: A vertical field-effect transistor (FET), comprising a first doped region of a first material, said first doped region having a first doping and being formed on a surface of a substrate, a second doped region of said first material, said second doped region having a second doping and being formed on the first doped region, and a third doped region of said first material, said third doped region having a third doping and being formed on the second doped region, wherein the first doped region has a first width along a first direction parallel to said surface of the substrate, the second doped region has a second width along said first direction, the third doped region has a third width along said first direction, the second width being smaller than the first and third widths.
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公开(公告)号:US10892355B2
公开(公告)日:2021-01-12
申请号:US16281727
申请日:2019-02-21
Applicant: HRL Laboratories, LLC
Inventor: Biqin Huang
IPC: H01L29/772 , H01L29/16 , H01L29/66 , H01L29/10 , H01L29/812 , H01L29/167 , H01L29/06 , H01L21/761 , H01L29/165 , H01L29/08 , H01L29/78
Abstract: Presented is a lateral fin static induction transistor including a semi conductive substrate, source and drain regions extending from an optional buffer layer of same or varied thickness supported by the semi conductive substrate, a semi conductive channel electrically coupling the source region to the drain region of the transistor, a portion of the semi conductive channel being a fin and having a face covered by a gated structure, thereby defining a gated channel within the semi conductive channel, the semi conductive channel further including a drift region electrically coupling the gated channel to the drain region of the transistor.
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