公开(公告)号：US07598562B2

公开(公告)日：2009-10-06

申请号：US11769423

申请日：2007-06-27

申请人： Hajime Nagano ,  Takeo Furuhata

发明人： Hajime Nagano ,  Takeo Furuhata

IPC分类号： H01L21/8247

CPC分类号： H01L27/115 ,  H01L27/11521

摘要： A semiconductor device including a semiconductor substrate; an element isolation region having a trench filled with an insulating film defined on the semiconductor substrate; a memory cell transistor formed in an element forming region isolated by the element isolating regions of the semiconductor substrate; and the memory cell transistor includes a gate insulating film formed on a surface of the element forming region; a floating gate formed over the gate insulating film; an inter-gate insulating film formed integrally so as to cover the floating gate and the insulating film of the element isolation region and having high dielectric constant in a portion corresponding to the floating gate and low dielectric constant in a portion corresponding to the insulating film of the element isolation region; and a control gate stacked over the floating gate via the inter-gate insulating film.

摘要翻译： 一种半导体器件，包括半导体衬底; 元件隔离区域，其具有填充有限定在所述半导体衬底上的绝缘膜的沟槽; 形成在由所述半导体衬底的元件隔离区隔离的元件形成区域中的存储单元晶体管; 并且所述存储单元晶体管包括形成在所述元件形成区域的表面上的栅极绝缘膜; 形成在栅绝缘膜上的浮栅; 一体地形成栅绝缘膜，以覆盖浮动栅极和元件隔离区域的绝缘膜，并且在对应于浮栅的部分和低介电常数的部分中具有高介电常数，在与绝缘膜相对应的部分 元件隔离区; 以及通过栅极间绝缘膜堆叠在浮置栅极上的控制栅极。

公开(公告)号：US20070296016A1

公开(公告)日：2007-12-27

申请号：US11769423

申请日：2007-06-27

申请人： Hajime Nagano ,  Takeo Furuhata

发明人： Hajime Nagano ,  Takeo Furuhata

IPC分类号： H01L29/76 ,  H01L21/8234

CPC分类号： H01L27/115 ,  H01L27/11521

摘要： A semiconductor device including a semiconductor substrate; an element isolation region having a trench filled with an insulating film defined or the semiconductor substrate; a memory cell transistor formed in an element forming region isolated by the element isolating regions of the semiconductor substrate; and the memory cell transistor includes a gate insulating film formed on a surface of the element forming region; a floating gate formed over the gate insulating film; an inter-gate insulating film formed integrally so as to cover the floating gate and the insulating film of the element isolation region and having high dielectric constant in a portion corresponding to the floating gate and low dielectric constant in a portion corresponding to the insulating film of the element isolation region; and a control gate stacked over the floating gate via the inter-gate insulating film.

摘要翻译： 一种半导体器件，包括半导体衬底; 元件隔离区域，其具有填充有限定的绝缘膜的沟槽或半导体衬底; 形成在由所述半导体衬底的元件隔离区隔离的元件形成区域中的存储单元晶体管; 并且所述存储单元晶体管包括形成在所述元件形成区域的表面上的栅极绝缘膜; 形成在栅绝缘膜上的浮栅; 一体地形成栅绝缘膜，以覆盖元件隔离区域的浮栅和绝缘膜，并且在对应于浮栅的部分和低介电常数的部分中具有高介电常数 元件隔离区; 以及通过栅极间绝缘膜堆叠在浮置栅极上的控制栅极。

公开(公告)号：US20080121972A1

公开(公告)日：2008-05-29

申请号：US11769304

申请日：2007-06-27

申请人： Junichi Shiozawa ,  Takeo Furuhata ,  Akiko Sekihara

发明人： Junichi Shiozawa ,  Takeo Furuhata ,  Akiko Sekihara

IPC分类号： H01L29/788 ,  H01L21/336

CPC分类号： H01L29/42324 ,  H01L21/28273 ,  H01L27/115 ,  H01L27/11521 ,  H01L27/11524 ,  H01L29/513

摘要： A semiconductor device including a semiconductor substrate; a first gate insulating film formed on the semiconductor substrate; a first gate electrode layer formed on the first gate insulating film; an element isolation insulating film formed so as to isolate a plurality of the first gate electrode layers; a second gate insulating film layer formed so as to cover upper surfaces of the plurality of first gate electrode layers and the element isolation insulating films; and a second gate electrode layer formed on the second gate insulating film layer; and the second gate insulating film layer includes a NONON stacked film structure and a nitride film layer contacting the first gate electrode layer and constituting a lowermost layer of the NONON stack film structure is separated at a portion interposing the plurality of neighboring first gate electrode layers.

摘要翻译： 一种半导体器件，包括半导体衬底; 形成在所述半导体基板上的第一栅极绝缘膜; 形成在所述第一栅极绝缘膜上的第一栅极电极层; 形成为隔离多个第一栅极电极层的元件隔离绝缘膜; 形成为覆盖多个第一栅电极层和元件隔离绝缘膜的上表面的第二栅极绝缘膜层; 以及形成在所述第二栅极绝缘膜层上的第二栅极电极层; 并且第二栅极绝缘膜层包括NONON层叠膜结构和与第一栅极电极层接触并构成NONON叠层膜结构的最下层的氮化物膜层在插入多个相邻的第一栅极电极层的部分处被分离。

公开(公告)号：US06794713B2

公开(公告)日：2004-09-21

申请号：US10655022

申请日：2003-09-05

申请人： Ichiro Mizushima ,  Shigehiko Saida ,  Takeo Furuhata ,  Yoshitaka Tsunashima

发明人： Ichiro Mizushima ,  Shigehiko Saida ,  Takeo Furuhata ,  Yoshitaka Tsunashima

IPC分类号： H01L2976

CPC分类号： H01L29/66477 ,  H01L21/28052 ,  H01L29/41775 ,  H01L29/41783 ,  H01L29/456 ,  H01L29/665

摘要： SiGe or SiC films are selectively grown on source/drain regions, followed by selectively growing silicon. A monocrystalline film having a high dislocation density or a polycrystalline film can be grown in growing the silicon film by making the C or Ge concentration higher than a predetermined level. The silicon layer on each of the source/drain regions is not monocrystalline or, even if monocrystalline, has a high density of dislocation. Therefore, the silicon film formed thereon is in the form of a monocrystalline silicon film having a high dislocation density or a polycrystalline silicon film. It is possible to suppress an impurity diffusion to reach a deep region caused by channeling of ions generated in the doping step by means of an ion implantation.

摘要翻译： SiGe或SiC膜选择性地在源极/漏极区域上生长，随后选择性地生长硅。 通过使C或Ge浓度高于预定水平，可以在生长硅膜时生长具有高位错密度的单晶膜或多晶膜。 源极/漏极区域中的每一个上的硅层不是单晶的，即使单晶也具有高密度的位错。 因此，其上形成的硅膜是具有高位错密度的单晶硅膜或多晶硅膜的形式。 可以通过离子注入来抑制在掺杂步骤中产生的离子的沟道引起的深度区域的杂质扩散。

公开(公告)号：US20110298039A1

公开(公告)日：2011-12-08

申请号：US13207149

申请日：2011-08-10

申请人： Kazuhiro Matsuo ,  Masayuki Tanaka ,  Takeo Furuhata ,  Koji Nakahara

发明人： Kazuhiro Matsuo ,  Masayuki Tanaka ,  Takeo Furuhata ,  Koji Nakahara

IPC分类号： H01L29/792 ,  H01L29/78

CPC分类号： H01L29/792 ,  H01L27/115 ,  H01L27/11521 ,  H01L27/11568 ,  H01L29/513 ,  H01L29/7881

摘要： A nonvolatile semiconductor memory device includes a semiconductor substrate, a first insulation layer formed on the semiconductor substrate, a charge storage layer formed on the first insulation layer, a second insulation layer formed on the charge storage layer, and a control electrode formed on the second insulation layer. The second insulation layer includes a first silicon oxide film formed above the charge storage layer, a silicon nitride film formed on the first silicon oxide film, a metal oxide film formed on the silicon nitride film, and a nitride film formed on the metal oxide film. The metal oxide film has a relative permittivity of not less than 7.

摘要翻译： 非易失性半导体存储器件包括半导体衬底，形成在半导体衬底上的第一绝缘层，形成在第一绝缘层上的电荷存储层，形成在电荷存储层上的第二绝缘层和形成在第二绝缘层上的控制电极 绝缘层。 第二绝缘层包括在电荷存储层上形成的第一氧化硅膜，形成在第一氧化硅膜上的氮化硅膜，形成在氮化硅膜上的金属氧化物膜，以及形成在金属氧化物膜上的氮化物膜 。 金属氧化物膜的相对介电常数不小于7。

公开(公告)号：US07265020B2

公开(公告)日：2007-09-04

申请号：US11235210

申请日：2005-09-27

申请人： Takeo Furuhata ,  Takahito Nakajima

发明人： Takeo Furuhata ,  Takahito Nakajima

IPC分类号： H01L21/8242

CPC分类号： H01L27/10867 ,  H01L27/1087

摘要： A method of manufacturing a semiconductor device includes forming a trench in a semiconductor substrate, isotropically forming a trench surface insulating film on an inner surface of the trench, the trench surface insulating film including a deep part functioning as a capacitor insulating film, forming a surface layer side insulating film on the inner surface of the trench so that the surface layer side insulating film is continuously rendered thinner from the surface side of the substrate toward the deep side of the trench, and forming an electrode layer inside the surface layer side insulating film and the trench surface insulating film both formed on the inner surface of the trench.

摘要翻译： 一种制造半导体器件的方法包括在半导体衬底中形成沟槽，在沟槽的内表面上各向同性地形成沟槽表面绝缘膜，沟槽表面绝缘膜包括用作电容器绝缘膜的深部，形成表面 在沟槽的内表面上形成层侧绝缘膜，使得表面层侧绝缘膜从衬底的表面侧朝向沟槽的深侧连续变薄，并且在表面层侧绝缘膜内部形成电极层 并且沟槽表面绝缘膜都形成在沟槽的内表面上。

公开(公告)号：US20060097303A1

公开(公告)日：2006-05-11

申请号：US11312388

申请日：2005-12-21

申请人： Takeo Furuhata ,  Ichiro Mizushima ,  Akiko Sekihara ,  Motoya Kishida ,  Tsubasa Harada ,  Takashi Nakao

发明人： Takeo Furuhata ,  Ichiro Mizushima ,  Akiko Sekihara ,  Motoya Kishida ,  Tsubasa Harada ,  Takashi Nakao

IPC分类号： H01L29/94

CPC分类号： H01L21/76847 ,  H01L21/76864 ,  H01L27/10867 ,  H01L29/945

摘要： A semiconductor device comprises a semiconductor substrate; a trench formed in the semiconductor substrate or in a layer deposited on the semiconductor substrate; a first conductive layer deposited in the trench and having a recess in the top surface thereof; a buried layer which buries the recess of the first conductive layer and which is made of a material having a melting point lower than that of the first conductive layer; and a second conductive layer formed on the buried layer inside the trench and electrically connected to the first conductive layer.

公开(公告)号：US06898551B2

公开(公告)日：2005-05-24

申请号：US10418275

申请日：2003-04-18

申请人： Shuichi Samata ,  Yukihiro Ushiku ,  Akihito Yamamoto ,  Takashi Nakao ,  Takeo Furuhata

发明人： Shuichi Samata ,  Yukihiro Ushiku ,  Akihito Yamamoto ,  Takashi Nakao ,  Takeo Furuhata

IPC分类号： F04B51/00 ,  F04B49/10 ,  G01H1/00 ,  G05B23/02 ,  G21C17/00 ,  G06F19/00

CPC分类号： G05B23/0229 ,  G01H1/003 ,  G05B23/0283

摘要： A system for predicting life of a rotary machine, includes a vibration gauge configured to measure time series data of a peak acceleration of the rotary machine; a band pass filter configured to filter an analog signal of the time series data of the peak acceleration measured by the vibration gauge in a frequency band including a first analysis frequency expressed as a product of an equation including a number of rotor blades of the rotary machine and a normal frequency unique to the rotary machine; and a data processing unit configured to predict a life span of the rotary machine by characteristics of the filtered analog data of the time series data of the peak acceleration with the first analysis frequency.

摘要翻译： 一种用于预测旋转机器寿命的系统，包括配置成测量旋转机器的峰值加速度的时间序列数据的振动计; 带通滤波器，被配置为滤波由振动计测量的峰值加速度的时间序列数据的模拟信号，所述频率带包括第一分析频率的频带，所述第一分析频率表示为包括旋转机器的多个转子叶片的等式的乘积 和旋转机器唯一的正常频率; 以及数据处理单元，其被配置为通过具有第一分析频率的峰值加速度的时间序列数据的经滤波的模拟数据的特性来预测旋转机器的寿命。

公开(公告)号：US20120234375A1

公开(公告)日：2012-09-20

申请号：US13508429

申请日：2010-04-08

申请人： Keisuke Nakamura ,  Hidetada Tokioka ,  Takeo Furuhata

发明人： Keisuke Nakamura ,  Hidetada Tokioka ,  Takeo Furuhata

IPC分类号： H01L31/05 ,  H01L31/18

CPC分类号： H01L31/035272 ,  H01L31/0463 ,  Y02E10/50

摘要： A thin film solar cell includes, on a substrate, a first electrode layer formed of a transparent conductive material, a photoelectric conversion layer, and a second electrode layer including a conductive material that reflects light. The thin film solar cell includes a plurality of unit solar battery cells divided by scribe lines. The second electrode layer and the first electrode layer of the unit solar battery cell adjacent to the second electrode layer are connected in the scribe line formed in the photoelectric conversion layer. The unit solar battery cells are electrically connected in series. The scribe lines on both sides of at least one of the unit solar battery cells are formed such that the unit solar battery cell held between the scribe lines meanders while having fixed width in a predetermined direction and have same shapes that overlap when the scribe lines translate in the predetermined direction.

摘要翻译： 薄膜太阳能电池在基板上包括由透明导电材料形成的第一电极层，光电转换层和包括反射光的导电材料的第二电极层。 薄膜太阳能电池包括由划线划分的多个单元太阳能电池单元。 与第二电极层相邻的单位太阳能电池单元的第二电极层和第一电极层连接在形成于光电转换层中的划线中。 单元太阳能电池单元串联电连接。 至少一个单位太阳能电池单元的两侧的划痕线形成为使得保持在划线之间的单位太阳能电池单元在预定方向上具有固定宽度的同时弯曲并且具有与划线翻译时重叠的相同形状 沿预定方向。

公开(公告)号：US20120138146A1

公开(公告)日：2012-06-07

申请号：US13379831

申请日：2010-04-23

申请人： Takeo Furuhata ,  Keisuke Nakamura

发明人： Takeo Furuhata ,  Keisuke Nakamura

IPC分类号： H01L31/0232 ,  H01L31/18

CPC分类号： H01L31/075 ,  H01L31/02366 ,  H01L31/035281 ,  H01L31/0392 ,  H01L31/0543 ,  H01L31/056 ,  Y02E10/52 ,  Y02E10/548

摘要： A thin-film solar battery is constructed such that it includes a translucent insulating substrate, a first transparent conductive film formed of a crystalline transparent conductive film on the translucent insulating substrate, with an uneven structure on a surface thereof, a second transparent conductive film formed of a transparent conductive film on the first transparent conductive film, with an uneven structure on a surface thereof, where the uneven structure is more gentle than the uneven structure of the first transparent conductive film, a power generation layer formed on the second transparent conductive film and having at least one crystalline layer to generate power, and a backside electrode layer formed of a light-reflective conductive film on the power generation layer. A substantially convex hollow portion projecting from the translucent insulating substrate is provided between adjacent convex portions in the uneven structure of the first transparent conductive film.

摘要翻译： 薄膜太阳能电池被构造成使得其包括半透明绝缘基板，在透光性绝缘基板上由结晶透明导电膜形成的第一透明导电膜，其表面上具有不均匀结构，形成第二透明导电膜 在第一透明导电膜上的透明导电膜，其表面上具有不均匀结构，其中不平坦结构比第一透明导电膜的不均匀结构更柔和，形成在第二透明导电膜上的发电层 并且具有至少一个结晶层以产生电力，以及在发电层上由反射光导膜形成的背面电极层。 在第一透明导电膜的不均匀结构中，在相邻的凸部之间设置从透光性绝缘基板突出的大致凸状的中空部。