公开(公告)号：US20170062470A1

公开(公告)日：2017-03-02

申请号：US15249090

申请日：2016-08-26

申请人： Hauk HAN ,  Je-Hyeon PARK ,  Kihyun YOON ,  Changwon LEE ,  HyunSeok LIM ,  Jooyeon HA

发明人： Hauk HAN ,  Je-Hyeon PARK ,  Kihyun YOON ,  Changwon LEE ,  HyunSeok LIM ,  Jooyeon HA

IPC分类号： H01L27/115 ,  H01L23/535

CPC分类号： H01L27/11582 ,  H01L21/76847 ,  H01L21/76856 ,  H01L21/76862 ,  H01L21/76876 ,  H01L21/76877 ,  H01L23/53266 ,  H01L23/535 ,  H01L27/11565 ,  H01L27/1157 ,  H01L27/11573 ,  H01L27/11575

摘要： A semiconductor device includes a lower structure including a lower conductor, an upper structure having an opening exposing the lower conductor on the lower structure, and a connection structure filling the opening and connected to the lower conductor. The connection structure includes a first tungsten layer covering an inner surface of the opening and defining a recess region in the opening, and a second tungsten layer filling the recess region on the first tungsten layer. A grain size of the second tungsten layer in an upper portion of the connection structure is greater than a grain size of the second tungsten layer in a lower portion of the connection structure.

摘要翻译： 半导体器件包括下结构，其包括下导体，具有露出下结构上的下导体的开口的上结构，以及填充该开口并连接到下导体的连接结构。 连接结构包括覆盖开口的内表面并且限定开口中的凹陷区域的第一钨层和填充第一钨层上的凹陷区域的第二钨层。 连接结构的上部的第二钨层的粒径大于连接结构的下部的第二钨层的粒径。

公开(公告)号：US20180122742A1

公开(公告)日：2018-05-03

申请号：US15581782

申请日：2017-04-28

申请人： Jooyeon HA ,  Jeonggil LEE ,  Dohyung KIM ,  Keun LEE ,  HyunSeok LIM ,  Hauk HAN

发明人： Jooyeon HA ,  Jeonggil LEE ,  Dohyung KIM ,  Keun LEE ,  HyunSeok LIM ,  Hauk HAN

IPC分类号： H01L23/535 ,  H01L27/1157 ,  H01L27/11582 ,  H01L23/532

CPC分类号： H01L23/535 ,  H01L23/53266 ,  H01L27/11565 ,  H01L27/11568 ,  H01L27/1157 ,  H01L27/11578 ,  H01L27/11582 ,  H01L29/7889 ,  H01L29/7926

摘要： A memory device includes a vertical string of nonvolatile memory cells on a substrate, along with a ground selection transistor extending between the vertical string of nonvolatile memory cells and the substrate. The ground selection transistor can have a current carrying terminal electrically coupled to a channel region of a nonvolatile memory cell in the vertical string of nonvolatile memory cells. The ground selection transistor includes a gate electrode associated with a ground selection line of the memory device. This gate electrode includes: (i) a mask pattern, (ii) a barrier metal layer of a first material extending opposite a sidewall of the mask pattern and (iii) a metal pattern of a second material different from the first material extending between at least a portion of the barrier metal layer and the mask pattern.

公开(公告)号：US20140332874A1

公开(公告)日：2014-11-13

申请号：US14338774

申请日：2014-07-23

申请人： Jeonggil LEE ,  Tai-Soo LIM ,  HyunSeok LIM ,  Kihyun YUN ,  Hauk HAN ,  Myoungbum LEE

发明人： Jeonggil LEE ,  Tai-Soo LIM ,  HyunSeok LIM ,  Kihyun YUN ,  Hauk HAN ,  Myoungbum LEE

IPC分类号： H01L29/788 ,  H01L29/51 ,  H01L29/49

CPC分类号： H01L29/788 ,  H01L27/11529 ,  H01L29/40114 ,  H01L29/42332 ,  H01L29/4925 ,  H01L29/4958 ,  H01L29/517 ,  H01L29/518 ,  H01L29/66825 ,  H01L29/66833 ,  H01L29/7881

摘要： A semiconductor device includes a substrate, a first poly-silicon pattern on the substrate, a metal pattern on the first poly-silicon pattern, and an interface layer between the first poly-silicon pattern and the metal pattern. The interface layer may include at least one selected from the group of a metal-silicon oxynitride layer, a metal-silicon oxide layer, and a metal-silicon nitride layer.

摘要翻译： 半导体器件包括衬底，衬底上的第一多晶硅图案，第一多晶硅图案上的金属图案，以及第一多晶硅图案和金属图案之间的界面层。 界面层可以包括选自金属 - 硅氧氮化物层，金属 - 氧化硅层和金属 - 氮化硅层中的至少一种。

公开(公告)号：US20130273727A1

公开(公告)日：2013-10-17

申请号：US13783590

申请日：2013-03-04

申请人： Jeonggil LEE ,  Tai-Soo LIM ,  HyunSeok LIM ,  Kihyun YUN ,  Hauk HAN ,  Myoungbum LEE

发明人： Jeonggil LEE ,  Tai-Soo LIM ,  HyunSeok LIM ,  Kihyun YUN ,  Hauk HAN ,  Myoungbum LEE

IPC分类号： H01L29/66

CPC分类号： H01L29/788 ,  H01L27/11529 ,  H01L29/40114 ,  H01L29/42332 ,  H01L29/4925 ,  H01L29/4958 ,  H01L29/517 ,  H01L29/518 ,  H01L29/66825 ,  H01L29/66833 ,  H01L29/7881

摘要： A semiconductor device includes a substrate, a first poly-silicon pattern on the substrate, a metal pattern on the first poly-silicon pattern, and an interface layer between the first poly-silicon pattern and the metal pattern. The interface layer may include at least one selected from the group of a metal-silicon oxynitride layer, a metal-silicon oxide layer, and a metal-silicon nitride layer.

摘要翻译： 半导体器件包括衬底，衬底上的第一多晶硅图案，第一多晶硅图案上的金属图案，以及第一多晶硅图案和金属图案之间的界面层。 界面层可以包括选自金属 - 硅氧氮化物层，金属 - 氧化硅层和金属 - 氮化硅层中的至少一种。

公开(公告)号：US20180090325A1

公开(公告)日：2018-03-29

申请号：US15601045

申请日：2017-05-22

申请人： Ki-hyun YOON ,  Hauk HAN ,  Yeon-sil SOHN ,  Seul-gi BAE ,  Hyun-seok LIM

发明人： Ki-hyun YOON ,  Hauk HAN ,  Yeon-sil SOHN ,  Seul-gi BAE ,  Hyun-seok LIM

IPC分类号： H01L21/28 ,  H01L29/40 ,  H01L29/66 ,  H01L27/11556 ,  H01L27/11582

CPC分类号： H01L21/76841 ,  H01L21/28088 ,  H01L21/8221 ,  H01L21/8239 ,  H01L23/485 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/53266 ,  H01L23/53271 ,  H01L27/1052 ,  H01L27/11551 ,  H01L27/11556 ,  H01L27/11568 ,  H01L27/11578 ,  H01L27/11582 ,  H01L29/401 ,  H01L29/66477 ,  H01L29/792 ,  H01L29/7926

摘要： A method of manufacturing a semiconductor device includes forming an insulating pattern layer on a substrate, conformally forming a first conductive layer with a first thickness on the insulating pattern layer, wet etching the first conductive layer to have a second thickness that is less than the first thickness, and forming a second conductive layer on the first conductive layer after wet etching the first conductive layer. The second conductive layer includes a material that is different from a material included in the first conductive layer.

公开(公告)号：US20150137259A1

公开(公告)日：2015-05-21

申请号：US14453705

申请日：2014-08-07

申请人： Hauk HAN ,  Yu Min KIM ,  Ki Hyun YOON ,  Myoung Bum LEE ,  Chang Won LEE ,  Joo Yeon HA

发明人： Hauk HAN ,  Yu Min KIM ,  Ki Hyun YOON ,  Myoung Bum LEE ,  Chang Won LEE ,  Joo Yeon HA

IPC分类号： H01L29/417 ,  H01L27/088 ,  H01L29/45

CPC分类号： H01L29/4175 ,  H01L21/76856 ,  H01L21/76879 ,  H01L23/5226 ,  H01L27/11556 ,  H01L27/11582 ,  H01L29/66825 ,  H01L29/66833 ,  H01L29/7889 ,  H01L29/7926 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device includes a substrate including a conductive region, an insulating layer disposed on the substrate and including an opening exposing the conductive region, and a conductive layer buried within the opening and including a first region disposed on inner side walls of the opening and a second region disposed within the first region. The first region includes a plurality of first crystal grains and the second region includes a plurality of second crystal grains. The pluralities of first and second crystal grains are separated from each other at a boundary formed between the first and second regions.

摘要翻译： 一种半导体器件包括：衬底，其包括导电区域，绝缘层设置在衬底上并且包括暴露导电区域的开口;以及导电层，其被埋在开口内，并且包括设置在开口的内侧壁上的第一区域和 第二区域设置在第一区域内。 第一区域包括多个第一晶粒，第二区域包括多个第二晶粒。 多个第一和第二晶粒在第一和第二区域之间形成的边界处彼此分离。