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    Methods for selective plasma etch
    1.
    发明授权
    Methods for selective plasma etch 失效
    选择性等离子体蚀刻方法

    公开(公告)号：US06090304A

    公开(公告)日：2000-07-18

    申请号：US919659

    申请日：1997-08-28

    申请人： Helen H. Zhu ,  George A. Mueller ,  Thomas D. Nguyen ,  Lumin Li

    发明人： Helen H. Zhu ,  George A. Mueller ,  Thomas D. Nguyen ,  Lumin Li

    IPC分类号： H01L21/302 ,  H01L21/3065 ,  H01L21/311 ,  C03C15/00

    CPC分类号： H01L21/31116

    摘要： Disclosed is a method for improving the selectivity of dielectric layers to photoresist layers and base layers. The method is performed in a plasma processing chamber, and the photoresist layer is coated over the dielectric layer. The method includes introducing an etchant source gas into the plasma processing chamber, which consists essentially of a CxFy gas and an N.sub.2 gas. The method further includes striking a plasma in the plasma processing chamber from the etchant source gas. The method additionally includes etching at least a portion of the dielectric layer with the plasma through to a base layer that underlies the dielectric layer. The method is also well suited for anisotropically etching an oxide layer with very high selectivities to Si, Si.sub.3 N.sub.4, TiN, and metal silicides.

    摘要翻译： 公开了一种提高介电层对光致抗蚀剂层和基层的选择性的方法。 该方法在等离子体处理室中进行，光致抗蚀剂层涂覆在电介质层上。 该方法包括将蚀刻剂源气体引入等离子体处理室中，其主要由C x F y气体和N 2气体组成。 该方法还包括从蚀刻剂源气体中冲击等离子体处理室中的等离子体。 该方法还包括用等离子体将介电层的至少一部分蚀刻到在电介质层下面的基底层。 该方法也非常适用于对Si，Si 3 N 4，TiN和金属硅化物具有非常高的选择性的各向异性蚀刻氧化物层。

    Method of plasma etching low-k dielectric materials
    3.
    发明授权
    Method of plasma etching low-k dielectric materials 有权
    等离子体蚀刻低k电介质材料的方法

    公开(公告)号：US07311852B2

    公开(公告)日：2007-12-25

    申请号：US09820695

    申请日：2001-03-30

    申请人： Si Yi Li ,  Helen H. Zhu ,  S. M. Reza Sadjadi ,  James V. Tietz ,  Bryan A. Helmer

    发明人： Si Yi Li ,  Helen H. Zhu ,  S. M. Reza Sadjadi ,  James V. Tietz ,  Bryan A. Helmer

    IPC分类号： H01L21/3065

    CPC分类号： H01L21/7681 ,  H01L21/31116 ,  H01L21/31138 ,  H01L21/76807

    摘要： A semiconductor manufacturing process wherein a low-k dielectric layer is plasma etched with selectivity to an overlying mask layer. The etchant gas can be oxygen-free and include a fluorocarbon reactant, a nitrogen reactant and an optional carrier gas, the fluorocarbon reactant and nitrogen reactant being supplied to a chamber of a plasma etch reactor at flow rates such that the fluorocarbon reactant flow rate is less than the nitrogen reactant flow rate. The etch rate of the low-k dielectric layer can be at least 5 times higher than that of a silicon dioxide, silicon nitride, silicon oxynitride or silicon carbide mask layer. The process is useful for etching 0.25 micron and smaller contact or via openings in forming structures such as damascene structures.

    摘要翻译： 一种半导体制造工艺，其中低k电介质层被等离子体蚀刻，对上覆掩模层具有选择性。 蚀刻剂气体可以是无氧的并且包括氟碳反应物，氮反应物和任选的载气，所述碳氟反应物和氮反应物以流速供给到等离子体蚀刻反应器的室，使得碳氟化合物反应物流速为 小于氮气反应物流量。 低k电介质层的蚀刻速率可以比二氧化硅，氮化硅，氮氧化硅或碳化硅掩模层的蚀刻速率高至少5倍。 该方法对于在形成结构如镶嵌结构中蚀刻0.25微米和较小的接触或通孔开口是有用的。

    Method of plasma etching silicon nitride
    4.
    发明授权
    Method of plasma etching silicon nitride 有权
    等离子体蚀刻氮化硅的方法

    公开(公告)号：US06962879B2

    公开(公告)日：2005-11-08

    申请号：US09820694

    申请日：2001-03-30

    申请人： Helen H. Zhu ,  David R. Pirkle ,  S. M. Reza Sadjadi ,  Andrew S. Li

    发明人： Helen H. Zhu ,  David R. Pirkle ,  S. M. Reza Sadjadi ,  Andrew S. Li

    IPC分类号： H01L21/311 ,  H01L21/768 ,  H01L21/302

    CPC分类号： H01L21/76811 ,  H01L21/31116 ,  H01L21/76807 ,  H01L21/7681 ,  H01L21/76813

    摘要： A semiconductor manufacturing process wherein silicon nitride is plasma etched with selectivity to an overlying and/or underlying dielectric layer such as a silicon oxide or low-k material. The etchant gas includes a fluorocarbon reactant and an oxygen reactant, the ratio of the flow rate of the oxygen reactant to that of the fluorocarbon reactant being no greater than 1.5. The etch rate of the silicon nitride can be at least 5 times higher than that of the oxide. Using a combination of CH3F and O2 with optional carrier gasses such as Ar and/or N2, it is possible to obtain nitride:oxide etch rate selectivities of over 40:1. The process is useful for simultaneously removing silicon nitride in 0.25 micron and smaller contact or via openings and wide trenches in forming structures such as damascene and self-aligned structures.

    摘要翻译： 半导体制造工艺，其中氮化硅被等离子体蚀刻，对上覆和/或下层介电层（例如氧化硅或低k材料）具有选择性。 蚀刻剂气体包括氟碳反应物和氧反应物，氧反应物的流速与氟碳反应物的流速之比不大于1.5。 氮化硅的蚀刻速率可以比氧化物的蚀刻速度高5倍以上。 使用CH 3 3 F和O 2 2的组合与可选的载气如Ar和/或N 2 N组合，可以获得氮化物 ：氧化物蚀刻速率选择性超过40：1。 该方法对于同时去除0.25微米和更小的接触或通孔开口和宽沟槽中的氮化硅在形成结构如镶嵌和自对准结构中是有用的。

    Preventing damage to low-k materials during resist stripping
    5.
    发明授权
    Preventing damage to low-k materials during resist stripping 有权
    防止抗蚀剂剥离时对低k材料的损伤

    公开(公告)号：US07226852B1

    公开(公告)日：2007-06-05

    申请号：US10866382

    申请日：2004-06-10

    申请人： Siyi Li ,  Helen H. Zhu ,  Howard Dang ,  Thomas S. Choi ,  Peter Loewenhardt

    发明人： Siyi Li ,  Helen H. Zhu ,  Howard Dang ,  Thomas S. Choi ,  Peter Loewenhardt

    IPC分类号： H01L21/44

    CPC分类号： H01L21/76814 ,  H01L21/02063 ,  H01L21/3105 ,  H01L21/31138

    摘要： A method of forming a feature in a low-k dielectric layer is provided. A low-k dielectric layer is placed over a substrate. A patterned photoresist mask is placed over the low-k dielectric layer. At least one feature is etched into the low-k dielectric layer. A CO conditioning is preformed on the at least one feature after the at least one feature is etched. The patterned photoresist mask is stripped after the CO conditioning.

    摘要翻译： 提供了在低k电介质层中形成特征的方法。 将低k电介质层放置在衬底上。 将图案化的光致抗蚀剂掩模放置在低k电介质层上。 至少一个特征被蚀刻到低k电介质层中。 在蚀刻至少一个特征之后，在至少一个特征上进行CO调节。 在CO调节之后剥离图案化的光刻胶掩模。

    Plasma etching of semiconductors
    6.
    发明授权
    Plasma etching of semiconductors 失效
    半导体等离子体蚀刻

    公开(公告)号：US5626716A

    公开(公告)日：1997-05-06

    申请号：US537309

    申请日：1995-09-29

    申请人： William F. Bosch ,  Helen H. Zhu ,  Syed A. Haider

    发明人： William F. Bosch ,  Helen H. Zhu ,  Syed A. Haider

    IPC分类号： H01L21/311 ,  H01L21/302

    CPC分类号： H01L21/31116

    摘要： A dry etching process for use in the manufacture of silicon integrated circuit devices uses a mixture of about eight parts neon to one part CHF.sub.3 (Freon 23) to form the etching plasma. The process etches doped oxides of silicon, such as BPSG and BPTEOS, in preference to undoped oxides of silicon, silicon nitride, silicides and silicon.

    摘要翻译： 用于制造硅集成电路器件的干蚀刻工艺使用大约八分之一氖与一部分CHF 3（氟利昂23）的混合物来形成蚀刻等离子体。 该工艺优先考虑硅，氮化硅，硅化物和硅的未掺杂氧化物掺杂掺杂的硅氧化物，如BPSG和BPTEOS。

    ORGANIC ARC ETCH SELECTIVE FOR IMMERSION PHOTORESIST
    7.
    发明申请
    ORGANIC ARC ETCH SELECTIVE FOR IMMERSION PHOTORESIST 审中-公开
    有机电弧选择用于浸没光电子

    公开(公告)号：US20090311871A1

    公开(公告)日：2009-12-17

    申请号：US12139124

    申请日：2008-06-13

    申请人： Helen H. Zhu ,  Peter Cirigliano ,  S. M. Reza Sadjadi

    发明人： Helen H. Zhu ,  Peter Cirigliano ,  S. M. Reza Sadjadi

    IPC分类号： H01L21/302

    CPC分类号： H01L21/31138 ,  H01L21/31144

    摘要： A method for forming etch features in an etch layer over a substrate and below an organic ARC layer, which is below an immersion lithography photoresist mask is provided. The substrate with the etch layer, organic ARC layer, and immersion lithography photoresist mask is placed into a processing chamber. The organic ARC layer is opened. The organic ARC layer opening comprises flowing an organic ARC open gas mixture into the processing chamber, wherein the organic ARC open gas mixture comprises an etchant gas and a polymerization gas comprising CO, forming an organic ARC open plasma from the organic ARC open gas mixture, etching the organic ARC layer with the organic ARC open plasma until the organic ARC layer is opened, and stopping the flow of organic ARC open gas mixture into the processing chamber before the etch layer is completely etched.

    摘要翻译： 提供了一种用于在衬底上方的蚀刻层中形成蚀刻特征的方法，并且在浸没式光刻光刻胶掩模下面的有机ARC层下面形成蚀刻特征。 将具有蚀刻层，有机ARC层和浸没光刻光刻胶掩模的基板放置在处理室中。 有机ARC层打开。 有机ARC层开口包括将有机ARC开放气体混合物流入处理室，其中有机ARC开放气体混合物包含蚀刻剂气体和包含CO的聚合气体，从有机ARC开放气体混合物形成有机ARC开放等离子体， 用有机ARC打开的等离子体蚀刻有机ARC层直到有机ARC层被打开，并且在刻蚀层被完全蚀刻之前停止有机ARC开放气体混合物流入处理室。

    Unique process chemistry for etching organic low-k materials
    10.
    发明授权
    Unique process chemistry for etching organic low-k materials 失效
    用于蚀刻有机低k材料的独特工艺化学

    公开(公告)号：US06841483B2

    公开(公告)日：2005-01-11

    申请号：US09782185

    申请日：2001-02-12

    申请人： Helen H. Zhu ,  James R. Bowers ,  Ian J. Morey ,  Wayne Babie ,  Michael Goss

    发明人： Helen H. Zhu ,  James R. Bowers ,  Ian J. Morey ,  Wayne Babie ,  Michael Goss

    IPC分类号： H01L21/311 ,  H01L21/302

    CPC分类号： H01L21/31138

    摘要： Method for etching a feature in an integrated circuit wafer with minimized effect of micromasking. The method introduces a flow of etchant gas including a fluorocarbon gas to the wafer, and uses the etchant gas to form a plasma in proximity with at least a portion of the wafer. The plasma is used to etch at least a portion of the feature in the wafer. Disassociation of the fluorocarbon into fluorine and hydrocarbon species performs two functions. The fluorine species prevents or significantly reduces sputtered hardmask components from depositing on the floor of the etched feature during etching. The hydrocarbon species acts to form a passivation layer on the sidewalls of the feature.

    摘要翻译： 用微蚀刻效应最小化在集成电路晶片中蚀刻特征的方法。 该方法将包括碳氟化合物气体的蚀刻剂气体流引入晶片，并且使用蚀刻剂气体在晶片的至少一部分附近形成等离子体。 等离子体用于蚀刻晶片中的特征的至少一部分。 将碳氟化合物分解成氟和烃类具有两个功能。 氟化物防止或显着减少溅射的硬掩模组分在蚀刻期间沉积在蚀刻特征的地板上。 烃类起到在特征的侧壁上形成钝化层的作用。