公开(公告)号：US09178071B2

公开(公告)日：2015-11-03

申请号：US13225703

申请日：2011-09-06

申请人： Hidekazu Miyairi ,  Koji Dairiki ,  Shunpei Yamazaki ,  Ryo Arasawa

发明人： Hidekazu Miyairi ,  Koji Dairiki ,  Shunpei Yamazaki ,  Ryo Arasawa

IPC分类号： H01L21/336 ,  H01L29/786 ,  H01L29/66

CPC分类号： H01L29/78678 ,  H01L29/66765 ,  H01L29/78606 ,  H01L29/78648 ,  H01L29/78669 ,  H01L29/78696

摘要： Provided is a method for manufacturing a semiconductor device with fewer masks and in a simple process. A gate electrode is formed. A gate insulating film, a semiconductor film, an impurity semiconductor film, and a conductive film are stacked in this order, covering the gate electrode. A source electrode and a drain electrode are formed by processing the conductive film. A source region, a drain region, and a semiconductor layer, an upper part of a portion of which does not overlap with the source region and the drain region is removed, are formed by processing the upper part of the semiconductor film, while the impurity semiconductor film is divided. A passivation film over the gate insulating film, the semiconductor layer, the source region, the drain region, the source electrode, and the drain electrode are formed. An etching mask is formed over the passivation film. At least the passivation film and the semiconductor layer are processed to have an island shape while an opening reaching the source electrode or the drain electrode is formed, with the use of the etching mask. The etching mask is removed. A pixel electrode is formed over the gate insulating film and the passivation film.

摘要翻译： 提供一种用于制造具有较少掩模的半导体器件的方法，并且在简单的过程中。 形成栅电极。 依次层叠栅绝缘膜，半导体膜，杂质半导体膜和导电膜，覆盖栅电极。 通过处理导电膜形成源电极和漏电极。 通过处理半导体膜的上部，形成源区域，漏极区域和半导体层，其部分的上部不与源极区域和漏极区域重叠，而杂质 半导体薄膜被划分。 形成栅极绝缘膜，半导体层，源极区域，漏极区域，源极电极和漏极电极之后的钝化膜。 在钝化膜上形成蚀刻掩模。 通过使用蚀刻掩模，至少钝化膜和半导体层被加工成具有岛状，同时形成到达源电极或漏电极的开口。 去除蚀刻掩模。 在栅极绝缘膜和钝化膜上形成像素电极。

公开(公告)号：US08232556B2

公开(公告)日：2012-07-31

申请号：US13099840

申请日：2011-05-03

申请人： Ryo Arasawa ,  Aya Miyazaki ,  Shigeharu Monoe ,  Shunpei Yamazaki

发明人： Ryo Arasawa ,  Aya Miyazaki ,  Shigeharu Monoe ,  Shunpei Yamazaki

IPC分类号： H01L27/14

CPC分类号： H01L27/1266 ,  H01L27/124 ,  H01L29/78603 ,  H01L29/78606

摘要： An object is to provide a semiconductor device in which damages of an element such as a transistor are reduced even when physical force such as bending is externally applied to generate stress in the semiconductor device. A semiconductor device includes a semiconductor film including a channel formation region and an impurity region, which is provided over a substrate, a first conductive film provided over the channel formation region with a gate insulating film interposed therebetween, a first interlayer insulating film provided to cover the first conductive film, a second conductive film provided over the first interlayer insulating film so as to overlap with at least part of the impurity region, a second interlayer insulating film provided over the second conductive film, and a third conductive film provided over the second interlayer insulating film so as to be electrically connected to the impurity region through an opening.

摘要翻译： 本发明的目的是提供一种半导体器件，其中即使当外部施加诸如弯曲的物理力在半导体器件中产生应力时，诸如晶体管的元件的损伤也减小。 半导体器件包括：设置在基板上的沟道形成区域和杂质区域的半导体膜，设置在沟道形成区域上的栅极绝缘膜之间的第一导电膜，设置成覆盖的第一层间绝缘膜 所述第一导电膜，设置在所述第一层间绝缘膜上以与所述杂质区的至少一部分重叠的第二导电膜，设置在所述第二导电膜上的第二层间绝缘膜，以及设置在所述第二导电膜上的第二导电膜 层间绝缘膜，以通过开口与杂质区电连接。

公开(公告)号：US08854286B2

公开(公告)日：2014-10-07

申请号：US12901023

申请日：2010-10-08

申请人： Shunpei Yamazaki ,  Ryo Arasawa ,  Jun Koyama ,  Masashi Tsubuku ,  Kosei Noda

发明人： Shunpei Yamazaki ,  Ryo Arasawa ,  Jun Koyama ,  Masashi Tsubuku ,  Kosei Noda

IPC分类号： G09G3/36 ,  H01L27/12 ,  H01L29/786

CPC分类号： G09G3/3614 ,  G02F1/133553 ,  G02F1/13439 ,  G02F1/1368 ,  G02F2201/123 ,  G02F2202/10 ,  G09G3/3648 ,  G09G3/3677 ,  G09G2300/08 ,  G09G2310/0286 ,  G09G2310/08 ,  G09G2330/021 ,  H01L21/02164 ,  H01L21/02266 ,  H01L21/02565 ,  H01L21/02631 ,  H01L21/467 ,  H01L21/477 ,  H01L27/1225 ,  H01L27/1255 ,  H01L29/24 ,  H01L29/42356 ,  H01L29/45 ,  H01L29/66969 ,  H01L29/78648 ,  H01L29/7869

摘要： In a liquid crystal display device including a plurality of pixels in a display portion and configured to performed display in a plurality of frame periods, each of the frame periods includes a writing period and a holding period, and after an image signal is input to each of the plurality of pixels in the writing period, a transistor included in each of the plurality of pixels is turned off and the image signal is held for at least 30 seconds in the holding period. The pixel includes a semiconductor layer including an oxide semiconductor layer, and the oxide semiconductor layer has a carrier concentration of less than 1×1014/cm3.

摘要翻译： 在包括显示部分中的多个像素并且被配置为在多个帧周期中进行显示的液晶显示装置中，每个帧周期包括写入周期和保持周期，并且在将图像信号输入到每个 在所述写入周期中的所述多个像素中，包括在所述多个像素中的每一个中的晶体管被​​截止，并且所述图像信号在所述保持周期中保持至少30秒。 像素包括具有氧化物半导体层的半导体层，氧化物半导体层的载流子浓度小于1×10 14 / cm 3。

公开(公告)号：US07952100B2

公开(公告)日：2011-05-31

申请号：US11898749

申请日：2007-09-14

申请人： Ryo Arasawa ,  Aya Miyazaki ,  Shigeharu Monoe ,  Shunpei Yamazaki

发明人： Ryo Arasawa ,  Aya Miyazaki ,  Shigeharu Monoe ,  Shunpei Yamazaki

IPC分类号： H01L27/14

CPC分类号： H01L27/1266 ,  H01L27/124 ,  H01L29/78603 ,  H01L29/78606

摘要： An object is to provide a semiconductor device in which damages of an element such as a transistor are reduced even when physical force such as bending is externally applied to generate stress in the semiconductor device. A semiconductor device includes a semiconductor film including a channel formation region and an impurity region, which is provided over a substrate, a first conductive film provided over the channel formation region with a gate insulating film interposed therebetween, a first interlayer insulating film provided to cover the first conductive film, a second conductive film provided over the first interlayer insulating film so as to overlap with at least part of the impurity region, a second interlayer insulating film provided over the second conductive film, and a third conductive film provided over the second interlayer insulating film so as to be electrically connected to the impurity region through an opening.

摘要翻译： 本发明的目的是提供一种半导体器件，其中即使当外部施加诸如弯曲的物理力在半导体器件中产生应力时，诸如晶体管的元件的损伤也减小。 半导体器件包括：设置在基板上的沟道形成区域和杂质区域的半导体膜，设置在沟道形成区域上的栅极绝缘膜之间的第一导电膜，设置成覆盖的第一层间绝缘膜 所述第一导电膜，设置在所述第一层间绝缘膜上以与所述杂质区的至少一部分重叠的第二导电膜，设置在所述第二导电膜上的第二层间绝缘膜，以及设置在所述第二导电膜上的第二导电膜 层间绝缘膜，以通过开口与杂质区电连接。

公开(公告)号：US20080073647A1

公开(公告)日：2008-03-27

申请号：US11898749

申请日：2007-09-14

申请人： Ryo Arasawa ,  Aya Miyazaki ,  Shigeharu Monoe ,  Shunpei Yamazaki

发明人： Ryo Arasawa ,  Aya Miyazaki ,  Shigeharu Monoe ,  Shunpei Yamazaki

IPC分类号： H01L29/04 ,  H01L29/786

CPC分类号： H01L27/1266 ,  H01L27/124 ,  H01L29/78603 ,  H01L29/78606

摘要： An object is to provide a semiconductor device in which damages of an element such as a transistor are reduced even when physical force such as bending is externally applied to generate stress in the semiconductor device. A semiconductor device includes a semiconductor film including a channel formation region and an impurity region, which is provided over a substrate, a first conductive film provided over the channel formation region with a gate insulating film interposed therebetween, a first interlayer insulating film provided to cover the first conductive film, a second conductive film provided over the first interlayer insulating film so as to overlap with at least part of the impurity region, a second interlayer insulating film provided over the second conductive film, and a third conductive film provided over the second interlayer insulating film so as to be electrically connected to the impurity region through an opening.

摘要翻译： 本发明的目的是提供一种半导体器件，其中即使当外部施加诸如弯曲的物理力在半导体器件中产生应力时，诸如晶体管的元件的损伤也减小。 半导体器件包括：设置在基板上的沟道形成区域和杂质区域的半导体膜，设置在沟道形成区域上的栅极绝缘膜之间的第一导电膜，设置成覆盖的第一层间绝缘膜 所述第一导电膜，设置在所述第一层间绝缘膜上以与所述杂质区的至少一部分重叠的第二导电膜，设置在所述第二导电膜上的第二层间绝缘膜，以及设置在所述第二导电膜上的第二导电膜 层间绝缘膜，以通过开口与杂质区电连接。

公开(公告)号：US09559208B2

公开(公告)日：2017-01-31

申请号：US12906178

申请日：2010-10-18

申请人： Ryo Arasawa ,  Hideaki Shishido ,  Shunpei Yamazaki

发明人： Ryo Arasawa ,  Hideaki Shishido ,  Shunpei Yamazaki

IPC分类号： G02F1/136 ,  H01L29/786 ,  H01L27/12 ,  G09G3/36 ,  G02F1/1362 ,  G02F1/1343

CPC分类号： H01L29/78609 ,  G02F1/133345 ,  G02F1/134336 ,  G02F1/13439 ,  G02F1/136213 ,  G02F1/13624 ,  G02F1/136286 ,  G02F1/1368 ,  G02F2001/134345 ,  G02F2201/123 ,  G02F2201/40 ,  G09G3/3614 ,  G09G3/3648 ,  G09G3/3677 ,  G09G2300/0426 ,  G09G2300/0439 ,  G09G2300/0465 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/1255 ,  H01L27/127 ,  H01L29/24 ,  H01L29/4908 ,  H01L29/7869 ,  H01L29/78696

摘要： A liquid crystal display device is provided in which the aperture ratio can be increased in a pixel including a thin film transistor in which an oxide semiconductor is used. In the liquid crystal display device, the thin film transistor including a gate electrode, a gate insulating layer and an oxide semiconductor layer which are provided so as to overlap with the gate electrode, and a source electrode and a drain electrode which overlap part of the oxide semiconductor layer is provided between a signal line and a pixel electrode which are provided in a pixel portion. The off-current of the thin film transistor is 1×10−13 A or less. A potential can be held only by a liquid crystal capacitor, without a capacitor which is parallel to a liquid crystal element, and a capacitor connected to the pixel electrode is not formed in the pixel portion.

摘要翻译： 提供了一种液晶显示装置，其中可以在包括使用氧化物半导体的薄膜晶体管的像素中增加开口率。 在液晶显示装置中，包括与栅电极重叠设置的栅电极，栅极绝缘层和氧化物半导体层的薄膜晶体管，以及与栅电极重叠的源电极和漏电极 氧化物半导体层设置在设置在像素部中的信号线和像素电极之间。 薄膜晶体管的截止电流为1×10-13A以下。 电位只能由液晶电容器保持，而没有与液晶元件平行的电容器，并且在像素部分中不形成连接到像素电极的电容器。

公开(公告)号：US08115785B2

公开(公告)日：2012-02-14

申请号：US12055841

申请日：2008-03-26

申请人： Ryo Arasawa ,  Takahiro Fukutome

发明人： Ryo Arasawa ,  Takahiro Fukutome

IPC分类号： G09G3/36

CPC分类号： G09G3/3611 ,  G09G3/2025 ,  G09G3/2081 ,  G09G3/3406 ,  G09G3/3648 ,  G09G2300/0465 ,  G09G2310/0237 ,  G09G2320/0247 ,  G09G2320/0252 ,  G09G2340/16

摘要： An object of the present invention is to provide a driving method of a liquid crystal display device for improvement of image quality and a liquid crystal display device in which the driving method is used. One frame period is divided up into an n (n: integer, n≧3) number of periods (hereinafter referred to as subframe periods). Furthermore, a voltage is applied to a liquid crystal so as to correct for a loss in luminance resulting from response speed of the liquid crystal. The voltage for correction is applied during subframe periods other than the first subframe period.

摘要翻译： 本发明的目的是提供一种用于提高图像质量的液晶显示装置的驱动方法和使用驱动方法的液晶显示装置。 一个帧周期被划分为n（n：整数，n≥3）个周期数（以下称为子帧周期）。 此外，向液晶施加电压，以校正由液晶的响应速度导致的亮度损失。 用于校正的电压在除了第一子帧周期之外的子帧周期期间被应用。

公开(公告)号：US20110175862A1

公开(公告)日：2011-07-21

申请号：US13006668

申请日：2011-01-14

申请人： Atsushi Umezaki ,  Ryo Arasawa

发明人： Atsushi Umezaki ,  Ryo Arasawa

IPC分类号： G09G5/00

CPC分类号： G09G3/3233 ,  G09G2300/0861

摘要： Each of a plurality of pixels includes a transistor, a capacitor, and a display element. One terminal of the capacitor is electrically connected to a first line. The other terminal of the capacitor is electrically connected to a gate of the transistor. In a first period, a first terminal of the transistor is electrically connected to the gate of the transistor and the gate of the transistor is electrically connected to a second line. In a second period, the first terminal of the transistor is electrically connected to the gate of the transistor and a second terminal of the transistor is electrically connected to a third line. In a third period, the first terminal of the transistor is electrically connected to the first line and the second terminal of the transistor is electrically connected to the display element.

摘要翻译： 多个像素中的每一个包括晶体管，电容器和显示元件。 电容器的一个端子电连接到第一线。 电容器的另一个端子电连接到晶体管的栅极。 在第一时段中，晶体管的第一端电连接到晶体管的栅极，并且晶体管的栅极电连接到第二线。 在第二时段中，晶体管的第一端电连接到晶体管的栅极，晶体管的第二端电连接到第三线。 在第三时段中，晶体管的第一端电连接到第一线，并且晶体管的第二端电连接到显示元件。

公开(公告)号：US20110084265A1

公开(公告)日：2011-04-14

申请号：US12897299

申请日：2010-10-04

申请人： Ryo Arasawa ,  Hideaki Shishido

发明人： Ryo Arasawa ,  Hideaki Shishido

IPC分类号： H01L29/12

CPC分类号： H01L27/124 ,  H01L27/1225 ,  H01L33/16

摘要： An object is to provide a light-emitting display device in which a pixel including a thin film transistor using an oxide semiconductor has a high aperture ratio. The light-emitting display device includes a plurality of pixels each including a thin film transistor and a light-emitting element. The pixel is electrically connected to a first wiring functioning as a scan line. The thin film transistor includes an oxide semiconductor layer over the first wiring with a gate insulating film therebetween. The oxide semiconductor layer is extended beyond the edge of a region where the first wiring is provided. The light-emitting element and the oxide semiconductor layer overlap with each other.

摘要翻译： 本发明的目的是提供一种发光显示装置，其中包括使用氧化物半导体的薄膜晶体管的像素具有高开口率。 发光显示装置包括多个像素，每个像素包括薄膜晶体管和发光元件。 像素电连接到用作扫描线的第一布线。 薄膜晶体管包括在第一布线之间的氧化物半导体层，其间具有栅极绝缘膜。 氧化物半导体层延伸超过设置有第一布线的区域的边缘。 发光元件和氧化物半导体层彼此重叠。

公开(公告)号：US20070178614A1

公开(公告)日：2007-08-02

申请号：US11657163

申请日：2007-01-24

申请人： Ryo Arasawa ,  Tomoyuki Iwabuchi

发明人： Ryo Arasawa ,  Tomoyuki Iwabuchi

IPC分类号： H01L21/66

CPC分类号： H01L22/32 ,  H01L27/12 ,  H01L2924/0002 ,  H01L2924/00

摘要： An object of the invention is to manage variation of electrical characteristics of an element in a semiconductor device due to a vapor deposition process by measuring electrical characteristics of a TEG. A substrate 100 of an active matrix EL panel includes a vapor deposition region 101 having a film formed by a vapor deposition method. In the vapor deposition region 101, a pixel region 102 is provided. A TEG 109 is provided in the vapor deposition region 101 having a film formed in a vapor deposition step and outside of the pixel region 102. A measurement terminal portion 110 for measuring the TEG 109 is provided outside of a sealing region 103.

摘要翻译： 本发明的一个目的是通过测量TEG的电特性来管理由于气相沉积工艺而导致的半导体器件元件的电特性变化。 有源矩阵EL面板的基板100包括具有通过气相沉积法形成的膜的气相沉积区域101。 在蒸镀区域101中设置有像素区域102。 在蒸镀区域101中设置TEG109，该气相沉积区域101具有在气相沉积步骤中形成的膜并且在像素区域102外部。 用于测量TEG109的测量端子部分110设置在密封区域103的外侧。