公开(公告)号：US4366448A

公开(公告)日：1982-12-28

申请号：US134303

申请日：1980-03-26

申请人： Hiromi Kusakabe ,  Masahide Nagumo

发明人： Hiromi Kusakabe ,  Masahide Nagumo

IPC分类号： H03F1/34 ,  H03F3/30 ,  H03F3/26

CPC分类号： H03F3/3066 ,  H03F1/34 ,  H03F3/3093

摘要： A power-amplifying circuit embodying this invention includes a pre-amplifier stage which comprises two emitter-connected transitors, one of whose bases is supplied with an input signal and an output stage comprising complementary pair of a first transistor of a PNP type and an emitter-grounded second transistor of an NPN type which carry out a class-AB push-pull operation in accordance with the amplitude of a current from the pre-amplifier stage. The power-amplifier circuit of this invention further comprises third transistor for detecting an operating current of the first transistor of the output stage, a fourth transistor which is driven by the third transistor and whose base is connected to the base of the second transistor of the output stage, and fifth and sixth transistors which are connected in such a manner that a sum of the base-emitter voltages of the fifth and sixth transistors is made equal to a sum of the base-emitter voltages of the second and fourth transistors, and through which there flows a current corresponding to a product of the operating currents of the first and second transistors constituting the output stage. A current running through the fifth and sixth transistors is supplied to the pre-amplifier means through a negative feedback path so as to be regulated.

摘要翻译： 体现本发明的功率放大电路包括前置放大器级，其包括两个发射极连接的转换器，其基极之一被提供有输入信号，并且输出级包括PNP型的第一晶体管和发射极 NPN型的接地第二晶体管，其根据来自前置放大器级的电流的幅度进行AB类推挽操作。 本发明的功率放大器电路还包括用于检测输出级的第一晶体管的工作电流的第三晶体管，由第三晶体管驱动的第四晶体管，其基极连接到第二晶体管的基极 输出级和第五和第六晶体管，其以使第五和第六晶体管的基极 - 发射极之和的总和等于第二和第四晶体管的基极 - 发射极电压之和的方式连接，以及 流过与对应于构成输出级的第一和第二晶体管的工作电流的乘积的电流。 通过第五和第六晶体管的电流通过负反馈路径被提供给前置放大器装置，以便被调节。

公开(公告)号：US4463317A

公开(公告)日：1984-07-31

申请号：US292264

申请日：1981-08-12

申请人： Hiromi Kusakabe

发明人： Hiromi Kusakabe

IPC分类号： H03D3/00

CPC分类号： H03D3/00

摘要： A frequency modulation detector, includes an FM (frequency modulation) demodulator, an adder responsive to first and second signals for maintaining a constant D.C. level output signal, the first signal being the FM signal, and a feedback circuit connected to the adder for comparing the D.C. output level of the adder with a reference signal level to produce the second signal.

摘要翻译： 频率调制检测器包括FM（调频）解调器，响应于第一和第二信号的加法器，用于维持恒定的DC电平输出信号，第一信号是FM信号，以及连接到加法器的反馈电路，用于比较 具有参考信号电平的加法器的直流输出电平以产生第二信号。

公开(公告)号：US4282490A

公开(公告)日：1981-08-04

申请号：US006243

申请日：1979-01-24

申请人： Hiromi Kusakabe

发明人： Hiromi Kusakabe

IPC分类号： H03D3/00 ,  H03D3/04 ,  H03K9/06

CPC分类号： H03D3/04 ,  H03D3/00 ,  H03K9/06

摘要： Disclosed is a demodulator circuit which comprises a limiter circuit, a differentiation circuit, a monostable multivibrator circuit and an integration circuit. The differentiation circuit is composed of a delay circuit and a differential logic circuit. The differentiation circuit supplies the monostable multivibrator circuit with a trigger pulse whose pulse width is determined by the delay circuit. The monostable multivibrator circuit is formed of a differential circuit, having a current source at its output circuit. The current source tends to increase the output voltage of the monostable multivibrator circuit and a driving impedance for the integration circuit.

摘要翻译： 公开了一种解调器电路，其包括限幅电路，微分电路，单稳态多谐振荡器电路和积分电路。 微分电路由延迟电路和差分逻辑电路组成。 微分电路为单稳态多谐振荡器电路提供脉冲宽度由延迟电路确定的触发脉冲。 单稳态多谐振荡器电路由差分电路构成，在其输出电路上具有电流源。 电流源倾向于增加单稳态多谐振荡器电路的输出电压和积分电路的驱动阻抗。

公开(公告)号：US5111068A

公开(公告)日：1992-05-05

申请号：US175294

申请日：1988-03-30

申请人： Hiromi Kusakabe

发明人： Hiromi Kusakabe

IPC分类号： H01L27/04 ,  H01L21/822 ,  H01L27/08

CPC分类号： H01L27/0802

摘要： A diffusion resistor circuit for reducing distortion caused in a diffusion resistor. The circuit includes the diffusion resistor having a substrate, an island area including an impurity of a first polarity diffused into the substrate and a resistor area including an impurity of a second polarity diffused into the island area, a circuit for supplying a current signal through the resistor area and another circuit connecting the island area to a generally central point of the resistor area for reducing distortion of the current signal.

公开(公告)号：US4733162A

公开(公告)日：1988-03-22

申请号：US936159

申请日：1986-12-01

申请人： Hiroyuki Haga ,  Mitsuru Nagata ,  Hiromi Kusakabe

发明人： Hiroyuki Haga ,  Mitsuru Nagata ,  Hiromi Kusakabe

IPC分类号： G05F3/26 ,  G01K7/01 ,  G05F3/16 ,  G05F3/22 ,  G05F3/20

CPC分类号： G05F3/225 ,  Y10S323/907

摘要： A thermal shutoff circuit for controlling current to an external circuit in response to changes in the temperature of the shutoff circuit. The thermal shutoff circuit includes a source for supplying a voltage which varies with changes in temperature, and a switch circuit responsive to the temperature variable voltage for interrupting the current to the external circuit when the temperature of the shutoff circuit exceeds a predetermined amount. The switch circuit has a detection transistor having a base connected to the temperature variable voltage source for generating a base current responsive to the temperature variable voltage and a compensation transistor connected in series to the detection transistor for generating an equivalent base current.

摘要翻译： 一种热关断电路，用于响应于截止电路的温度变化来控制对外部电路的电流。 热关断电路包括用于提供随温度变化而变化的电压的源，以及当切断电路的温度超过预定量时响应于温度可变电压的开关电路，用于中断到外部电路的电流。 开关电路具有检测晶体管，其具有连接到温度可变电压源的基极，用于响应于温度可变电压产生基极电流，以及与检测晶体管串联连接以产生等效基极电流的补偿晶体管。

公开(公告)号：US4590433A

公开(公告)日：1986-05-20

申请号：US596024

申请日：1984-04-02

申请人： Hiromi Kusakabe

发明人： Hiromi Kusakabe

IPC分类号： H03K17/62 ,  H03C1/54 ,  H03K17/60 ,  H04H1/00 ,  H04H40/45 ,  H03D1/18 ,  H03D3/00 ,  H03K3/281

CPC分类号： H04H40/45 ,  H03C1/545 ,  H03K17/603

摘要： A switching circuit apparatus driven by a relatively low DC power supply voltage, which includes a power supply terminal designed to receive a DC power source voltage, a pair of switching circuits comprising switching transistors (28, 30 and 32, 34) connected in parallel with each other and connected to the power supply terminal, first circuit means (10,12) connected for supplying the respective switching circuits with a switched signal, and a second circuit means (16, 18, 40, 14) connected for supplying the respective switching circuits with a pair of control signals which are opposite in phase and which are never both at a potential difference other than a prescribed potential at the same time. The switching circuit transistors (28, 30 or 32, 34) are all fully conductive prior to any transition in which two are rendered non-conductive by the control signals, thereby enable operation of the circuit with low power consumption.

摘要翻译： 一种由相对低的直流电源电压驱动的开关电路装置，其包括被设计为接收直流电源电压的电源端子，一对开关电路，包括与三个电容器并联连接的开关晶体管（28,30和32,34） 彼此连接并连接到电源端子，连接用于向各个开关电路提供开关信号的第一电路装置（10,12），以及连接用于提供各个开关的第二电路装置（16,18,40,14） 具有一对控制信号的电路，该对控制信号相位相反，并且不同时处于除规定电位之外的电位差。 开关电路晶体管（28,30或32,34）在通过控制信号使两个不导通的任何转变之前都是完全导通的，从而能够以低功耗进行电路的操作。

公开(公告)号：US4529946A

公开(公告)日：1985-07-16

申请号：US536789

申请日：1983-09-28

申请人： Hiromi Kusakabe

发明人： Hiromi Kusakabe

IPC分类号： H03F3/45 ,  H03F1/32

CPC分类号： H03F1/3211

摘要： A differential amplifier circuit producing sufficient output current with a broad linear working range, which includes first and second transistors coupled at their emitters in differential amplifier configuration, an input circuit means connected between the bases of the first and second transistors, third and fourth transistors connected to the collectors of the first and second transistors constituting collector loads of the first and second transistors respectively, first resistor inserted between the bases of the third and fourth transistors, second and third resistors respectively inserted between the base and collector of each of the third and fourth transistors, and an output circuit means connected to the third and fourth transistors.

摘要翻译： 差分放大器电路产生具有宽线性工作范围的足够的输出电流，其包括以差分放大器配置耦合在其发射极处的第一和第二晶体管，连接在第一和第二晶体管的基极之间的输入电路装置，连接第三和第四晶体管 分别构成第一和第二晶体管的集电极负载的第一和第二晶体管的集电极，分别插入在第三和第四晶体管的基极之间的第一电阻器，分别插入在第三和第四晶体管的基极之间的第二和第三电阻器， 第四晶体管，以及连接到第三和第四晶体管的输出电路装置。

公开(公告)号：US07292276B2

公开(公告)日：2007-11-06

申请号：US10875780

申请日：2004-06-25

申请人： Yoshitaka Egawa ,  Yoriko Tanaka ,  Shinji Ohsawa ,  Yukio Endo ,  Hiromi Kusakabe ,  Nagataka Tanaka

发明人： Yoshitaka Egawa ,  Yoriko Tanaka ,  Shinji Ohsawa ,  Yukio Endo ,  Hiromi Kusakabe ,  Nagataka Tanaka

IPC分类号： H04N3/14

CPC分类号： H04N5/3658 ,  H04N5/3575 ,  H04N5/3591 ,  H04N5/361 ,  H04N5/3698 ,  H04N5/374 ,  H04N5/3741 ,  H04N5/378

摘要： In a CMOS image sensor, current leakage after a series of noise removing operations has been completed is suppressed in a read operation for each horizontal line, thereby suppressing image noise occurring on the output display screen of the image sensor. There are provided signal storage regions for storing the signals read from the unit cells in the same row selected in the imaging area onto vertical signal lines and horizontal select transistors for sequentially selecting and reading the signals stored in the individual signal storage regions and transferring them to read horizontal signal lines. At least in the period during which the signals are read from the signal storage regions, one of the drain and source of the transistor electrically connected to the signal path between the vertical signal line and horizontal signal line is biased in the reverse direction with respect to the substrate region. Two adjacent ones of the horizontal select transistors form a pair. The horizontal select transistors in each pair share one of the source/drain regions so as to be connected to the horizontal signal line in common, and the others of the source/drain regions are connected to the vertical signal line individually.

摘要翻译： 在CMOS图像传感器中，对于每个水平线的读取操作，抑制了一系列噪声去除操作之后的电流泄漏，从而抑制了图像传感器的输出显示屏幕上出现的图像噪声。 提供信号存储区域，用于将从成像区域中选择的同一行中的单位单元读取的信号存储到垂直信号线和水平选择晶体管上，用于顺序选择和读取存储在各个信号存储区域中的信号并将其传送到 读取水平信号线。 至少在从信号存储区读取信号的期间中，与垂直信号线和水平信号线之间的信号路径电连接的晶体管的漏极和源极之一相对于 衬底区域。 两个相邻的水平选择晶体管形成一对。 每对中的水平选择晶体管共享源极/漏极区域中的一个，以便与水平信号线共同连接，源极/漏极区域中的另一个分别连接到垂直信号线。

公开(公告)号：US6107886A

公开(公告)日：2000-08-22

申请号：US275258

申请日：1999-03-23

申请人： Hiromi Kusakabe ,  Hiroyuki Tsurumi

发明人： Hiromi Kusakabe ,  Hiroyuki Tsurumi

IPC分类号： H04S3/00 ,  H03F1/02 ,  H03F3/181 ,  H03F3/68 ,  H03F3/04

CPC分类号： H03F3/181 ,  H03F1/0277

摘要： A power amplifier comprises a pair of power-supply rails, a power-supply voltage divider, an intermediate power-supply line, a first and second BTL amplifiers, and a first to fourth switching circuits. The power-supply rails are composed of a first power-supply line to which a power-supply potential is applied and a second power-supply line to which the ground potential is applied. The power-supply divider produces an intermediate potential by dividing the voltage between the power-supply rails in two and supplies it to the intermediate power-supply line. The first BTL amplifier is provided between the second power-supply line and the intermediate power-supply line. The second BTL amplifier is provided between the first power-supply line and the intermediate power-supply line. The first and second BTL amplifiers each include an output bridge circuit. At small signal input, the switching circuit connects not only the output bridge circuit of the first BTL amplifier between the intermediate power-supply line and second power-supply line, but also the output bridge circuit of the second BTL amplifier between the first power-supply line and the intermediate power-supply line. At large signal input, the switching circuit connects each of the output bridge circuits of the first and second BTL amplifiers between the power-supply rails.

摘要翻译： 功率放大器包括一对电源轨，电源分压器，中间电源线，第一和第二BTL放大器以及第一至第四开关电路。 电源轨由施加电源电位的第一电源线和施加地电位的第二电源线构成。 电源分压器通过将电源轨之间的电压分成两部分来产生中间电位，并将其提供给中间电源线。 第一个BTL放大器设置在第二个电源线和中间电源线之间。 第二个BTL放大器设置在第一电源线和中间电源线之间。 第一和第二BTL放大器各自包括输出桥式电路。 在小信号输入时，开关电路不仅连接中间电源线和第二电源线之间的第一BTL放大器的输出桥电路，而且连接第二BTL放大器的输出桥电路， 供电线路和中间供电线路。 在大信号输入端，开关电路将电源轨之间的第一和第二BTL放大器的输出桥接电路连接起来。

公开(公告)号：US5198781A

公开(公告)日：1993-03-30

申请号：US731329

申请日：1991-07-17

申请人： Hiromi Kusakabe

发明人： Hiromi Kusakabe

IPC分类号： H01L21/82 ,  H03F3/34 ,  H03F3/347 ,  H03F3/45

CPC分类号： H03F3/45071

摘要： A circuit constituting a system or a subsystem is composed of a cascade connection of a plurality of analog circuit cells. At least one of said analog circuit cells has either the current-sink input terminal and a current-source output terminal or a current-source input terminal and current-sink output terminal and operates in the current mode.

摘要翻译： 构成系统或子系统的电路由多个模拟电路单元的级联连接构成。 所述模拟电路单元中的至少一个具有电流吸收器输入端子和电流源输出端子或电流源输入端子和电流吸收器输出端子，并且以当前模式工作。