公开(公告)号：US5430671A

公开(公告)日：1995-07-04

申请号：US224589

申请日：1994-04-07

申请人： Hiroshige Hirano ,  Tatsumi Sumi ,  Yoshihisa Nagano

发明人： Hiroshige Hirano ,  Tatsumi Sumi ,  Yoshihisa Nagano

IPC分类号： G11C11/22

CPC分类号： G11C11/22

摘要： A semiconductor memory device comprising bit line, word line, plate electrode, ferroelectric capacitor having first electrode and second electrode, said second electrode being coupled to said plate electrode, MOS transistor the source of which is coupled to said first electrode, the gate is coupled to said word line and the drain is coupled to said bit line, and adjusting capacitor for adjusting bit line capacitance coupled to said bit line. The adjusting capacitor is provided to increase the potential difference for reading and control occurrence of operating errors.

摘要翻译： 一种半导体存储器件，包括位线，字线，平板电极，具有第一电极和第二电极的铁电电容器，所述第二电极耦合到所述平板电极，MOS晶体管的源极耦合到所述第一电极，栅极耦合 到所述字线，并且所述漏极耦合到所述位线，以及调整电容器，用于调整耦合到所述位线的位线电容。 提供调整电容器以增加用于读取和控制操作错误发生的电位差。

公开(公告)号：US07531863B2

公开(公告)日：2009-05-12

申请号：US11270615

申请日：2005-11-10

申请人： Yoshihisa Nagano ,  Yasuhiro Uemoto

发明人： Yoshihisa Nagano ,  Yasuhiro Uemoto

IPC分类号： H01L27/108

CPC分类号： H01L27/10894 ,  H01L27/10852 ,  H01L27/11507 ,  H01L27/11509 ,  H01L28/55

摘要： A protective insulating film is deposited over first and second field-effect transistors formed on a semiconductor substrate. A capacitor composed of a capacitor lower electrode, a capacitor insulating film composed of an insulating metal oxide film, and a capacitor upper electrode is formed on the protective insulating film. A first contact plug formed in the protective insulating film provides a direct connection between the capacitor lower electrode and an impurity diffusion layer of the first field-effect transistor. A second contact plug formed in the protective insulating film provides a direct connection between the capacitor upper electrode and an impurity diffusion layer of the second field-effect transistor.

公开(公告)号：US20050167725A1

公开(公告)日：2005-08-04

申请号：US11035175

申请日：2005-01-14

申请人： Yoshihisa Nagano ,  Takumi Mikawa

发明人： Yoshihisa Nagano ,  Takumi Mikawa

IPC分类号： H01L27/04 ,  H01L21/02 ,  H01L21/822 ,  H01L21/8239 ,  H01L21/8242 ,  H01L21/8246 ,  H01L27/10 ,  H01L27/105 ,  H01L27/108 ,  H01L29/00

CPC分类号： H01L28/65 ,  H01L27/10852 ,  H01L28/57 ,  H01L28/75

摘要： A capacitor element is provided which is composed of a lower electrode, an upper electrode formed in opposing relation to the lower electrode, and a capacitor dielectric film made of a ferroelectric material or a high dielectric material and formed between the lower and upper electrodes. The lower electrode, the capacitor dielectric film, and the upper electrode are formed in a region extending at least from within a hole provided in an interlayer insulating film having a first hydrogen barrier film disposed on the upper surface thereof toward a position above the hole. A second hydrogen barrier film in contact with the first hydrogen barrier film is disposed to cover the upper surface of the upper electrode and the side surface of the portion of the upper electrode which has been formed above the hole.

摘要翻译： 提供一种电容器元件，其由下电极，与下电极相对形成的上电极和由电介质材料或高电介质材料制成并形成在下电极和上电极之间的电容器电介质膜组成。 下电极，电容器电介质膜和上电极形成在至少从设置在其上表面上的第一氢阻挡膜朝向孔上方的位置的层间绝缘膜的孔内延伸的区域中。 与第一氢阻挡膜接触的第二氢阻挡膜设置成覆盖上电极的上表面和形成在孔上方的上电极部分的侧表面。

公开(公告)号：US06809000B2

公开(公告)日：2004-10-26

申请号：US09797987

申请日：2001-03-05

申请人： Keisaku Nakao ,  Akihiro Matsuda ,  Yasufumi Izutsu ,  Toyoji Ito ,  Takumi Mikawa ,  Toru Nasu ,  Yoshihisa Nagano ,  Keisuke Tanaka ,  Toshie Kutsunai

发明人： Keisaku Nakao ,  Akihiro Matsuda ,  Yasufumi Izutsu ,  Toyoji Ito ,  Takumi Mikawa ,  Toru Nasu ,  Yoshihisa Nagano ,  Keisuke Tanaka ,  Toshie Kutsunai

IPC分类号： H01L2120

CPC分类号： H01L28/55

摘要： The semiconductor device of the invention includes a capacitor device, which is formed on a substrate and which includes a capacitive lower electrode, a capacitive insulating film made of an insulating metal oxide film and a capacitive upper electrode. An interlevel insulating film having an opening reaching the capacitive upper electrode is formed over the capacitor device. A metal interconnection including a titanium film is formed over the interlevel insulating film so as to be electrically connected to the capacitive upper electrode through the opening. An anti-diffusion film having conductivity is formed between the capacitive upper electrode and the metal interconnection for preventing titanium atoms composing the titanium film of the metal interconnection from passing through the capacitive upper electrode and diffusing into the capacitive insulating film.

摘要翻译： 本发明的半导体器件包括形成在基板上的电容器器件，其包括电容式下电极，由绝缘金属氧化物膜制成的电容绝缘膜和电容上电极。 在电容器装置上形成具有到达电容上电极的开口的层间绝缘膜。 在层间绝缘膜上形成包括钛膜的金属互连，以便通过开口与电容上电极电连接。 在电容上电极和金属互连之间形成具有导电性的防扩散膜，以防止构成金属互连的钛膜的钛原子通过电容上电极并扩散到电容绝缘膜。

公开(公告)号：US06441420B1

公开(公告)日：2002-08-27

申请号：US09576971

申请日：2000-05-24

申请人： Yoshihisa Nagano ,  Yasuhiro Uemoto

发明人： Yoshihisa Nagano ,  Yasuhiro Uemoto

IPC分类号： H01L2994

CPC分类号： H01L27/10894 ,  H01L27/10852 ,  H01L27/11507 ,  H01L27/11509 ,  H01L28/55

摘要： A protective insulating film is deposited over first and second field-effect transistors formed on a semiconductor substrate. A capacitor composed of a capacitor lower electrode, a capacitor insulating film composed of an insulating metal oxide film, and a capacitor upper electrode is formed on the protective insulating film. A first contact plug formed in the protective insulating film provides a direct connection between the capacitor lower electrode and an impurity diffusion layer of the first field-effect transistor. A second contact plug formed in the protective insulating film provides a direct connection between the capacitor upper electrode and an impurity diffusion layer of the second field-effect transistor.

公开(公告)号：US06239462B1

公开(公告)日：2001-05-29

申请号：US09120893

申请日：1998-07-23

申请人： Keisaku Nakao ,  Akihiro Matsuda ,  Yasufumi Izutsu ,  Toyoji Ito ,  Takumi Mikawa ,  Toru Nasu ,  Yoshihisa Nagano ,  Keisuke Tanaka ,  Toshie Kutsunai

发明人： Keisaku Nakao ,  Akihiro Matsuda ,  Yasufumi Izutsu ,  Toyoji Ito ,  Takumi Mikawa ,  Toru Nasu ,  Yoshihisa Nagano ,  Keisuke Tanaka ,  Toshie Kutsunai

IPC分类号： H01L27108

CPC分类号： H01L28/55

摘要： The semiconductor device of the invention includes a capacitor device, which is formed on a substrate and which includes a capacitive lower electrode, a capacitive insulating film made of an insulating metal oxide film and a capacitive upper electrode. An interlevel insulating film having an opening reaching the capacitive upper electrode is formed over the capacitor device. A metal interconnection including a titanium film is formed over the interlevel insulating film so as to be electrically connected to the capacitive upper electrode through the opening. An anti-diffusion film having conductivity is formed between the capacitive upper electrode and the metal interconnection for preventing titanium atoms composing the titanium film of the metal interconnection from passing through the capacitive upper electrode and diffusing into the capacitive insulating film.

摘要翻译： 本发明的半导体器件包括形成在基板上的电容器器件，其包括电容式下电极，由绝缘金属氧化物膜制成的电容绝缘膜和电容上电极。 在电容器装置上形成具有到达电容上电极的开口的层间绝缘膜。 在层间绝缘膜上形成包括钛膜的金属互连，以便通过开口与电容上电极电连接。 在电容上电极和金属互连之间形成具有导电性的防扩散膜，以防止构成金属互连的钛膜的钛原子通过电容上电极并扩散到电容绝缘膜。

公开(公告)号：US06169304A

公开(公告)日：2001-01-02

申请号：US09071534

申请日：1998-05-04

申请人： Koji Arita ,  Eiji Fujii ,  Yasuhiro Shimada ,  Yasuhiro Uemoto ,  Toru Nasu ,  Akihiro Matsuda ,  Yoshihisa Nagano ,  Atsuo Inoue ,  Taketoshi Matsuura ,  Tatsuo Otsuki

发明人： Koji Arita ,  Eiji Fujii ,  Yasuhiro Shimada ,  Yasuhiro Uemoto ,  Toru Nasu ,  Akihiro Matsuda ,  Yoshihisa Nagano ,  Atsuo Inoue ,  Taketoshi Matsuura ,  Tatsuo Otsuki

IPC分类号： H01L2976

CPC分类号： H01L27/11502 ,  H01L27/10852 ,  H01L27/11585 ,  H01L27/1159 ,  H01L28/40 ,  H01L28/55 ,  H01L28/60 ,  H01L28/75 ,  Y10S438/958

摘要： A semiconductor device forming a capacitor through an interlayer insulating layer on a semiconductor substrate on which an integrated circuit is formed. This semiconductor device has an interlayer insulating layer with moisture content of 0.5 g/cm3 or less, which covers the capacitor in one aspect, and has a passivation layer with hydrogen content of 1021 atoms/cm3 or less, which covers the interconnections of the capacitor in other aspect. By thus constituting, deterioration of the capacitor dielectric can be prevented which brings about the electrical reliability of the ferroelectric layer or high dielectric layer.

摘要翻译： 一种通过半导体衬底上的层间绝缘层形成电容器的半导体器件，其上形成集成电路。 该半导体装置具有含水量为0.5g / cm 3以下的层间绝缘层，其在一个方面覆盖电容器，并且具有氢含量为1021原子/ cm3以下的钝化层，其覆盖电容器的互连 在其他方面。 通过这样构成，可以防止导致铁电层或高介电层的电可靠性的电容器电介质的劣化。

公开(公告)号：US5840200A

公开(公告)日：1998-11-24

申请号：US788310

申请日：1997-01-24

申请人： Satoshi Nakagawa ,  Toyoji Ito ,  Yoji Bito ,  Yoshihisa Nagano

发明人： Satoshi Nakagawa ,  Toyoji Ito ,  Yoji Bito ,  Yoshihisa Nagano

IPC分类号： H01L21/02 ,  H01L21/311 ,  H01L21/3213 ,  H01L21/302

CPC分类号： H01L28/55 ,  H01L21/31122 ,  H01L21/32136

摘要： A device insulating film, a lower-layer platinum film, a ferroelectric film, an upper-layer platinum film, and a titanium film are sequentially formed on a semiconductor substrate in this order. On the titanium film, a photoresist mask is further formed in a desired pattern. The thickness of the titanium film is adjusted to be 1/10 or more of the total thickness of a multilayer film consisting of the upper-layer platinum film, the ferroelectric film, and the lower-layer platinum film. The titanium film is then subjected to dry etching and the photoresist film is removed by ashing process. The titanium film thus patterned is used as a mask in etching the upper-layer platinum film, the ferroelectric film, and the lower-layer platinum film by a dry-etching method using a plasma of a gas mixture of chlorine and oxygen in which the volume concentration of oxygen gas is adjusted to be 40%. During the dry-etching process, the titanium film is oxidized to provide a high etching selectivity. Subsequently, the titanium film is removed by dry etching using a plasma of chlorine gas.

摘要翻译： 依次在半导体衬底上依次形成器件绝缘膜，下层铂膜，铁电体膜，上层铂膜和钛膜。 在钛膜上，以期望的图案进一步形成光致抗蚀剂掩模。 将钛膜的厚度调节为由上层铂膜，铁电体膜和下层铂膜构成的多层膜的总厚度的+ E，fra 1/10 + EE以上。 然后对钛膜进行干蚀刻，并通过灰化处理去除光致抗蚀剂膜。 通过使用氯气和氧气的混合气体的等离子体的干蚀刻方法，将如此构图的钛膜用作蚀刻上层铂膜，铁电体膜和下层铂膜的掩模，其中 氧气体积浓度调整为40％。 在干蚀刻工艺期间，钛膜被氧化以提供高蚀刻选择性。 随后，使用氯气等离子体通过干蚀刻除去钛膜。

公开(公告)号：US5780351A

公开(公告)日：1998-07-14

申请号：US844108

申请日：1997-04-28

申请人： Koji Arita ,  Eiji Fujii ,  Yasuhiro Shimada ,  Yasuhiro Uemoto ,  Toru Nasu ,  Akihiro Matsuda ,  Yoshihisa Nagano ,  Atsuo Inoue ,  Taketoshi Matsuura ,  Tatsuo Otsuki

发明人： Koji Arita ,  Eiji Fujii ,  Yasuhiro Shimada ,  Yasuhiro Uemoto ,  Toru Nasu ,  Akihiro Matsuda ,  Yoshihisa Nagano ,  Atsuo Inoue ,  Taketoshi Matsuura ,  Tatsuo Otsuki

IPC分类号： H01L21/02 ,  H01L21/8242 ,  H01L21/8246 ,  H01L27/115 ,  H01L21/20 ,  H01L21/00

CPC分类号： H01L27/11502 ,  H01L27/10852 ,  H01L27/11585 ,  H01L27/1159 ,  H01L28/40 ,  H01L28/55 ,  H01L28/60 ,  H01L28/75 ,  Y10S438/958

摘要： A semi conductor device forming a capacitor through an interlayer insulating layer on a semiconductor substrate on which an integrated circuit is formed. This semiconductor device has an interlayer insulating layer with moisture content of 0.5 g/cm.sup.3 or less, which covers the capacitor in one aspect, and has a passivation layer with hydrogen content of 10.sup.21 atoms/cm.sup.3 or less, which covers the interconnections of the capacitor in other aspect. By thus constituting, deterioration of the capacitor dielectric can be prevented which brings about the electrical reliability of the ferroelectric layer or high dielectric layer.

摘要翻译： 一种半导体器件，其在形成集成电路的半导体衬底上通过层间绝缘层形成电容器。 该半导体装置具有含水量为0.5g / cm 3以下的层间绝缘层，其在一个方面覆盖电容器，并且具有氢含量为1021原子/ cm3以下的钝化层，其覆盖电容器的互连 在其他方面。 通过这样构成，可以防止导致铁电层或高介电层的电可靠性的电容器电介质的劣化。

公开(公告)号：US5599424A

公开(公告)日：1997-02-04

申请号：US571732

申请日：1995-12-13

申请人： Shoji Matsumoto ,  Yoshihisa Nagano ,  Yasuhiro Shimada ,  Yasufumi Izutsu

发明人： Shoji Matsumoto ,  Yoshihisa Nagano ,  Yasuhiro Shimada ,  Yasufumi Izutsu

IPC分类号： H01L21/302 ,  H01L21/02 ,  H01L21/3065 ,  H01L21/822 ,  H01L21/8242 ,  H01L21/8246 ,  H01L27/04 ,  H01L27/10 ,  H01L27/105 ,  H01L27/108 ,  H01L21/00

CPC分类号： H01L28/40

摘要： On a silicon substrate, a silicon oxide layer, a first platinum layer, a dielectric film and a second platinum layer are formed, and then the second platinum layer and the dielectric film are dry etched, via a resist layer, in a 1-5 Pa low pressure region with a mixed gas of HBr and 0.sub.2 as the etching gas. As soon as the first platinum layer is exposed, the unetched portion of dielectric film is etched off in a 5-50 Pa high pressure region, and then the first platinum layer is dry etched again in the low pressure region to form a capacitor consisting of a top electrode, a capacitance insulation layer and a bottom electrode in a semiconductor integrated circuit chip. Using this manufacturing method prevents the deterioration in definition caused by the use of a thick resist and the operation failure of circuit elements such as transistors due to over etching on the insulation layer.

摘要翻译： 在硅衬底上形成氧化硅层，第一铂层，电介质膜和第二铂层，然后通过抗蚀剂层在1-5中干法蚀刻第二铂层和电介质膜 Pa低压区域，混合气体为HBr和O2作为蚀刻气体。 一旦露出第一铂层，在5-50Pa高压区域中蚀刻介电膜的未蚀刻部分，然后在低压区域再次干法蚀刻第一铂层，形成由 半导体集成电路芯片中的顶部电极，电容绝缘层和底部电极。 使用该制造方法可以防止由于在绝缘层上的过度蚀刻而使用厚的抗蚀剂引起的定义的劣化以及诸如晶体管的电路元件的操作故障。