Switch Element and Load Driving Device
    2.
    发明申请

    公开(公告)号:US20180218936A1

    公开(公告)日:2018-08-02

    申请号:US15741614

    申请日:2016-07-01

    摘要: It is an object of the present invention to provide a switch element and a load driving apparatus capable of suppressing a characteristic change of an on-resistance without lowering an off-breakdown voltage. The switching element includes a control electrode, an active element region, and an inactive element region, and the active element region and the inactive element region are formed adjacent to each other on the control electrode. Alternatively, in the load driving apparatus including a current driving switch element and a current detecting switch element that is connected in parallel to the load driving switch element and that detects an energization current of the load driving switch element, the current detecting switch element includes at least a control electrode, an active element region, and an inactive element region, and the active element region and the inactive element region are formed adjacent to each other on the control electrode.

    Semiconductor Device
    3.
    发明申请

    公开(公告)号:US20190260371A1

    公开(公告)日:2019-08-22

    申请号:US16314783

    申请日:2017-07-07

    IPC分类号: H03K17/082 H01L27/02

    摘要: A semiconductor device capable of enhancing uniformity of temperatures of transistors in an active clamp state while maintaining current performance is provided. A power transistor is connected to a power transistor in parallel. An active clamp circuit is provided in a path from a connection point between the power transistors to a gate of the power transistor and is conducted in a case where a voltage of the connection point exceeds a first threshold. An active clamp cutoff circuit is provided in a path from the active clamp circuit to a gate of the power transistor and cuts off or suppresses a current flowing into the path.

    Electronic Control Unit
    5.
    发明申请

    公开(公告)号:US20200211745A1

    公开(公告)日:2020-07-02

    申请号:US16624415

    申请日:2018-04-19

    摘要: An object is to provide a new electronic control unit that can improve detection accuracy of a sense current even in a region where the current value of the sense current is small. Provided is a sense current detection unit including a plurality of sense transistors that have different current flow rates and that are connected to current output transistors controlling a current flowing in a coil load. The current in the sense current detection unit is input to an analog/digital converter, and the current value of the current flowing in the sense current detection unit is converted into a digital value. The current value of the current flowing in the sense current detection unit is increased through a combination or a selection of the plurality of sense transistors of the sense current detection unit in a region where the current value of the main current of the current output transistors is small compared to a region where the current value of the main current is large.

    SEMICONDUCTOR DEVICE
    7.
    发明申请

    公开(公告)号:US20210233935A1

    公开(公告)日:2021-07-29

    申请号:US16972130

    申请日:2019-04-23

    IPC分类号: H01L27/12

    摘要: Provided are a semiconductor device having small characteristic variations with time and high reliability and an in-vehicle control device using the same, the semiconductor device including a plurality of transistor elements constituting a current mirror circuit or a differential amplifier circuit that requires high relative accuracy. A semiconductor device includes a first metal-oxide-semiconductor (MOS) transistor, a second MOS transistor paired with the first MOS transistor, and insulation separation walls which insulate and separate elements from each other, wherein relative characteristics of the first MOS transistor and the second MOS transistor are in a predetermined range, the first MOS transistor and the second MOS transistor are relatively arranged in a gate width direction or a gate length direction, and distances between gate oxide films of the first MOS transistor and the second MOS transistor and the insulation separation walls facing the gate oxide films are the same as each other in a direction perpendicular to the gate width direction or the gate length direction.

    SEMICONDUCTOR DEVICE
    8.
    发明申请

    公开(公告)号:US20200227409A1

    公开(公告)日:2020-07-16

    申请号:US16624166

    申请日:2018-04-16

    IPC分类号: H01L27/088 G05F1/567

    摘要: Restraining a reduction in an electric current detection accuracy, which is due to the temperature difference between an output MOS transistor and a sense MOS transistor, and easing a limitation on the layout of the sense MOS transistor. A semiconductor device includes: an output MOS transistor that has an output transistor portion including a source, a gate, and a drain formed on a semiconductor chip, and outputs an electric current for driving an external load; and a sense MOS transistor that has a sense transistor portion including a source, a gate, and a drain formed on the semiconductor chip, and having a width equal to a transverse width of the output transistor portion, and that detects the electric current output from the output MOS transistor.

    Semiconductor Device
    9.
    发明申请
    Semiconductor Device 审中-公开
    半导体器件

    公开(公告)号:US20160276477A1

    公开(公告)日:2016-09-22

    申请号:US15034286

    申请日:2014-10-22

    发明人: Shinichirou WADA

    摘要: To provide a high-withstand-voltage lateral semiconductor device in which ON-resistance or drain current density is uniform at an end portion and a center portion of the device in a gate width direction. A lateral N-type MOS transistor 11 formed on an SOI substrate includes a trench isolation structure 10b filled with an insulating film at an end portion of the transistor. An anode region 6 of a diode 12 is provided adjacent to a P-type body region 1 of the transistor through the trench isolation structure 10b and a cathode region 15 of the diode 12 is also provided adjacent to an N-type drain-drift region 4 of the transistor through the trench isolation structure 10b so as to cause electric field to be applied to the trench isolation structure 10b to be zero when a voltage is applied across the transistor.

    摘要翻译: 提供在栅极宽度方向上的器件的端部和中心部分的导通电阻或漏极电流密度均匀的高耐压侧向半导体器件。 形成在SOI衬底上的横向N型MOS晶体管11包括在晶体管的端部填充有绝缘膜的沟槽隔离结构10b。 二极管12的阳极区域6通过沟槽隔离结构10b与晶体管的P型体区域1相邻设置,并且二极管12的阴极区域15也邻近N型漏极漂移区域 4,通过沟槽隔离结构10b,以便当跨越晶体管施加电压时,使电场施加到沟槽隔离结构10b为零。