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11 条记录 (耗时 0.023 秒)

    Image sensors and methods of operating the same
    2.
    发明申请
    Image sensors and methods of operating the same 有权
    图像传感器及其操作方法

    公开(公告)号：US20110108704A1

    公开(公告)日：2011-05-12

    申请号：US12805723

    申请日：2010-08-17

    申请人： Ho-jung Kim ,  U-in Chung ,  Jai-kwang Shin ,  Sun-il Kim ,  I-hun Song ,  Chang-jung Kim ,  Sang-hun Jeon

    发明人： Ho-jung Kim ,  U-in Chung ,  Jai-kwang Shin ,  Sun-il Kim ,  I-hun Song ,  Chang-jung Kim ,  Sang-hun Jeon

    IPC分类号： H01L27/146 ,  H01L31/09 ,  H01L31/101 ,  H01L31/102

    CPC分类号： H04N9/045 ,  H01L27/14643 ,  H04N5/3745

    摘要： Image sensors and methods of operating the same. An image sensor includes a pixel array including a plurality of pixels. Each of the plurality of pixels includes a photo sensor, the voltage-current characteristics of which vary according to energy of incident light, and that generates a sense current determined by the energy of the incident light; a reset unit that is activated to generate a reference current, according to a reset signal for resetting at least one of the plurality of pixels; and a conversion unit that converts the sense current and the reference current into a sense voltage and a reference voltage, respectively.

    摘要翻译： 图像传感器及其操作方法。 图像传感器包括包括多个像素的像素阵列。 多个像素中的每一个包括光电传感器，其电压 - 电流特性根据入射光的能量而变化，并且产生由入射光的能量确定的感测电流; 根据用于复位所述多个像素中的至少一个的复位信号，被激活以产生参考电流的复位单元; 以及转换单元，其将感测电流和参考电流分别转换为感测电压和参考电压。

    Semiconductor device and method of operating the semiconductor device
    4.
    发明授权
    Semiconductor device and method of operating the semiconductor device 有权
    半导体器件及半导体器件的操作方法

    公开(公告)号：US08638163B2

    公开(公告)日：2014-01-28

    申请号：US13550848

    申请日：2012-07-17

    申请人： Ho-jung Kim ,  U-in Chung ,  Jai-kwang Shin

    发明人： Ho-jung Kim ,  U-in Chung ,  Jai-kwang Shin

    IPC分类号： G05F1/10

    CPC分类号： H01L29/78684 ,  G11C29/12005

    摘要： A semiconductor device and a method of operating the semiconductor device. The semiconductor device includes a voltage generator configured to generate a test voltage, a graphene transistor configured to receive a gate-source voltage based on the test voltage, and a detector configured to detect whether the gate-source voltage is a Dirac voltage of the graphene transistor, and output a feedback signal applied to the voltage generator indicating whether the gate-source voltage is the Dirac voltage.

    摘要翻译： 一种半导体器件和操作半导体器件的方法。 半导体器件包括被配置为产生测试电压的电压发生器，被配置为基于测试电压接收栅极 - 源极电压的石墨烯晶体管，以及检测器，被配置为检测栅极 - 源极电压是否为石墨烯的狄拉克电压 并输出施加到电压发生器的反馈信号，指示栅极 - 源极电压是否为狄拉克电压。

    SEMICONDUCTOR DEVICE AND METHOD OF OPERATING THE SEMICONDUCTOR DEVICE
    5.
    发明申请
    SEMICONDUCTOR DEVICE AND METHOD OF OPERATING THE SEMICONDUCTOR DEVICE 有权
    半导体器件和操作半导体器件的方法

    公开(公告)号：US20130069714A1

    公开(公告)日：2013-03-21

    申请号：US13550848

    申请日：2012-07-17

    申请人： Ho-jung Kim ,  U-in Chung ,  Jai-kwang Shin

    发明人： Ho-jung Kim ,  U-in Chung ,  Jai-kwang Shin

    IPC分类号： G05F1/10

    CPC分类号： H01L29/78684 ,  G11C29/12005

    摘要： A semiconductor device and a method of operating the semiconductor device. The semiconductor device includes a voltage generator configured to generate a test voltage, a graphene transistor configured to receive a gate-source voltage based on the test voltage, and a detector configured to detect whether the gate-source voltage is a Dirac voltage of the graphene transistor, and output a feedback signal applied to the voltage generator indicating whether the gate-source voltage is the Dirac voltage.

    摘要翻译： 一种半导体器件和操作半导体器件的方法。 半导体器件包括被配置为产生测试电压的电压发生器，被配置为基于测试电压接收栅极 - 源极电压的石墨烯晶体管，以及检测器，被配置为检测栅极 - 源极电压是否为石墨烯的狄拉克电压 并输出施加到电压发生器的反馈信号，指示栅极 - 源极电压是否为狄拉克电压。

    Method Of Manufacturing High Electron Mobility Transistor
    7.
    发明申请
    Method Of Manufacturing High Electron Mobility Transistor 有权
    制造高电子迁移率晶体管的方法

    公开(公告)号：US20110212582A1

    公开(公告)日：2011-09-01

    申请号：US13017361

    申请日：2011-01-31

    申请人： Ki-ha Hong ,  U-in Chung ,  Jai-kwang Shin ,  Jae-joon Oh ,  Jong-seob Kim ,  Hyuk-soon Choi ,  In-jun Hwang

    发明人： Ki-ha Hong ,  U-in Chung ,  Jai-kwang Shin ,  Jae-joon Oh ,  Jong-seob Kim ,  Hyuk-soon Choi ,  In-jun Hwang

    IPC分类号： H01L21/335

    CPC分类号： H01L29/402 ,  H01L29/0891 ,  H01L29/66462 ,  H01L29/7786

    摘要： A method of manufacturing a High Electron Mobility Transistor (HEMT) may include forming first and second material layers having different lattice constants on a substrate, forming a source, a drain, and a gate on the second material layer, and changing the second material layer between the gate and the drain into a different material layer, or changing a thickness of the second material layer, or forming a p-type semiconductor layer on the second material layer. The change in the second material layer may occur in an entire region of the second material layer between the gate and the drain, or only in a partial region of the second material layer adjacent to the gate. The p-type semiconductor layer may be formed on an entire top surface of the second material layer between the gate and the drain, or only on a partial region of the top surface adjacent to the gate.

    摘要翻译： 制造高电子迁移率晶体管（HEMT）的方法可以包括在衬底上形成具有不同晶格常数的第一和第二材料层，在第二材料层上形成源极，漏极和栅极，以及改变第二材料层 在栅极和漏极之间形成不同的材料层，或改变第二材料层的厚度，或在第二材料层上形成p型半导体层。 第二材料层的变化可以在栅极和漏极之间的第二材料层的整个区域中发生，或者仅在与栅极相邻的第二材料层的部分区域中发生。 p型半导体层可以形成在栅极和漏极之间的第二材料层的整个顶表面上，或者仅形成在与栅极相邻的顶表面的部分区域上。

    Wire forming method for semiconductor device
    8.
    发明授权
    Wire forming method for semiconductor device 失效
    半导体器件的成线方法

    公开(公告)号：US5604156A

    公开(公告)日：1997-02-18

    申请号：US560913

    申请日：1995-11-20

    申请人： U-in Chung ,  Jae-duk Kim ,  Chang-ki Hong

    发明人： U-in Chung ,  Jae-duk Kim ,  Chang-ki Hong

    IPC分类号： H01L21/28 ,  H01L21/304 ,  H01L21/306 ,  H01L21/3205 ,  H01L21/768 ,  H01L23/532 ,  H01L21/44

    CPC分类号： H01L21/76831 ,  H01L21/76807 ,  H01L21/76843 ,  H01L21/76877 ,  H01L23/53238 ,  H01L23/53257 ,  H01L23/5329 ,  H01L2924/0002

    摘要： A wire forming method for a semiconductor device includes the steps of depositing an insulation material on a semiconductor substrate and patterning the insulation material to form a first insulation layer, forming a lower capping layer on the first insulation layer, etching the lower capping layer and the first insulation layer to form a first contact hole that exposes a first part of the semiconductor substrate, forming a wire layer over the capping layer and the first part of the semiconductor substrate, performing a chemical and mechanical polishing (CMP) process with respect to the wire layer and the lower capping layer to expose the first insulation layer, forming a second insulation layer over the wire layer and the first insulation layer, and etching the first and second insulation layers to form a second contact hole that exposes a second part of the semiconductor substrate. The wire forming method can prevent the lifting of the wire layer, the splitting of the lower insulation layer, and the formation of a protrusion n the second contact hole.

    摘要翻译： 一种用于半导体器件的线形成方法包括以下步骤：在半导体衬底上沉积绝缘材料并图案化绝缘材料以形成第一绝缘层，在第一绝缘层上形成下覆盖层，蚀刻下封盖层和 第一绝缘层以形成暴露半导体衬底的第一部分的第一接触孔，在覆盖层和半导体衬底的第一部分上方形成引线层，对相对于第二绝缘层进行化学和机械抛光（CMP）处理 线层和下覆盖层以暴露第一绝缘层，在导线层和第一绝缘层上形成第二绝缘层，并蚀刻第一和第二绝缘层以形成第二接触孔，其暴露第二绝缘层的第二部分 半导体衬底。 线形成方法可以防止线层的提升，下绝缘层的分离，以及在第二接触孔处形成突起。