公开(公告)号：US08450850B2

公开(公告)日：2013-05-28

申请号：US13193413

申请日：2011-07-28

申请人： Hong Long Ning ,  Chang-Oh Jeong ,  Ji-Young Park ,  Sang-Gab Kim ,  Sung-Haeng Cho ,  Yeon-Hong Kim ,  Jin-Su Byun

发明人： Hong Long Ning ,  Chang-Oh Jeong ,  Ji-Young Park ,  Sang-Gab Kim ,  Sung-Haeng Cho ,  Yeon-Hong Kim ,  Jin-Su Byun

IPC分类号： H01L23/52

CPC分类号： H01L29/458 ,  B82Y10/00 ,  B82Y30/00 ,  H01L21/76877 ,  H01L27/124 ,  H01L29/41733 ,  H01L29/78684 ,  H01L51/0048 ,  H01L2221/1094

摘要： Provided are a thin-film transistor (TFT) substrate and a method of manufacturing the same. The method includes: forming a passivation film by forming an insulating film on a substrate; forming a photoresist pattern by forming a photoresist film on the passivation film, exposing the photoresist film to light, and developing the photoresist film; performing a first dry-etching by dry-etching the passivation film using the photoresist pattern as an etch mask; performing a baking to reduce a size of the photoresist pattern; performing a second dry-etching to form a contact hole by dry-etching the passivation film again using the photoresist pattern as a mask; removing the photoresist pattern; and forming a pixel electrode of a carbon composition that includes carbon nanotubes and/or graphene on a top surface of the passivation film.

摘要翻译： 提供一种薄膜晶体管（TFT）基板及其制造方法。 该方法包括：通过在基板上形成绝缘膜来形成钝化膜; 通过在钝化膜上形成光致抗蚀剂膜形成光致抗蚀剂图案，将光致抗蚀剂膜曝光并使光致抗蚀剂膜显影; 通过使用光致抗蚀剂图案作为蚀刻掩模来干蚀刻钝化膜来执行第一干蚀刻; 进行烘烤以减小光致抗蚀剂图案的尺寸; 通过使用光致抗蚀剂图案作为掩模再次干蚀刻钝化膜来进行第二次干蚀刻以形成接触孔; 去除光致抗蚀剂图案; 以及在钝化膜的顶表面上形成包括碳纳米管和/或石墨烯的碳组合物的像素电极。

公开(公告)号：US20120112346A1

公开(公告)日：2012-05-10

申请号：US13193413

申请日：2011-07-28

申请人： Hong Long NING ,  Chang-Oh Jeong ,  Ji-Young Park ,  Sang-Gab Kim ,  Sung-Haeng Cho ,  Yeon-Hong Kim ,  Jin-Su Byun

发明人： Hong Long NING ,  Chang-Oh Jeong ,  Ji-Young Park ,  Sang-Gab Kim ,  Sung-Haeng Cho ,  Yeon-Hong Kim ,  Jin-Su Byun

IPC分类号： H01L23/532 ,  B82Y40/00 ,  B82Y20/00 ,  H01L21/768

CPC分类号： H01L29/458 ,  B82Y10/00 ,  B82Y30/00 ,  H01L21/76877 ,  H01L27/124 ,  H01L29/41733 ,  H01L29/78684 ,  H01L51/0048 ,  H01L2221/1094

摘要： Provided are a thin-film transistor (TFT) substrate and a method of manufacturing the same. The method includes: forming a passivation film by forming an insulating film on a substrate; forming a photoresist pattern by forming a photoresist film on the passivation film, exposing the photoresist film to light, and developing the photoresist film; performing a first dry-etching by dry-etching the passivation film using the photoresist pattern as an etch mask; performing a baking to reduce a size of the photoresist pattern; performing a second dry-etching to form a contact hole by dry-etching the passivation film again using the photoresist pattern as a mask; removing the photoresist pattern; and forming a pixel electrode of a carbon composition that includes carbon nanotubes and/or graphene on a top surface of the passivation film.

摘要翻译： 提供一种薄膜晶体管（TFT）基板及其制造方法。 该方法包括：通过在基板上形成绝缘膜来形成钝化膜; 通过在钝化膜上形成光致抗蚀剂膜形成光致抗蚀剂图案，将光致抗蚀剂膜曝光并使光致抗蚀剂膜显影; 通过使用光致抗蚀剂图案作为蚀刻掩模来干蚀刻钝化膜来执行第一干蚀刻; 进行烘烤以减小光致抗蚀剂图案的尺寸; 通过使用光致抗蚀剂图案作为掩模再次干蚀刻钝化膜来进行第二次干蚀刻以形成接触孔; 去除光致抗蚀剂图案; 以及在钝化膜的顶表面上形成包括碳纳米管和/或石墨烯的碳组合物的像素电极。

公开(公告)号：US08755019B2

公开(公告)日：2014-06-17

申请号：US13193488

申请日：2011-07-28

申请人： Ji-Young Park ,  Sang Gab Kim ,  Yong-Mo Choi ,  Hyung Jun Kim ,  Sung-Haeng Cho ,  Hong-Sick Park ,  Byeong-Jin Lee ,  Soo-Wan Yoon

发明人： Ji-Young Park ,  Sang Gab Kim ,  Yong-Mo Choi ,  Hyung Jun Kim ,  Sung-Haeng Cho ,  Hong-Sick Park ,  Byeong-Jin Lee ,  Soo-Wan Yoon

IPC分类号： G02F1/1339 ,  G02F1/13

CPC分类号： H01L27/1288 ,  G02F1/1362 ,  G02F2001/136231 ,  H01L29/41733

摘要： A method of manufacturing a liquid crystal display includes: forming a gate line including a gate electrode on a first substrate; forming a gate insulating layer on the gate line; sequentially forming a semiconductor layer, an amorphous silicon layer, and a data metal layer on the entire surface of the gate insulating layer; aligning the edges of the semiconductor layer and the data metal layer; forming a transparent conductive layer on the gate insulating layer and the data metal layer; forming a first pixel electrode and a second pixel electrode by patterning the transparent conductive layer; and forming a data line including a source electrode, a drain electrode, and an ohmic contact layer by etching the data metal layer and the amorphous silicon layer, using the first pixel electrode and the second pixel electrode as a mask, and exposing the semiconductor between the source electrode and the drain electrode.

摘要翻译： 制造液晶显示器的方法包括：在第一基板上形成包括栅电极的栅极线; 在栅极线上形成栅极绝缘层; 在栅极绝缘层的整个表面上依次形成半导体层，非晶硅层和数据金属层; 对准半导体层和数据金属层的边缘; 在栅绝缘层和数据金属层上形成透明导电层; 通过图案化透明导电层形成第一像素电极和第二像素电极; 以及使用所述第一像素电极和所述第二像素电极作为掩模，通过蚀刻所述数据金属层和所述非晶硅层来形成包括源电极，漏电极和欧姆接触层的数据线，并且使所述半导体在 源电极和漏电极。

公开(公告)号：US20120133873A1

公开(公告)日：2012-05-31

申请号：US13193488

申请日：2011-07-28

申请人： Ji-Young PARK ,  Sang Gab Kim ,  Yong-Mo Choi ,  Hyung Jun Kim ,  Sung-Haeng Cho ,  Hong-Sick Park ,  Byeong-Jin Lee ,  Soo-Wan Yoon

发明人： Ji-Young PARK ,  Sang Gab Kim ,  Yong-Mo Choi ,  Hyung Jun Kim ,  Sung-Haeng Cho ,  Hong-Sick Park ,  Byeong-Jin Lee ,  Soo-Wan Yoon

IPC分类号： G02F1/1333 ,  H01L33/16

CPC分类号： H01L27/1288 ,  G02F1/1362 ,  G02F2001/136231 ,  H01L29/41733

摘要： A method of manufacturing a liquid crystal display includes: forming a gate line including a gate electrode on a first substrate; forming a gate insulating layer on the gate line; sequentially forming a semiconductor layer, an amorphous silicon layer, and a data metal layer on the entire surface of the gate insulating layer; aligning the edges of the semiconductor layer and the data metal layer; forming a transparent conductive layer on the gate insulating layer and the data metal layer; forming a first pixel electrode and a second pixel electrode by patterning the transparent conductive layer; and forming a data line including a source electrode, a drain electrode, and an ohmic contact layer by etching the data metal layer and the amorphous silicon layer, using the first pixel electrode and the second pixel electrode as a mask, and exposing the semiconductor between the source electrode and the drain electrode.

摘要翻译： 制造液晶显示器的方法包括：在第一基板上形成包括栅电极的栅极线; 在栅极线上形成栅极绝缘层; 在栅极绝缘层的整个表面上依次形成半导体层，非晶硅层和数据金属层; 对准半导体层和数据金属层的边缘; 在栅绝缘层和数据金属层上形成透明导电层; 通过图案化透明导电层形成第一像素电极和第二像素电极; 以及使用所述第一像素电极和所述第二像素电极作为掩模，通过蚀刻所述数据金属层和所述非晶硅层来形成包括源电极，漏电极和欧姆接触层的数据线，并且使所述半导体在 源电极和漏电极。

公开(公告)号：US07838886B2

公开(公告)日：2010-11-23

申请号：US12401959

申请日：2009-03-11

申请人： Dong-Gyu Kim ,  Sung-Haeng Cho ,  Hyung-Jun Kim ,  Sung-Ryul Kim ,  Yong-Mo Choi

发明人： Dong-Gyu Kim ,  Sung-Haeng Cho ,  Hyung-Jun Kim ,  Sung-Ryul Kim ,  Yong-Mo Choi

IPC分类号： H01L29/04

CPC分类号： G02F1/136213 ,  H01L27/1255

摘要： A thin film transistor array panel, in which a middle storage electrode and a storage electrode overlapping a drain electrode of a thin film transistor thereby forming a storage capacitance are formed. Accordingly, sufficient storage capacitance may be formed without a decrease of the aperture ratio and fight transmittance of a liquid crystal display. Also, the capacitance may be sufficiently formed through the connecting member connected to a gate metal layer.

摘要翻译： 一种薄膜晶体管阵列面板，其中形成中间存储电极和与薄膜晶体管的漏极重叠从而形成存储电容的存储电极。 因此，可以形成足够的存储电容，而不会降低开口率并且防止液晶显示器的透射率。 此外，可以通过连接到栅极金属层的连接构件充分形成电容。

公开(公告)号：US08735890B2

公开(公告)日：2014-05-27

申请号：US13328658

申请日：2011-12-16

申请人： Ki-Won Kim ,  Je-Hun Lee ,  Sung-Haeng Cho ,  Woo-Geun Lee ,  Kap-Soo Yoon ,  Do-Hyun Kim ,  Seung-Ha Choi

发明人： Ki-Won Kim ,  Je-Hun Lee ,  Sung-Haeng Cho ,  Woo-Geun Lee ,  Kap-Soo Yoon ,  Do-Hyun Kim ,  Seung-Ha Choi

IPC分类号： H01L29/786

CPC分类号： H01L27/1225 ,  H01L27/1288

摘要： In a display substrate and a method of manufacturing the display substrate, the display substrate includes a data line, a channel pattern, an insulating pattern and a pixel electrode. The data line extends in a direction on a base substrate. The channel pattern is disposed in a separate region between an input electrode connected to the data line and an output electrode spaced apart from the input electrode. The channel pattern makes contact with the input electrode and the output electrode on the input and output electrodes. The insulating pattern is spaced apart from the channel pattern on the base substrate and includes a contact hole exposing the output electrode. The pixel electrode is formed on the insulating pattern to make contact with the output electrode through the contact hole. Thus, a damage of the oxide semiconductor layer may be minimized and a manufacturing process may be simplified.

摘要翻译： 在显示基板和显示基板的制造方法中，显示基板包括数据线，通道图案，绝缘图案和像素电极。 数据线沿着基底基板上的方向延伸。 通道图案设置在与数据线连接的输入电极和与输入电极间隔开的输出电极之间的分离区域中。 通道图案与输入电极和输出电极上的输出电极接触。 绝缘图案与基底基板上的沟道图案间隔开，并且包括暴露输出电极的接触孔。 像素电极形成在绝缘图案上，以通过接触孔与输出电极接触。 因此，可以使氧化物半导体层的损伤最小化，并且可以简化制造工艺。

公开(公告)号：US07915689B2

公开(公告)日：2011-03-29

申请号：US12260464

申请日：2008-10-29

申请人： Sung-Haeng Cho ,  Ki-Hun Jeong ,  Jun-Ho Song ,  Joo-Han Kim ,  Hyung-Jun Kim ,  Seung-Hwan Shim

发明人： Sung-Haeng Cho ,  Ki-Hun Jeong ,  Jun-Ho Song ,  Joo-Han Kim ,  Hyung-Jun Kim ,  Seung-Hwan Shim

IPC分类号： H01L29/786

CPC分类号： H01L29/66765 ,  G02F1/13454 ,  H01L27/1229 ,  H01L27/1288 ,  H01L29/04 ,  H01L29/78696

摘要： A thin film transistor, a display device, and a manufacturing method thereof. The thin film transistor includes a control electrode, a semiconductor overlapping the control electrode, and an input electrode and an output electrode disposed on or under the semiconductor and opposite to each other. The semiconductor includes a first portion disposed between the input electrode and the output electrode and having a first crystallinity, and a second portion connected with the first portion, which overlaps the input electrode or the output electrode, and having a second crystallinity. The first crystallinity is higher than the second crystallinity.

摘要翻译： 薄膜晶体管，显示装置及其制造方法。 薄膜晶体管包括控制电极，与控制电极重叠的半导体，以及设置在半导体上或其下方并且彼此相对的输入电极和输出电极。 半导体包括设置在输入电极和输出电极之间并具有第一结晶度的第一部分和与第一部分连接的与输入电极或输出电极重叠并具有第二结晶度的第二部分。 第一结晶度高于第二结晶度。

公开(公告)号：US20100270552A1

公开(公告)日：2010-10-28

申请号：US12571323

申请日：2009-09-30

申请人： Ki-Yong Song ,  Sung-Haeng Cho ,  Jae-Hong Kim ,  Sung-Hen Cho ,  Yong-Mo Choi ,  Hyung-Jun Kim ,  Sung-Ryul Kim ,  Byeong-Hoon Cho ,  O-Sung Seo ,  Seong-Hun Kim

发明人： Ki-Yong Song ,  Sung-Haeng Cho ,  Jae-Hong Kim ,  Sung-Hen Cho ,  Yong-Mo Choi ,  Hyung-Jun Kim ,  Sung-Ryul Kim ,  Byeong-Hoon Cho ,  O-Sung Seo ,  Seong-Hun Kim

IPC分类号： H01L33/00 ,  B32B37/00 ,  C23F1/00

CPC分类号： C23C18/1608 ,  C23C18/31 ,  H01L21/0271 ,  H01L27/124 ,  H01L27/1288 ,  H01L29/41733 ,  H01L29/458 ,  Y10T156/10

摘要： A protrusion of dry-etched pattern of a thin film transistor substrate generated due to a difference between isotropy of wet etching and anisotropy of dry etching is removed by forming a plating part on a surface of the wet etched pattern through an electroless plating method. If the plating part is formed on a data pattern layer of the substrate, the width or the thickness of the data pattern layer may be increased without loss of aperture ratio, the channel length of the semiconductor layer may be reduced under the limit according to the stepper resolution and the protrusion part of the semiconductor layer may be removed. As a result, the aperture ratio may be increased, the resistance may be reduced, and the driving margin may be increased due to rising of the ion current. Furthermore, the so-called water-fall noise phenomenon may be eliminated.

摘要翻译： 通过化学镀法在湿蚀刻图案的表面上形成电镀部分，可以消除由于湿蚀刻的各向同性和干蚀刻的各向异性而产生的薄膜晶体管基板的干蚀刻图案的突起。 如果电镀部分形成在基板的数据图案层上，则数据图形层的宽度或厚度可以增加而不损失开口率，半导体层的沟道长度可以在根据 可以去除步进分辨率和半导体层的突起部分。 结果，可以增加开口率，可以降低电阻，并且由于离子电流的上升可能增加驱动裕度。 此外，可以消除所谓的水落噪声现象。

公开(公告)号：US08952876B2

公开(公告)日：2015-02-10

申请号：US12900846

申请日：2010-10-08

申请人： Hyung-Jun Kim ,  Sung-Haeng Cho ,  Yong-Mo Choi

发明人： Hyung-Jun Kim ,  Sung-Haeng Cho ,  Yong-Mo Choi

IPC分类号： G09G3/36 ,  G11C19/28 ,  G02F1/1362 ,  G11C19/18

CPC分类号： G11C19/28 ,  G02F1/1362 ,  G02F2202/104 ,  G11C19/184

摘要： A display substrate includes a base substrate, a first insulating layer formed on a base substrate, a pixel including a pixel electrode having the first insulating layer, and a circuit including a circuit transistor disposed on a peripheral area to drive the pixel. The pixel includes a first channel formed on the base substrate having the first insulating layer formed thereon. The first channel includes a poly-silicon layer, a first source electrode and a first drain electrode formed on the first channel that are spaced apart from each other, and a first gate electrode formed on the first source electrode and the first drain electrode corresponding to the first channel which is formed of the transparent conductive material. The poly-silicon layer is formed at a front channel portion of the first channel proximal to the first gate electrode through the first gate electrode.

摘要翻译： 显示基板包括基底基板，形成在基底基板上的第一绝缘层，包括具有第一绝缘层的像素电极的像素，以及包括设置在外围区域上以驱动像素的电路晶体管的电路。 像素包括形成在其上形成有第一绝缘层的基底基板上的第一通道。 第一通道包括形成在第一通道上彼此间隔开的多晶硅层，第一源电极和第一漏极，以及形成在第一源电极和第一漏电极上的第一栅电极， 由透明导电材料形成的第一通道。 多晶硅层通过第一栅电极形成在靠近第一栅电极的第一通道的前通道部分处。

公开(公告)号：US08598577B2

公开(公告)日：2013-12-03

申请号：US13177783

申请日：2011-07-07

申请人： Jae-Woo Park ,  Dong-Hoon Lee ,  Sung-Haeng Cho ,  Woo-Geun Lee ,  Hye-Young Ryu ,  Young-Joo Choi

发明人： Jae-Woo Park ,  Dong-Hoon Lee ,  Sung-Haeng Cho ,  Woo-Geun Lee ,  Hye-Young Ryu ,  Young-Joo Choi

IPC分类号： H01L29/786

CPC分类号： H01L27/1288 ,  H01L27/1214 ,  H01L27/1225 ,  H01L27/124 ,  H01L29/458

摘要： A display substrate includes a gate line extending in a first direction on a base substrate, a data line on the base substrate and extending in a second direction crossing the first direction, a gate insulating layer on the gate line, a thin-film transistor and a pixel electrode. The thin-film transistor includes a gate electrode electrically connected the gate line, an oxide semiconductor pattern, and source and drain electrodes on the oxide semiconductor pattern and spaced apart from each other. The oxide semiconductor pattern includes a first semiconductor pattern including indium oxide and a second semiconductor pattern including indium-free oxide. The pixel electrode is electrically connected the drain electrode.

摘要翻译： 显示基板包括在基底基板上沿第一方向延伸的栅极线，在基底基板上的数据线，并且沿与第一方向交叉的第二方向延伸，栅极线上的栅极绝缘层，薄膜晶体管和 像素电极。 薄膜晶体管包括栅电极，电极连接栅极线，氧化物半导体图案以及氧化物半导体图案上的源电极和漏电极并彼此间隔开。 氧化物半导体图案包括包括氧化铟的第一半导体图案和包含无铟氧化物的第二半导体图案。 像素电极与漏电极电连接。