Abstract:
The mechanisms of using an interposer frame to package a semiconductor die enables fan-out structures and reduces form factor for the packaged semiconductor die. The mechanisms involve using a molding compound to attach the semiconductor die to the interposer frame and forming a redistribution layer on one or both sides of the semiconductor die. The redistribution layer(s) in the package enables fan-out connections and formation of external connection structures. Conductive columns in the interposer frame assist in thermal management.
Abstract:
Embodiments of mechanisms for flattening a packaged structure are provided. The mechanisms involve a flattening apparatus and the utilization of protection layer(s) between the packaged structure and the surface(s) of the flattening apparatus. The protection layer(s) is made of a soft and non-sticking material to allow protecting exposed fragile elements of the packaged structure and easy separation after processing. The embodiments of flattening process involve flattening the warped packaged structure by pressure under elevated processing temperature. Processing under elevated temperature allows the package structure to be flattened within a reasonable processing time.
Abstract:
Nowadays, electronic product designs are aimed at saving, due to the trend to reduce energy consumption and carbon output. Ethernet technology has also been aimed specifically at saving energy; IEEE P802.3az standard (Energy Efficient Ethernet, EEE), for Ethernet released by Broadcom is one example. The disclosure turns off the phase-locked loop when the network communication stops, effectively saving the energy consumption of the network chip under the EEE standard. In the case of network reconnection, the disclosure turns on the phase-locked loop to start the network communication through adjusting the current of current source and the parameters of a low pass filter to increase the charging speed for the reference voltage generation of the low pass filter. The disclosure then shortens the start-up time to quickly output the standard output frequency and phase of the phase-locked loop.
Abstract:
A method for adjusting the warpage of a wafer, includes providing a wafer having a center portion and edge portions and providing a holding table having a holding area thereon for holding the wafer. The wafer is placed onto the holding table with the center portion higher than the edge portions and thereafter pressed onto the holding area such that the wafer is attracted to and held onto the holding table by self-suction force. The wafer is heated at a predetermined temperature and for a predetermined time in accordance with an amount of warpage of the wafer in order to achieve a substantially flat wafer or a predetermined wafer level.
Abstract:
A package on package structure providing mechanical strength and warpage control includes a first package component, a second package component, and a first set of conductive elements coupling the first package component to the second package component. A first polymer-comprising material is molded on the first package component and surrounds the first set of conductive elements. The first polymer-comprising material has an opening therein exposing a top surface of the second package component. A third package component and a second set of conductive elements couples the second package component to the third package component.