公开(公告)号：US20080160724A1

公开(公告)日：2008-07-03

申请号：US11945896

申请日：2007-11-27

申请人： Hyun-Jung SONG ,  Hak-Kyoon BYUN ,  Jong-Bo SHIM ,  Min-Ok NA

发明人： Hyun-Jung SONG ,  Hak-Kyoon BYUN ,  Jong-Bo SHIM ,  Min-Ok NA

IPC分类号： H01L21/304

CPC分类号： H01L21/6836 ,  B23K26/042 ,  B23K26/18 ,  B23K26/40 ,  B23K2103/50 ,  H01L21/02035 ,  H01L21/78 ,  H01L2221/68327

摘要： Provided is a method of dicing a wafer where a plurality of semiconductor device regions is formed on a front side of the wafer, the semiconductor device regions being separated by scribe lanes, the method comprising dicing the wafer by irradiating a laser beam on a backside of the wafer along the scribe lanes. A laser beam is irradiated from an opposite side of the semiconductor device regions of the wafer so that thermal influence on the semiconductor device regions is minimized to improve the strength of a semiconductor chip. Furthermore, a third tape is used to maintain an arrangement of the semiconductor chips so as to minimize adherence problems caused by the laser beam.

摘要翻译： 本发明提供一种切割晶片的方法，其中在晶片的正面形成有多个半导体器件区域，半导体器件区域被划线分隔开，该方法包括通过在背面侧照射激光束来对晶片进行切割 沿着划线的晶圆。 从晶片的半导体器件区域的相对侧照射激光束，使得对半导体器件区域的热影响最小化，以提高半导体芯片的强度。 此外，使用第三带来保持半导体芯片的布置，以便最小化由激光束引起的粘附问题。

公开(公告)号：US20080160725A1

公开(公告)日：2008-07-03

申请号：US11959299

申请日：2007-12-18

申请人： Hak-Kyoon BYUN ,  Hyun-Jung SONG ,  Jong-Bo SHIM

发明人： Hak-Kyoon BYUN ,  Hyun-Jung SONG ,  Jong-Bo SHIM

IPC分类号： H01L21/304 ,  H01L21/683

CPC分类号： H01L21/67132 ,  H01L21/6831 ,  H01L24/27 ,  H01L24/29 ,  H01L24/75 ,  H01L24/83 ,  H01L2224/75735 ,  H01L2224/83191 ,  H01L2924/14 ,  H01L2924/00

摘要： According to example embodiments, an apparatus for picking up a semiconductor die includes an electromagnetic collet unit configured to selectively generate an attractive force between the electromagnetic collet unit and a magnetic wafer adhesive tape disposed on a surface of the semiconductor die. The apparatus further includes a transfer head unit attached to the electromagnetic collet unit, the transfer head unit structured to move the semiconductor die picked up by the collet unit through a drive of a drive device.

摘要翻译： 根据示例性实施例，用于拾取半导体管芯的设备包括电磁夹头单元，其被配置为选择性地在电磁夹头单元和设置在半导体管芯的表面上的磁性晶片粘合带之间产生吸引力。 该装置还包括附接到电磁夹头单元的传送头单元，传送头单元构造成通过驱动装置的驱动来移动由夹头单元拾取的半导体管芯。

公开(公告)号：US20090085185A1

公开(公告)日：2009-04-02

申请号：US12238781

申请日：2008-09-26

申请人： Hak-Kyoon BYUN ,  Tae-Hun KIM ,  Sang-Uk HAN ,  Jung-Do LEE ,  Seon-Hyang YOU

发明人： Hak-Kyoon BYUN ,  Tae-Hun KIM ,  Sang-Uk HAN ,  Jung-Do LEE ,  Seon-Hyang YOU

IPC分类号： H01L23/538

CPC分类号： H01L25/105 ,  H01L24/73 ,  H01L25/0655 ,  H01L25/50 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2225/1023 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2924/15311 ,  H01L2924/3511 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： A stack-type semiconductor package, a method of forming the same, and an electronic system including the same are provided. The stack-type semiconductor package includes: a lower printed circuit board having a plurality of connection bumps disposed on an upper surface of the lower printed circuit board and a plurality of lower interconnections; at least one first lower chip sequentially stacked on the lower printed circuit board and electrically connected to the plurality of lower interconnections; a lower molding resin compound disposed on the lower printed circuit board and covering the first lower chips; a double-sided wiring board bonded to the lower molding resin compound and electrically connected to the connection bumps; and an upper chip package bonded to the double-sided wiring board and having upper bumps electrically connected to an interconnection pattern of the double-sided wiring board.

摘要翻译： 提供堆叠型半导体封装，其形成方法和包括该堆叠型半导体封装的电子系统。 堆叠型半导体封装包括：下印刷电路板，其具有设置在下印刷电路板的上表面上的多个连接凸块和多个下互连; 至少一个第一下部芯片，其顺序地堆叠在所述下部印刷电路板上并电连接到所述多个下部互连; 设置在下部印刷电路板上并覆盖第一下部芯片的下部成型树脂组合物; 与下模塑树脂复合物接合并与连接凸块电连接的双面布线板; 以及上芯片封装，其结合到所述双面布线板并且具有电连接到所述双面布线板的布线图案的上凸块。

公开(公告)号：US20120153499A1

公开(公告)日：2012-06-21

申请号：US13244506

申请日：2011-09-25

申请人： Hak-Kyoon BYUN ,  Dae-Young CHOI ,  Mi-Yeon KIM

发明人： Hak-Kyoon BYUN ,  Dae-Young CHOI ,  Mi-Yeon KIM

IPC分类号： H01L23/48

CPC分类号： H01L23/49827 ,  H01L23/3128 ,  H01L23/481 ,  H01L23/49816 ,  H01L23/49838 ,  H01L24/13 ,  H01L24/16 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/17179 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48095 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/1088 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01322 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/18161 ,  H01L2224/13099 ,  H01L2224/13599 ,  H01L2224/05599 ,  H01L2224/05099 ,  H01L2224/29099 ,  H01L2224/29599 ,  H01L2924/014 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor package and a package on package are provided. The semiconductor package includes a substrate; a semiconductor chip attached to a surface of the substrate; connecting conductors disposed on the surface of the substrate; a mold formed on the substrate and in which the connecting conductors and the semiconductor chip are provided; and connecting via holes extending through the mold and exposing the connecting conductors. With respect to a first connecting via hole of the connecting via holes, a planar distance between a first connecting conductor exposed by the first connecting via hole and an entrance of the first connecting via hole is not uniform.

摘要翻译： 提供半导体封装和封装封装。 半导体封装包括衬底; 安装在所述基板的表面上的半导体芯片; 设置在基板的表面上的连接导体; 形成在所述基板上并且设置有所述连接导体和所述半导体芯片的模具; 并且连接通过模具延伸的通孔并暴露连接导体。 对于连接通孔的第一连接通孔，由第一连接通孔露出的第一连接导体与第一连接通孔的入口之间的平面距离不均匀。