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公开(公告)号：US11227845B2
公开(公告)日：2022-01-18
申请号：US16991293
申请日：2020-08-12
发明人： Hyun Koo Lee , Sung Won Park , Jun Hee Park , Hyeon Uk Kim
IPC分类号： H01L23/64 , H01L23/31 , H01L23/373 , H01L23/495 , H01L21/48 , H01L21/56 , H01L23/00 , H02P27/06
摘要： A power module includes a substrate having a dielectric layer, a first power semiconductor device disposed on an upper part of the substrate, and a second power semiconductor device disposed on a lower part of the substrate.
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公开(公告)号：US20170216948A1
公开(公告)日：2017-08-03
申请号：US15213840
申请日：2016-07-19
发明人： Sung Won Park , Ki Young Jang , Hyun Koo Lee , Sung Min Park , Woo Yong Jeon , Jeong Min Son , Moo Soo Jeong , Mun Ki Ko
CPC分类号： B23K3/085 , B23K1/0016 , B23K3/087 , H01L2224/33
摘要： A soldering jig for double-faced cooling power modules is provided. The soldering jig prevents thermal deformation of a substrate during a soldering process. The soldering jig is used to fix the position of an upper substrate and a lower substrate when a semiconductor chip is disposed and soldered between the upper and lower substrates. The soldering jig includes a lower jig plate that is disposed under the lower substrate and fixes the position of lower substrate, an upper jig plate that is disposed over the upper substrate and compresses the upper substrate toward the lower substrate. Additionally, a connector which couples the lower jig plate and the upper jig plate, and an insert is installed on the connector and is disposed between the upper substrate and the lower substrate to maintain a constant distance between the upper substrate and the lower substrate during a soldering process.
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公开(公告)号：US20210183795A1
公开(公告)日：2021-06-17
申请号：US16991293
申请日：2020-08-12
发明人： Hyun Koo Lee , Sung Won Park , Jun Hee Park , Hyeon Uk Kim
IPC分类号： H01L23/64 , H01L23/00 , H01L23/31 , H01L23/373 , H01L23/495 , H01L21/48 , H01L21/56
摘要： A power module includes a substrate having a dielectric layer, a first power semiconductor device disposed on an upper part of the substrate, and a second power semiconductor device disposed on a lower part of the substrate.
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公开(公告)号：US11728239B2
公开(公告)日：2023-08-15
申请号：US17409348
申请日：2021-08-23
发明人： Hyeon Uk Kim , Jun Hee Park , Sung Won Park
IPC分类号： H01L23/373 , H01L23/367 , H01L23/31 , H01L23/495
CPC分类号： H01L23/3735 , H01L23/3675 , H01L23/3121 , H01L23/49575
摘要： An insulating substrate provided between the semiconductor chip and a cooler in the dual-side cooled power module includes: an inner metal layer configured to face the semiconductor chip; an outer metal layer configured to face the cooler; and an insulating layer interposed between the inner metal layer and the outer metal layer, wherein at least one inner thermal diffusion inductor of a plurality of inner thermal diffusion inductors is inserted into the inner metal layer.
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公开(公告)号：US20200343828A1
公开(公告)日：2020-10-29
申请号：US16580584
申请日：2019-09-24
发明人： Hyun Koo Lee , Sung Won Park , Hyeon Uk Kim
摘要： An inverter includes: an upper module having three switching elements, among switching elements defining three poles of a three-phase inverter, which are connected to a positive electrode on a first substrate; and a lower module having three switching elements, among the switching elements defining the three poles of the three-phase inverter, connected to a negative electrode on a second substrate. The upper module and the lower module are configured to be stacked on each other, and a positive terminal of the upper module and a negative terminal of the lower module are stacked so as to be opposite each other with an insulator placed therebetween.
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公开(公告)号：US20170338168A1
公开(公告)日：2017-11-23
申请号：US15287136
申请日：2016-10-06
发明人： Sung Won Park , Woo Yong Jeon , Jeong Min Son
IPC分类号： H01L23/495 , H01L23/40 , H02M7/00
CPC分类号： H01L23/49524 , H01L23/051 , H01L23/3107 , H01L23/4093 , H01L23/4334 , H01L23/49558 , H01L23/49562 , H01L23/49568 , H01L2224/33 , H01L2224/40245 , H01L2224/48091 , H01L2224/48998 , H01L2224/73265 , H02M7/003 , H05K7/209 , H01L2924/00014
摘要： A signal block and a double-faced cooling power module that uses the signal block is provided. The signal block includes a plurality of signal clips that are formed in a ribbon shape to connect a first signal pad formed on a semiconductor chip and a second signal pad formed on a signal lead frame. An insulator fixes the position of the plurality of signal clips while spacing the signal clips apart from each other.
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公开(公告)号：US20180007777A1
公开(公告)日：2018-01-04
申请号：US15332060
申请日：2016-10-24
发明人： Jeong Min Son , Sung Won Park
CPC分类号： H05K1/0203 , H01L23/29 , H01L23/3135 , H01L24/06 , H01L24/29 , H01L24/32 , H01L24/40 , H01L24/48 , H01L24/73 , H01L24/83 , H01L24/84 , H01L24/85 , H01L24/92 , H01L2224/04026 , H01L2224/04034 , H01L2224/04042 , H01L2224/06181 , H01L2224/2919 , H01L2224/32225 , H01L2224/32245 , H01L2224/40137 , H01L2224/40139 , H01L2224/40247 , H01L2224/48095 , H01L2224/48139 , H01L2224/48247 , H01L2224/73263 , H01L2224/73265 , H01L2224/83801 , H01L2224/8384 , H01L2224/8492 , H01L2224/8592 , H01L2224/92244 , H01L2224/92246 , H01L2924/13055 , H01L2924/13091 , H01L2924/1815 , H05K1/05 , H05K1/185 , H05K3/32 , H05K3/46 , H05K2201/10931 , H05K2201/10977 , H01L2924/00012
摘要： A power module is provided. The power module includes a substrate, a power conversion chip that is disposed on the substrate and an insulating film that is formed on a structure in which the power conversion chip is disposed on the substrate. Additionally, the power module includes a metal mold that encases the structure that is coated with the insulating film. Additionally, the power module provides a simplified structure and improved heat dissipation performance compared to conventional power modules.
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公开(公告)号：US12131975B2
公开(公告)日：2024-10-29
申请号：US17728881
申请日：2022-04-25
发明人： Hyeon Uk Kim , Hyun Koo Lee , Sung Won Park
IPC分类号： H01L23/367 , H01L21/56 , H01L23/46 , H01L23/58
CPC分类号： H01L23/3675 , H01L21/565 , H01L23/46 , H01L23/585
摘要： A power module that includes a semiconductor chip configured to generate heat, a metal layer electrically connected to the semiconductor chip to allow current to flow therethrough, a cooling channel facing the metal layer for dissipating heat out of the semiconductor chip, and a resin layer interposed between the metal layer and the cooling channel and integrally formed in an internal space of the power module.
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公开(公告)号：US20230352364A1
公开(公告)日：2023-11-02
申请号：US18348049
申请日：2023-07-06
发明人： Hyeon Uk Kim , Jun Hee Park , Sung Won Park
IPC分类号： H01L23/373 , H01L23/367
CPC分类号： H01L23/3735 , H01L23/3675 , H01L23/3121
摘要： An insulating substrate provided between the semiconductor chip and a cooler in the dual-side cooled power module includes: an inner metal layer configured to face the semiconductor chip; an outer metal layer configured to face the cooler; and an insulating layer interposed between the inner metal layer and the outer metal layer, wherein at least one inner thermal diffusion inductor of a plurality of inner thermal diffusion inductors is inserted into the inner metal layer.
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公开(公告)号：US09972559B2
公开(公告)日：2018-05-15
申请号：US15287136
申请日：2016-10-06
发明人： Sung Won Park , Woo Yong Jeon , Jeong Min Son
IPC分类号： H01L23/48 , H01L23/495 , H01L23/40 , H02M7/00 , H01L23/051 , H01L23/433
CPC分类号： H01L23/49524 , H01L23/051 , H01L23/3107 , H01L23/4093 , H01L23/4334 , H01L23/49558 , H01L23/49562 , H01L23/49568 , H01L2224/33 , H01L2224/40245 , H01L2224/48091 , H01L2224/48998 , H01L2224/73265 , H02M7/003 , H05K7/209 , H01L2924/00014
摘要： A signal block and a double-faced cooling power module that uses the signal block is provided. The signal block includes a plurality of signal clips that are formed in a ribbon shape to connect a first signal pad formed on a semiconductor chip and a second signal pad formed on a signal lead frame. An insulator fixes the position of the plurality of signal clips while spacing the signal clips apart from each other.
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