公开(公告)号：US10966326B2

公开(公告)日：2021-03-30

申请号：US16843925

申请日：2020-04-09

Applicant: IBIDEN CO., LTD.

Inventor： Kotaro Takagi ,  Yoji Mori

IPC: H05K1/11 ,  H05K3/42 ,  H05K3/46 ,  H05K1/18 ,  H05K3/00

Abstract: A wiring substrate includes a laminate having a through hole and including conductor layers and insulating layers interposed between the conductor layers, solder resist layers formed on the laminate and including a first solder resist layer covering first surface of the laminate and a second solder resist layer covering second surface of the laminate and that the first and second solder resist layers have openings exposing the through hole, and a resin film covering the laminate not covered by the solder resist layers such that the resin film is formed on the first and second surfaces of the laminate inside the openings of the first and second solder resist layers without overlapping with the solder resist layers on the first and second surfaces and that the resin film covers inner wall surface inside the through hole and at least part of the first and second surfaces exposed inside the openings.

公开(公告)号：US20200329568A1

公开(公告)日：2020-10-15

申请号：US16843925

申请日：2020-04-09

Applicant: IBIDEN CO., LTD.

Inventor： Kotaro Takagi ,  Yoji Mori

IPC: H05K3/46 ,  H05K1/11 ,  H05K1/18 ,  H05K3/00

Abstract: A wiring substrate includes a laminate having a through hole and including conductor layers and insulating layers interposed between the conductor layers, solder resist layers formed on the laminate and including a first solder resist layer covering first surface of the laminate and a second solder resist layer covering second surface of the laminate and that the first and second solder resist layers have openings exposing the through hole, and a resin film covering the laminate not covered by the solder resist layers such that the resin film is formed on the first and second surfaces of the laminate inside the openings of the first and second solder resist layers without overlapping with the solder resist layers on the first and second surfaces and that the resin film covers inner wall surface inside the through hole and at least part of the first and second surfaces exposed inside the openings.

公开(公告)号：US10143092B2

公开(公告)日：2018-11-27

申请号：US15044295

申请日：2016-02-16

Applicant: IBIDEN CO., LTD.

Inventor： Yukinobu Mikado ,  Mitsuhiro Tomikawa ,  Koji Asano ,  Kotaro Takagi

IPC: H05K1/02 ,  H05K3/46 ,  H05K1/18 ,  H05K3/34

Abstract: A circuit substrate includes a core substrate having a cavity penetrating through the substrate, a metal block accommodated in the cavity of the substrate, a first build-up layer laminated on first side of the substrate and including insulating resin layers such that the first build-up layer is covering first surface of the block from the first side, and a second build-up layer laminated on second side of the substrate and including insulating resin layers such that the second build-up layer is covering second surface of the block from the second side. The first build-up layer includes an electronic component mounting structure formed on outermost portion of the first build-up layer, and the block is formed such that the first and second surfaces have roughened surfaces, respectively, and that the roughened surface of the first surface has surface roughness different from surface roughness of the roughened surface of the second surface.

公开(公告)号：US09831163B2

公开(公告)日：2017-11-28

申请号：US15052314

申请日：2016-02-24

Applicant: IBIDEN CO., LTD.

Inventor： Yukinobu Mikado ,  Mitsuhiro Tomikawa ,  Koji Asano ,  Kotaro Takagi

IPC: H05K1/00 ,  H05K1/02 ,  H01L23/498 ,  H01L23/367 ,  H01L25/10

CPC classification number: H01L23/49822 ,  H01L23/3677 ,  H01L23/49816 ,  H01L23/49827 ,  H01L24/19 ,  H01L24/20 ,  H01L25/105 ,  H01L2224/04105 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/18 ,  H01L2224/2518 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/00014

Abstract: A circuit substrate includes a core substrate having a cavity, a metal block accommodated in the cavity of the core substrate, a first build-up layer including an insulating resin layer and laminated on a first surface of the core substrate such that the insulating resin layer is covering a first surface of the metal block in the cavity, and a second build-up layer including an insulating resin layer and laminated on a second surface of the core substrate such that the insulating resin layer is covering a second surface of the metal block in the cavity. The second build-up layer includes via conductors connected to the second surface of the metal block and common lands connecting the via conductors in parallel.

公开(公告)号：US20160268189A1

公开(公告)日：2016-09-15

申请号：US15052314

申请日：2016-02-24

Applicant: IBIDEN CO., LTD.

Inventor： Yukinobu MIKADO ,  Mitsuhiro Tomikawa ,  Koji Asano ,  Kotaro Takagi

IPC: H01L23/498 ,  H01L23/367 ,  H01L21/48

CPC classification number: H01L23/49822 ,  H01L23/3677 ,  H01L23/49816 ,  H01L23/49827 ,  H01L24/19 ,  H01L24/20 ,  H01L25/105 ,  H01L2224/04105 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/18 ,  H01L2224/2518 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/00014

Abstract: A circuit substrate includes a core substrate having a cavity, a metal block accommodated in the cavity of the core substrate, a first build-up layer including an insulating resin layer and laminated on a first surface of the core substrate such that the insulating resin layer is covering a first surface of the metal block in the cavity, and a second build-up layer including an insulating resin layer and laminated on a second surface of the core substrate such that the insulating resin layer is covering a second surface of the metal block in the cavity. The second build-up layer includes via conductors connected to the second surface of the metal block and common lands connecting the via conductors in parallel.

Abstract translation: 电路基板包括具有空腔的芯基板，容纳在芯基板的空腔中的金属块，第一堆积层，包括绝缘树脂层，层压在芯基板的第一表面上，使得绝缘树脂层 覆盖空腔中的金属块的第一表面，以及第二堆积层，其包括绝缘树脂层，层叠在芯基板的第二表面上，使得绝缘树脂层覆盖金属块的第二表面 在腔里。 第二堆积层包括连接到金属块的第二表面的通孔导体和并联连接通孔导体的公共区域。

公开(公告)号：US20160242293A1

公开(公告)日：2016-08-18

申请号：US15044295

申请日：2016-02-16

Applicant: IBIDEN CO., LTD.

Inventor： Yukinobu MIKADO ,  Mitsuhiro Tomikawa ,  Koji Asano ,  Kotaro Takagi

IPC: H05K1/18 ,  H05K1/11 ,  H05K3/06 ,  H05K3/40 ,  H05K3/30 ,  H05K1/02 ,  H05K3/46

CPC classification number: H05K3/4697 ,  H01L2224/04105 ,  H01L2224/2518 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/15311 ,  H05K1/0204 ,  H05K1/0206 ,  H05K1/182 ,  H05K1/185 ,  H05K3/3436 ,  H05K3/4661 ,  H05K2201/10015 ,  H05K2201/10416 ,  H05K2201/10734 ,  H01L2924/00014

Abstract: A circuit substrate includes a core substrate having a cavity penetrating through the substrate, a metal block accommodated in the cavity of the substrate, a first build-up layer laminated on first side of the substrate and including insulating resin layers such that the first build-up layer is covering first surface of the block from the first side, and a second build-up layer laminated on second side of the substrate and including insulating resin layers such that the second build-up layer is covering second surface of the block from the second side. The first build-up layer includes an electronic component mounting structure formed on outermost portion of the first build-up layer, and the block is formed such that the first and second surfaces have roughened surfaces, respectively, and that the roughened surface of the first surface has surface roughness different from surface roughness of the roughened surface of the second surface.

Abstract translation: 电路基板包括具有穿透基板的空腔的芯基板，容纳在基板的空腔中的金属块，层叠在基板的第一侧上的第一累积层，并且包括绝缘树脂层， 从第一侧覆盖块的第一表面，以及层压在基板的第二侧上的第二堆积层，并且包括绝缘树脂层，使得第二堆积层从块的第二表面覆盖 第二面。 第一堆积层包括形成在第一堆积层的最外部分的电子部件安装结构，并且块被形成为使得第一和第二表面分别具有粗糙表面，并且第一堆积层的粗糙表面 表面具有与第二表面粗糙化表面的表面粗糙度不同的表面粗糙度。