公开(公告)号：US11678440B2

公开(公告)日：2023-06-13

申请号：US16874847

申请日：2020-05-15

Applicant: IBIDEN CO., LTD.

Inventor： Yoji Sawada ,  Nobuhisa Kuroda ,  Kazuyuki Ueda ,  Shota Tachibana

IPC: H05K1/11 ,  H05K3/40 ,  H05K1/18

CPC classification number: H05K3/4092 ,  H05K1/115 ,  H05K3/4061 ,  H05K1/111 ,  H05K1/18 ,  H05K2201/0373

Abstract: A printed wiring board includes a resin insulating layer, a metal post formed in the insulating layer and protruding from first surface of the insulating layer, a conductor layer formed on second surface of the insulating layer, and a via conductor penetrating through the insulating layer and connecting the metal post and conductor layer. The metal post has a protruding portion protruding from the first surface of the insulating layer and an embedded portion connected to the protruding portion and embedded in the insulating layer such that the protruding portion does not extend onto the insulating layer, and the metal post has upper and side surfaces such that the side surface has unevenness including a first unevenness on side surface of the protruding portion and a second unevenness formed on side surface of the embedded portion and having a size that is larger than a size of the first unevenness.

公开(公告)号：US20190098752A1

公开(公告)日：2019-03-28

申请号：US16143627

申请日：2018-09-27

Applicant: IBIDEN CO., LTD.

Inventor： Hajime Sakamoto ,  Yoji Sawada

IPC: H05K1/02 ,  H05K1/11 ,  H05K3/46 ,  H01L21/48

Abstract: A printed wiring board includes a first build-up layer including first insulating layer, conductor layer and via conductor, a second build-up layer formed on the first build-up layer and including second insulating layer, conductor layer and via conductor, and a third build-up layer formed on the second build-up layer and including third insulating layer, conductor layer and via conductor. The first via conductor has first via conductor diameter at interface between the first conductor layer and first via conductor, the second via conductor has second via conductor diameter at interface between the second conductor layer and second via conductor, and the third via conductor has third via conductor diameter at interface between the third conductor layer and third via conductor such that the first via conductor diameter is larger than the second via conductor diameter and that the second via conductor diameter is larger than the third via conductor diameter.

公开(公告)号：US20190109085A1

公开(公告)日：2019-04-11

申请号：US16157433

申请日：2018-10-11

Applicant: IBIDEN CO., LTD.

Inventor： Hajime SAKAMOTO ,  Yoji Sawada

IPC: H01L23/498

Abstract: A printed wiring board includes a first build-up layer having first insulating layer, conductor layer and via conductor, a second build-up layer formed on the first build-up layer and having second insulating layer, conductor layer and via conductor, a third build-up layer formed on the second build-up layer and having third insulating layer, conductor layer and via conductor, and a fourth build-up layer formed on the third build-up layer and having fourth insulating layer, conductor layer and via conductor. The first insulating layer has a thickness that is larger than a thickness of the second insulating layer, the thickness of the second insulating layer is larger than a thickness of the third insulating layer, the thickness of the second insulating layer is larger than a thickness of the fourth insulating layer, and the thickness of the fourth insulating layer is larger than the thickness of the third insulating layer.

公开(公告)号：US11749596B2

公开(公告)日：2023-09-05

申请号：US17452123

申请日：2021-10-25

Applicant: IBIDEN CO., LTD.

Inventor： Katsuyuki Sano ,  Yoji Sawada

IPC: H01L21/48 ,  H01L23/498

CPC classification number: H01L23/49838 ,  H01L21/486 ,  H01L21/4857 ,  H01L23/49811 ,  H01L23/49822

Abstract: A wiring substrate includes a conductor pad, an insulating layer formed on the conductor pad such that the insulating layer is covering the conductor pad and has a through hole, a bump formed on the conductor pad such that the bump is formed in the through hole penetrating through the insulating layer. The conductor pad is formed such that the conductor pad has a connecting surface connected to the bump, a concave part formed on the connecting surface of the conductor pad to the bump, and a convex part formed in the concave part.

公开(公告)号：US11019732B2

公开(公告)日：2021-05-25

申请号：US17004812

申请日：2020-08-27

Applicant: IBIDEN CO., LTD.

Inventor： Yoji Sawada ,  Shuto Iwata

IPC: H05K1/11 ,  H05K3/34 ,  H05K3/12 ,  H05K3/42

Abstract: A printed wiring board includes an insulating layer, a conductor layer formed on the insulating layer and including first and second pads, a solder resist layer formed on the insulating layer, covering the conductor layer and exposing the first and second pads to form the second pad having diameter smaller than diameter of the first pad, a first bump formed on the first pad and including first base and top plating layers such that the first base layer has embedded portion in the resist layer and exposed portion and having diameter substantially equal to or smaller than diameter of the embedded portion, and a second bump formed on the second pad and including second base and top plating layers such that the second base layer has embedded portion in the resist layer and exposed portion and having diameter substantially equal to or smaller than diameter of the embedded portion.

公开(公告)号：US11622446B2

公开(公告)日：2023-04-04

申请号：US17359805

申请日：2021-06-28

Applicant: IBIDEN CO., LTD.

Inventor： Isao Ohno ,  Tomoya Daizo ,  Yoji Sawada ,  Kazuhiko Kuranobu

IPC: H05K1/11 ,  H05K1/09 ,  H01L23/00 ,  H01L23/498

Abstract: A wiring substrate includes a resin insulating layer, a conductor pad formed on the resin insulating layer, a coating insulating layer formed on the resin insulating layer such that the coating insulating layer is covering the conductor pad, and a metal post connected to the conductor pad and protruding from the coating insulating layer such that a gap is formed between the metal post and the conductor pad at a peripheral edge of the metal post. The coating insulating layer is formed such that the coating insulating layer has an interposed portion formed in the gap between the metal post and the conductor pad at the peripheral edge of the metal post.

公开(公告)号：US11222791B2

公开(公告)日：2022-01-11

申请号：US15931696

申请日：2020-05-14

Applicant: IBIDEN CO., LTD.

Inventor： Yoji Sawada ,  Nobuhisa Kuroda ,  Kazuyuki Ueda ,  Shota Tachibana

IPC: H05K1/18 ,  H05K1/11 ,  H01L21/48 ,  H01L23/498 ,  H05K3/46 ,  H01L23/00 ,  H05K1/02

Abstract: A printed wiring board includes a resin insulating layer, a metal post formed in the resin insulating layer such that the metal post is protruding from a first surface of the resin insulating layer, a conductor layer formed on a second surface of the resin insulating layer on the opposite side with respect to the first surface of the resin insulating layer, and a via conductor formed in the resin insulating layer such that the via conductor is penetrating through the resin insulating layer and connecting the metal post and the conductor layer. The metal post has a protruding portion protruding from the first surface of the resin insulating layer and an embedded portion integrally formed with the protruding portion and embedded in the resin insulating layer.

公开(公告)号：US12033927B2

公开(公告)日：2024-07-09

申请号：US17361522

申请日：2021-06-29

Applicant: IBIDEN CO., LTD.

Inventor： Isao Ohno ,  Tomoya Daizo ,  Yoji Sawada ,  Kazuhiko Kuranobu

IPC: H01L21/48 ,  H01L23/498

CPC classification number: H01L23/49822 ,  H01L21/4857

Abstract: A method for manufacturing a wiring substrate includes forming multiple conductor pads on an insulating layer such that the conductor pads include multiple first conductor pads and multiple second conductor pads, forming multiple protruding parts on surfaces of the first conductor pads of the conductor pads, respectively, forming a resin layer such that the resin layer covers the insulating layer and the conductor pads, exposing, from the resin layer, end portions of the protruding parts on the opposite side with respect to the insulating layer, forming, in the resin layer, multiple openings such that the openings expose surfaces of the second conductor pads of the conductor pads, respectively; and forming a coating film on the surfaces of the second conductor pads exposed in the openings.

公开(公告)号：US11935822B2

公开(公告)日：2024-03-19

申请号：US17359887

申请日：2021-06-28

Applicant: IBIDEN CO., LTD.

Inventor： Isao Ohno ,  Tomoya Daizo ,  Yoji Sawada ,  Kazuhiko Kuranobu

IPC: H01L23/498 ,  H01L21/48 ,  H01L23/00

CPC classification number: H01L23/49838 ,  H01L21/4857 ,  H01L23/49822 ,  H01L24/10 ,  H01L24/12 ,  H01L24/13 ,  H01L24/14

Abstract: A wiring substrate includes a resin insulating layer, a via conductor formed in the resin insulating layer such that the via conductor is penetrating through the resin insulating layer, a conductor pad formed on the resin insulating layer and connected to the via conductor, a coating insulating layer formed on the resin insulating layer such that the coating insulating layer is covering the conductor pad, and a metal post formed on the conductor pad and protruding from the coating insulating layer. The conductor pad is formed such that a central axis of the conductor pad is shifted in a predetermined direction with respect to a central axis of the via conductor, and the metal post is formed such that a central axis of the metal post is shifted in the predetermined direction with respect to the central axis of the conductor pad.

公开(公告)号：US11246224B2

公开(公告)日：2022-02-08

申请号：US17004719

申请日：2020-08-27

Applicant: IBIDEN CO., LTD.

Inventor： Yoji Sawada ,  Shuto Iwata

IPC: H05K3/34 ,  H05K3/12 ,  H05K3/42 ,  H05K1/11 ,  H05K3/24

Abstract: A method for manufacturing a printed wiring board includes forming a conductor layer including first and second pads on an insulating layer, forming a dry film resist layer on the insulating and conductor layers, forming first and second openings exposing the first and second pads, applying first metal plating to form first and second base plating layers on the first and second pads, applying second metal plating to form a first top plating layer of a first post and portion of a second top plating layer of a second bump post, applying the second metal plating further to form second portion of the second top layer of the second post, removing the dry film resist layer, forming a solder resist layer to cover the first and second posts, and thinning the solder resist layer over entire surface to position the first and second top layers outside the solder resist layer.