公开(公告)号：US20160066423A1

公开(公告)日：2016-03-03

申请号：US14841923

申请日：2015-09-01

Applicant: IBIDEN CO., LTD.

Inventor： Hajime SAKAMOTO ,  Nobuya TAKAHASHI

IPC: H05K1/11 ,  H05K3/10 ,  H05K3/00 ,  H05K1/14

CPC classification number: H01L23/49822 ,  H01L23/49827 ,  H01L23/5383 ,  H01L23/5384 ,  H01L23/5385 ,  H01L25/0655 ,  H01L2224/16225 ,  H01L2924/15192 ,  H01L2924/15311 ,  H05K1/02 ,  H05K1/113 ,  H05K1/141 ,  H05K1/181 ,  H05K3/0017 ,  H05K3/108 ,  H05K3/4694 ,  H05K2201/0769 ,  H05K2201/09036 ,  H05K2201/10522 ,  H05K2201/1053 ,  H05K2201/10674 ,  Y02P70/611

Abstract: A printed wiring board includes an insulating layer including insulating material, and a conductor layer formed on a surface of the insulating layer and including conductor pads and conductor patterns such that the conductor pads are positioned to connect one or more electronic components and that the conductor patterns are formed between the conductor pads. The conductor patterns are formed such that each conductor pattern has a pattern width of 3 μm or less and that the conductor patterns have a pattern interval of 3 μm or less between adjacent conductor patterns, and the insulating layer has recess portions formed on the surface between the conductor patterns at least along the conductor patterns such that the recess portions have a depth in a range of 0.1 μm to 2.0 μm relative to a contact interface at which the conductor patterns and the insulating layer are in contact with each other.

Abstract translation: 印刷电路板包括绝缘层，其包括绝缘材料，以及形成在绝缘层的表面上并包括导体焊盘和导体图案的导体层，使得导体焊盘定位成连接一个或多个电子部件，导体图案 形成在导体焊盘之间。 导体图案形成为使得每个导体图案具有3μm或更小的图案宽度，并且导体图案在相邻导体图案之间具有3μm或更小的图案间隔，并且绝缘层具有形成在其间的表面上的凹部 所述导体图案至少沿着所述导体图案，使得所述凹部相对于所述导体图案和所述绝缘层彼此接触的接触界面具有在0.1μm至2.0μm的范围内的深度。

公开(公告)号：US20150130079A1

公开(公告)日：2015-05-14

申请号：US14601541

申请日：2015-01-21

Applicant: IBIDEN CO., LTD.

Inventor： Hajime SAKAMOTO ,  Dongdong Wang

IPC: H01L23/498

CPC classification number: H01L23/49838 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49866 ,  H01L23/49894 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/24 ,  H01L24/27 ,  H01L24/97 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/1147 ,  H01L2224/12105 ,  H01L2224/20 ,  H01L2224/24137 ,  H01L2224/24227 ,  H01L2224/274 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/73267 ,  H01L2224/92244 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01018 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01051 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01L2924/1532 ,  H01L2924/15787 ,  H01L2924/30107 ,  H01L2924/3511 ,  H05K1/185 ,  H05K3/4602 ,  H05K2201/09036 ,  H05K2201/09563 ,  H05K2201/096 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49133 ,  Y10T29/49139 ,  Y10T29/49144 ,  Y10T29/49146 ,  Y10T29/49155 ,  Y10T29/49165 ,  H01L2224/82 ,  H01L2924/3512 ,  H01L2924/00 ,  H01L2224/03

Abstract: A multilayer device has a resin layer, a semiconductor device positioned in the resin layer and including an electronic component and a passivation layer having an opening exposing an electrode of the electronic component, an intermediate layer including metal layers and formed in the opening of the passivation layer such that the intermediate layer is connected to the electrode of the electronic component, and a buildup layer formed on the resin layer and including an insulating layer and a via conductor formed in the insulating layer such that the via conductor is connected to the intermediate layer. The resin layer includes one or more resin material selected from the group consisting of a thermosetting resin material and a thermoplastic resin material.

Abstract translation: 多层器件具有树脂层，半导体器件位于树脂层中，并且包括电子部件和具有露出电子部件的电极的开口的钝化层，包含金属层并形成在钝化层的开口中的中间层 层，使得中间层连接到电子部件的电极，以及形成在树脂层上并具有形成在绝缘层中的绝缘层和通路导体的积聚层，使得通孔导体连接到中间层 。 树脂层包含一种或多种选自热固性树脂材料和热塑性树脂材料的树脂材料。

公开(公告)号：US20170256470A1

公开(公告)日：2017-09-07

申请号：US15451473

申请日：2017-03-07

Applicant: IBIDEN CO., LTD.

Inventor： Hajime SAKAMOTO ,  Keisuke SHIMIZU

IPC: H01L23/16 ,  H01L21/54 ,  H01L21/48 ,  H01L21/56 ,  H01L23/538 ,  H01L23/31

CPC classification number: H01L23/16 ,  H01L21/4857 ,  H01L21/54 ,  H01L21/565 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/145 ,  H01L23/3114 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/5386 ,  H01L23/5389 ,  H01L24/16 ,  H01L24/19 ,  H01L24/20 ,  H01L24/32 ,  H01L24/73 ,  H01L24/92 ,  H01L2221/68345 ,  H01L2221/68359 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/16227 ,  H01L2224/32245 ,  H01L2224/73267 ,  H01L2224/92244 ,  H01L2924/1432 ,  H01L2924/15153 ,  H01L2924/15311 ,  H01L2924/18162

Abstract: A wiring substrate includes insulating layers including a first insulating layer such that the first insulating layer is positioned at one end of the insulating layers in lamination direction and has an accommodating portion through the first insulating layer, conductive layers laminated on the insulating layers and including a first conductive layer formed on one end side of the first insulating layer in the lamination direction and a second conductive layer formed on the opposite side, and a semiconductor element accommodated in the accommodating portion of the first insulating layer. The insulating layers include the first insulating layer including reinforcing material and a second insulating layer laminated on the first insulating layer such that the second insulating layer is covering the second conductive layer and the semiconductor element and filling gap formed between the first insulating layer and semiconductor element in the accommodating portion and does not contain reinforcing material.

公开(公告)号：US20160105960A1

公开(公告)日：2016-04-14

申请号：US14880299

申请日：2015-10-12

Applicant: IBIDEN CO., LTD.

Inventor： Hajime SAKAMOTO ,  Yoshinori SHIZUNO ,  Shigeru YAMADA ,  Takashi KARIYA

IPC: H05K1/11 ,  H05K3/46 ,  H05K3/00 ,  H05K1/02 ,  H05K3/10

CPC classification number: H01L23/5383 ,  H01L21/486 ,  H01L2224/16227 ,  H01L2224/1703 ,  H01L2924/15192 ,  H01L2924/15313 ,  H05K3/007 ,  H05K3/025 ,  H05K3/4644 ,  H05K3/4658 ,  H05K3/4694 ,  H05K2201/10159 ,  H05K2201/10378 ,  H05K2201/1053

Abstract: A multilayer wiring board includes a main wiring board including insulation layers, first via conductors formed in the insulation layers, and a first conductive layer including first mounting pads such that the first mounting pads are positioned to mount a first electronic component and a second electronic component adjacent to each other on the main wiring board, and a wiring structure body mounted on the main wiring board such that the wiring structure body is positioned in an outermost insulation layer of the insulation layers, the wiring structure body including a second conductive layer which includes second mounting pads such that the second mounting pads are positioned to connect to the first electronic component and the second electronic component mounted on the main wiring board. The first via conductors are formed such that the first via conductors have diameters which increase in a same direction.

Abstract translation: 多层布线基板包括：主布线板，包括绝缘层，形成在绝缘层中的第一通孔导体;以及第一导电层，包括第一安装焊盘，使得第一安装焊盘定位成安装第一电子部件和第二电子部件 以及配线结构体，其安装在主配线板上，使得布线结构体位于绝缘层的最外绝缘层中，所述布线结构体包括第二导电层，所述第二导电层包括： 第二安装焊盘，使得第二安装焊盘被定位成连接到安装在主布线板上的第一电子部件和第二电子部件。 第一通孔导体形成为使得第一通孔导体具有沿相同方向增加的直径。

公开(公告)号：US20160095219A1

公开(公告)日：2016-03-31

申请号：US14865273

申请日：2015-09-25

Applicant: IBIDEN CO., LTD.

Inventor： Hajime SAKAMOTO ,  Ryojiro TOMINAGA

IPC: H05K1/11 ,  H01L23/498 ,  H05K1/02 ,  H05K1/14 ,  H05K1/18

CPC classification number: H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/5385 ,  H01L23/5386 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/81 ,  H01L25/0655 ,  H01L2224/131 ,  H01L2224/14051 ,  H01L2224/16227 ,  H01L2224/16238 ,  H01L2224/81143 ,  H01L2224/81191 ,  H01L2224/81193 ,  H01L2224/81444 ,  H01L2224/8149 ,  H01L2224/81801 ,  H01L2924/15192 ,  H01L2924/15313 ,  H01L2924/3841 ,  H05K1/0298 ,  H05K1/113 ,  H05K3/3436 ,  H05K3/4694 ,  H05K2201/10522 ,  H05K2201/10674 ,  H01L2924/014 ,  H01L2924/00014

Abstract: A printed wiring board includes a main wiring board having a main wiring pattern, and a sub wiring board mounted to the main board and having a sub wiring pattern such that the sub pattern electrically connects first and second electronic components, first conductor pads positioned to connect the first component to the main board and the sub board and having surfaces such that the first component is mounted onto the surfaces of the first pads via solder bumps, and second conductor pads positioned to connect the second component to the main board and the sub board and having surfaces such that the second component is mounted onto the surfaces of the second pads via solder bumps. The first and second pads are formed such that the surfaces of the first and second pads are formed on the same plane and have the same shape and the same size.

Abstract translation: 印刷电路板包括具有主布线图案的主布线板和安装到主板并具有子布线图案的子布线图案，使得子图案电连接第一和第二电子部件，定位成连接的第一导体焊盘 所述第一部件到所述主板和所述子板，并且具有使得所述第一部件经由焊料凸块安装到所述第一焊盘的表面上的表面，以及定位成将所述第二部件连接到所述主板和所述副板的第二导体焊盘 并且具有使得第二部件经由焊料凸块安装到第二焊盘的表面上的表面。 第一和第二焊盘形成为使得第一焊盘和第二焊盘的表面形成在同一平面上并且具有相同的形状和相同的尺寸。

公开(公告)号：US20150223318A1

公开(公告)日：2015-08-06

申请号：US14610245

申请日：2015-01-30

Applicant: IBIDEN CO., LTD.

Inventor： Hajime SAKAMOTO

IPC: H05K1/02 ,  H05K1/18 ,  H05K1/11

CPC classification number: H05K1/0206 ,  H01L2224/16227 ,  H05K1/0298 ,  H05K1/113 ,  H05K3/3436 ,  H05K3/4661 ,  H05K2201/094 ,  H05K2201/10416

Abstract: A multilayer wiring board includes a first insulating layer, first conductor patterns formed on the first insulating layer, and a wiring structure formed on the first insulating layer and including a heat sink and second conductor patterns formed on the heat sink such that the wiring structure is positioned adjacent to the first conductor patterns on the first insulating layer.

Abstract translation: 多层布线基板包括第一绝缘层，形成在第一绝缘层上的第一导体图案和形成在第一绝缘层上的布线结构，并且包括形成在散热片上的散热器和第二导体图案，使得布线结构 定位成与第一绝缘层上的第一导体图案相邻。

公开(公告)号：US20190109085A1

公开(公告)日：2019-04-11

申请号：US16157433

申请日：2018-10-11

Applicant: IBIDEN CO., LTD.

Inventor： Hajime SAKAMOTO ,  Yoji Sawada

IPC: H01L23/498

Abstract: A printed wiring board includes a first build-up layer having first insulating layer, conductor layer and via conductor, a second build-up layer formed on the first build-up layer and having second insulating layer, conductor layer and via conductor, a third build-up layer formed on the second build-up layer and having third insulating layer, conductor layer and via conductor, and a fourth build-up layer formed on the third build-up layer and having fourth insulating layer, conductor layer and via conductor. The first insulating layer has a thickness that is larger than a thickness of the second insulating layer, the thickness of the second insulating layer is larger than a thickness of the third insulating layer, the thickness of the second insulating layer is larger than a thickness of the fourth insulating layer, and the thickness of the fourth insulating layer is larger than the thickness of the third insulating layer.

公开(公告)号：US20160027725A1

公开(公告)日：2016-01-28

申请号：US14809455

申请日：2015-07-27

Applicant: IBIDEN CO., LTD.

Inventor： Hajime SAKAMOTO

IPC: H01L23/498 ,  H01L21/48 ,  H01L21/683 ,  H01L23/367

CPC classification number: H01L23/49822 ,  H01L21/6835 ,  H01L21/6836 ,  H01L23/367 ,  H01L23/49827 ,  H01L23/49833 ,  H01L2221/68318 ,  H01L2221/68331 ,  H01L2221/68345 ,  H01L2221/68359 ,  H01L2221/68381 ,  H01L2224/16227 ,  H01L2924/15313

Abstract: A multilayer wiring board includes a main wiring board which mounts a semiconductor component on a surface of the main wiring board, and a wiring structure body which is mounted to the main wiring board and is formed to be electrically connected to the semiconductor component. The wiring structure body includes conductive pads formed on a first side of the wiring structure body, a heat radiation component formed on a second side of the wiring structure body on the opposite side with respect to the first side, an insulation layer positioned between the conductive pads and the heat radiation component, and via conductors formed in the insulation layer such that each of the via conductors has a diameter which increases from the first side toward the second side of the wiring structure body.

Abstract translation: 多层布线基板包括：在主布线板的表面上安装半导体部件的主布线板以及安装在主布线基板上并形成为与半导体部件电连接的布线结构体。 所述布线结构体包括形成在所述布线结构体的第一侧上的导电焊盘，形成在所述布线结构体的相对于所述第一侧的相反侧的第二侧上的散热部件，位于所述导体 衬垫和热辐射分量，以及形成在绝缘层中的通孔导体，使得每个通孔导体具有从布线结构体的第一侧向第二侧增加的直径。